Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r096-smll-155246587300233.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r096-smll-155246587300233
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 660K
-rw-r--r-- 1 mcc users 13K Feb 11 22:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 11 22:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 7 23:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 7 23:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 108 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 346 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 4.5K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 5 00:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 28K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Jan 31 23:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Jan 31 23:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K Feb 4 22:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 255K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552801402278

Working with output stream class java.io.PrintStream
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-00 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)<=(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7))||((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)+P_ifxi_10_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-01 with value :((((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7))||((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)+P_setx_3_7)>=3))&&((!((((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)+P_b_7_false)+P_b_7_true)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7)))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_0_7)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_1_7)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_2_7)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_3_7)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_4_7)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_5_7)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)+P_wait_6_7)+P_wait_7_0)+P_wait_7_1)+P_wait_7_2)+P_wait_7_3)+P_wait_7_4)+P_wait_7_5)+P_wait_7_6)+P_wait_7_7))&&((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7)))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-02 with value :((!((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=3))&&((!((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=2))&&(!((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-03 with value :(((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=3)&&(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_0_7)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_1_7)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_2_7)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_3_7)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_4_7)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_5_7)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)+P_wait_6_7)+P_wait_7_0)+P_wait_7_1)+P_wait_7_2)+P_wait_7_3)+P_wait_7_4)+P_wait_7_5)+P_wait_7_6)+P_wait_7_7)<=(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=2))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-04 with value :((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)>=1)
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_0_7)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_1_7)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_2_7)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_3_7)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_4_7)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_5_7)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)+P_wait_6_7)+P_wait_7_0)+P_wait_7_1)+P_wait_7_2)+P_wait_7_3)+P_wait_7_4)+P_wait_7_5)+P_wait_7_6)+P_wait_7_7)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=1))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))&&((((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)+P_b_7_false)+P_b_7_true)>=3)))&&((((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)<=(((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)+P_b_7_false)+P_b_7_true)))||(((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)>=2))))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-06 with value :((!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7)>=2)||((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)+P_ifxi_10_7)>=2)))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_0_7)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_1_7)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_2_7)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_3_7)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_4_7)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_5_7)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)+P_wait_6_7)+P_wait_7_0)+P_wait_7_1)+P_wait_7_2)+P_wait_7_3)+P_wait_7_4)+P_wait_7_5)+P_wait_7_6)+P_wait_7_7)>=1)&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=3))||(!((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=3))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-07 with value :((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)>=3)
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-08 with value :(!((P_awaity_3>=1)&&(!(y_3<=P_b_1_true))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-09 with value :(P_CS_21_4>=3)
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-11 with value :(P_done_2_7>=2)
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-12 with value :(P_wait_3_2>=1)
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-13 with value :(!(P_ifxi_10_0<=P_fordo_12_4))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-14 with value :((P_ifyi_15_2<=P_done_0_7)&&(!(P_setbi_11_3<=P_ifyi_15_2)))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-15 with value :((((P_wait_5_3<=P_wait_4_7)&&(P_done_5_2>=2))||((P_ifyi_15_6<=P_done_0_5)&&(P_setbi_11_3<=P_done_7_0)))&&(!(P_wait_2_5>=2)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_4_7 + -1'P_await_13_4 + P_done_4_7 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_7_4 + -1'P_await_13_7 + P_done_7_4 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_wait_6_7 + -1'P_await_13_6 + P_done_6_7 = 0
invariant :P_wait_3_7 + -1'P_await_13_3 + P_done_3_7 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_2_7 + -1'P_await_13_2 + P_done_2_7 = 0
invariant :P_wait_0_7 + -1'P_await_13_0 + P_done_0_7 = 0
invariant :P_wait_5_7 + -1'P_await_13_5 + P_done_5_7 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_b_7_false + P_b_7_true = 1
invariant :P_wait_7_7 + -1'P_await_13_7 + P_done_7_7 = 0
invariant :P_wait_7_6 + -1'P_await_13_7 + P_done_7_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :P_wait_7_1 + -1'P_await_13_7 + P_done_7_1 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_7_5 + -1'P_await_13_7 + P_done_7_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_7_0 + P_done_7_0 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_7_2 + -1'P_await_13_7 + P_done_7_2 = 0
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_wait_1_7 + -1'P_await_13_1 + P_done_1_7 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_7_3 + -1'P_await_13_7 + P_done_7_3 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_4_7 + -1'P_await_13_4 + P_done_4_7 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_7_4 + -1'P_await_13_7 + P_done_7_4 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_wait_6_7 + -1'P_await_13_6 + P_done_6_7 = 0
invariant :P_wait_3_7 + -1'P_await_13_3 + P_done_3_7 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_2_7 + -1'P_await_13_2 + P_done_2_7 = 0
invariant :P_wait_0_7 + -1'P_await_13_0 + P_done_0_7 = 0
invariant :P_wait_5_7 + -1'P_await_13_5 + P_done_5_7 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_b_7_false + P_b_7_true = 1
invariant :P_wait_7_7 + -1'P_await_13_7 + P_done_7_7 = 0
invariant :P_wait_7_6 + -1'P_await_13_7 + P_done_7_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :P_wait_7_1 + -1'P_await_13_7 + P_done_7_1 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_7_5 + -1'P_await_13_7 + P_done_7_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_7_0 + P_done_7_0 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_7_2 + -1'P_await_13_7 + P_done_7_2 = 0
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_wait_1_7 + -1'P_await_13_1 + P_done_1_7 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_7_3 + -1'P_await_13_7 + P_done_7_3 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 8796 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 65 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 146057 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 3525 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
LTSmin run took 4298 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 2411 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 2323 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
LTSmin run took 13070 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 6915 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 2964 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 2724 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1920 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1920 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 17, 2019 5:43:24 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 17, 2019 5:43:24 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 17, 2019 5:43:24 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 123 ms
Mar 17, 2019 5:43:24 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 264 places.
Mar 17, 2019 5:43:24 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 536 transitions.
Mar 17, 2019 5:43:24 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property LamportFastMutEx-PT-7-ReachabilityCardinality-10 is trivially false : it is not verified in initial state.
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 213 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 210 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 200 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 8 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
Mar 17, 2019 5:43:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 131 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 985 ms.
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(UNSAT) depth K=0 took 21 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=0 took 2 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=0 took 0 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=0 took 1 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=0 took 1 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=0 took 3 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=0 took 24 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=0 took 3 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=0 took 20 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=0 took 15 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=0 took 15 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=0 took 5 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=0 took 10 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(UNSAT) depth K=1 took 18 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=1 took 49 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=1 took 13 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=1 took 18 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=1 took 10 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=1 took 55 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=1 took 61 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=1 took 14 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=1 took 9 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=1 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=1 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=1 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=1 took 11 ms
Mar 17, 2019 5:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=1 took 10 ms
Mar 17, 2019 5:43:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 133 ms
Mar 17, 2019 5:43:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(UNSAT) depth K=2 took 299 ms
Mar 17, 2019 5:43:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=2 took 614 ms
Mar 17, 2019 5:43:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=2 took 704 ms
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 2956 ms
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/536 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 89 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 52 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 5:43:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=2 took 1246 ms
Mar 17, 2019 5:43:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=2 took 188 ms
Mar 17, 2019 5:43:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=2 took 264 ms
Mar 17, 2019 5:43:30 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 3312 ms
Mar 17, 2019 5:43:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=2 took 440 ms
Mar 17, 2019 5:43:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=2 took 1158 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=2 took 132 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=2 took 272 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=2 took 202 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-00
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(SAT) depth K=0 took 2206 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=2 took 186 ms
Mar 17, 2019 5:43:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=2 took 216 ms
Mar 17, 2019 5:43:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=2 took 401 ms
Mar 17, 2019 5:43:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=2 took 1157 ms
Mar 17, 2019 5:43:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(UNSAT) depth K=3 took 4208 ms
Mar 17, 2019 5:43:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
Mar 17, 2019 5:43:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=0 took 9919 ms
Mar 17, 2019 5:43:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=3 took 4864 ms
Mar 17, 2019 5:43:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-02
Mar 17, 2019 5:43:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(SAT) depth K=0 took 5586 ms
Mar 17, 2019 5:43:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
Mar 17, 2019 5:43:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=0 took 1948 ms
Mar 17, 2019 5:43:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
Mar 17, 2019 5:43:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=0 took 903 ms
Mar 17, 2019 5:43:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
Mar 17, 2019 5:43:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=0 took 1147 ms
Mar 17, 2019 5:43:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
Mar 17, 2019 5:43:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=0 took 1070 ms
Mar 17, 2019 5:43:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
Mar 17, 2019 5:43:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=0 took 1205 ms
Mar 17, 2019 5:43:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
Mar 17, 2019 5:43:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=0 took 1250 ms
Mar 17, 2019 5:43:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-7-ReachabilityCardinality-09
Mar 17, 2019 5:43:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-09
Mar 17, 2019 5:43:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(FALSE) depth K=0 took 419 ms
Mar 17, 2019 5:43:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-7-ReachabilityCardinality-11
Mar 17, 2019 5:43:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-11
Mar 17, 2019 5:43:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(FALSE) depth K=0 took 442 ms
Mar 17, 2019 5:43:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=3 took 14781 ms
Mar 17, 2019 5:44:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=3 took 2363 ms
Mar 17, 2019 5:44:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=3 took 7891 ms
Mar 17, 2019 5:44:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
Mar 17, 2019 5:44:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/536) took 651 ms. Total solver calls (SAT/UNSAT): 73(0/73)
Mar 17, 2019 5:44:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/536) took 3915 ms. Total solver calls (SAT/UNSAT): 435(14/421)
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=0 took 20055 ms
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/536) took 7209 ms. Total solver calls (SAT/UNSAT): 798(35/763)
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-7-ReachabilityCardinality-13
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-13
Mar 17, 2019 5:44:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(FALSE) depth K=0 took 514 ms
Mar 17, 2019 5:44:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
Mar 17, 2019 5:44:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=0 took 1123 ms
Mar 17, 2019 5:44:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=3 took 9544 ms
Mar 17, 2019 5:44:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
Mar 17, 2019 5:44:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=0 took 1019 ms
Mar 17, 2019 5:44:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/536) took 10459 ms. Total solver calls (SAT/UNSAT): 1160(49/1111)
Mar 17, 2019 5:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=3 took 3959 ms
Mar 17, 2019 5:44:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/536) took 13669 ms. Total solver calls (SAT/UNSAT): 1511(49/1462)
Mar 17, 2019 5:44:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/536) took 16711 ms. Total solver calls (SAT/UNSAT): 1858(49/1809)
Mar 17, 2019 5:44:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-00
Mar 17, 2019 5:44:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(SAT) depth K=1 took 8859 ms
Mar 17, 2019 5:44:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=3 took 6697 ms
Mar 17, 2019 5:44:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/536) took 21054 ms. Total solver calls (SAT/UNSAT): 2371(49/2322)
Mar 17, 2019 5:44:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/536) took 24191 ms. Total solver calls (SAT/UNSAT): 2708(62/2646)
Mar 17, 2019 5:44:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/536) took 27270 ms. Total solver calls (SAT/UNSAT): 3041(88/2953)
Mar 17, 2019 5:44:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=3 took 10355 ms
Mar 17, 2019 5:44:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/536) took 30278 ms. Total solver calls (SAT/UNSAT): 3370(114/3256)
Mar 17, 2019 5:44:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=3 took 3103 ms
Mar 17, 2019 5:44:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=3 took 2100 ms
Mar 17, 2019 5:44:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/536) took 34682 ms. Total solver calls (SAT/UNSAT): 3856(153/3703)
Mar 17, 2019 5:44:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
Mar 17, 2019 5:44:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=1 took 16642 ms
Mar 17, 2019 5:44:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=3 took 3548 ms
Mar 17, 2019 5:44:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/536) took 39026 ms. Total solver calls (SAT/UNSAT): 4333(189/4144)
Mar 17, 2019 5:44:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/536) took 43402 ms. Total solver calls (SAT/UNSAT): 4801(225/4576)
Mar 17, 2019 5:44:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=3 took 8524 ms
Mar 17, 2019 5:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/536) took 47658 ms. Total solver calls (SAT/UNSAT): 5260(260/5000)
Mar 17, 2019 5:45:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/536) took 51903 ms. Total solver calls (SAT/UNSAT): 5710(293/5417)
Mar 17, 2019 5:45:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=3 took 5617 ms
Mar 17, 2019 5:45:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/536) took 56043 ms. Total solver calls (SAT/UNSAT): 6151(326/5825)
Mar 17, 2019 5:45:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/536) took 60014 ms. Total solver calls (SAT/UNSAT): 6583(357/6226)
Mar 17, 2019 5:45:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-02
Mar 17, 2019 5:45:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(SAT) depth K=1 took 26204 ms
Mar 17, 2019 5:45:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/536) took 63914 ms. Total solver calls (SAT/UNSAT): 7006(387/6619)
Mar 17, 2019 5:45:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
Mar 17, 2019 5:45:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=1 took 3143 ms
Mar 17, 2019 5:45:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=3 took 13080 ms
Mar 17, 2019 5:45:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
Mar 17, 2019 5:45:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=1 took 2398 ms
Mar 17, 2019 5:45:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/536) took 67819 ms. Total solver calls (SAT/UNSAT): 7420(417/7003)
Mar 17, 2019 5:45:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/536) took 71639 ms. Total solver calls (SAT/UNSAT): 7825(444/7381)
Mar 17, 2019 5:45:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/536) took 75346 ms. Total solver calls (SAT/UNSAT): 8221(471/7750)
Mar 17, 2019 5:45:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/536) took 78862 ms. Total solver calls (SAT/UNSAT): 8608(497/8111)
Mar 17, 2019 5:45:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/536) took 82322 ms. Total solver calls (SAT/UNSAT): 8986(521/8465)
Mar 17, 2019 5:45:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/536) took 85719 ms. Total solver calls (SAT/UNSAT): 9355(545/8810)
Mar 17, 2019 5:45:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
Mar 17, 2019 5:45:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=1 took 20655 ms
Mar 17, 2019 5:45:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/536) took 89063 ms. Total solver calls (SAT/UNSAT): 9715(567/9148)
Mar 17, 2019 5:45:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/536) took 92334 ms. Total solver calls (SAT/UNSAT): 10066(588/9478)
Mar 17, 2019 5:45:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/536) took 95503 ms. Total solver calls (SAT/UNSAT): 10408(609/9799)
Mar 17, 2019 5:45:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/536) took 100575 ms. Total solver calls (SAT/UNSAT): 10981(609/10372)
Mar 17, 2019 5:45:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/536) took 104411 ms. Total solver calls (SAT/UNSAT): 11266(609/10657)
Mar 17, 2019 5:45:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/536) took 107413 ms. Total solver calls (SAT/UNSAT): 11550(609/10941)
Mar 17, 2019 5:46:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/536) took 112361 ms. Total solver calls (SAT/UNSAT): 12115(609/11506)
Mar 17, 2019 5:46:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/536) took 117343 ms. Total solver calls (SAT/UNSAT): 12676(636/12040)
Mar 17, 2019 5:46:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/536) took 122583 ms. Total solver calls (SAT/UNSAT): 13233(690/12543)
Mar 17, 2019 5:46:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/536) took 127970 ms. Total solver calls (SAT/UNSAT): 13786(744/13042)
Mar 17, 2019 5:46:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
Mar 17, 2019 5:46:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=1 took 45389 ms
Mar 17, 2019 5:46:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/536) took 132910 ms. Total solver calls (SAT/UNSAT): 14335(798/13537)
Mar 17, 2019 5:46:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
Mar 17, 2019 5:46:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=1 took 3607 ms
Mar 17, 2019 5:46:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/536) took 137770 ms. Total solver calls (SAT/UNSAT): 14880(850/14030)
Mar 17, 2019 5:46:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/536) took 143194 ms. Total solver calls (SAT/UNSAT): 15421(902/14519)
Mar 17, 2019 5:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(UNSAT) depth K=4 took 80043 ms
Mar 17, 2019 5:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
Mar 17, 2019 5:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=1 took 9769 ms
Mar 17, 2019 5:46:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/536) took 148314 ms. Total solver calls (SAT/UNSAT): 15958(954/15004)
Mar 17, 2019 5:46:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/536) took 153239 ms. Total solver calls (SAT/UNSAT): 16491(1005/15486)
Mar 17, 2019 5:46:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/536) took 158255 ms. Total solver calls (SAT/UNSAT): 17020(1055/15965)
Mar 17, 2019 5:46:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/536) took 163207 ms. Total solver calls (SAT/UNSAT): 17545(1105/16440)
Mar 17, 2019 5:46:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/536) took 168150 ms. Total solver calls (SAT/UNSAT): 18066(1155/16911)
Mar 17, 2019 5:47:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
Mar 17, 2019 5:47:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=1 took 24541 ms
Mar 17, 2019 5:47:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/536) took 172790 ms. Total solver calls (SAT/UNSAT): 18583(1203/17380)
Mar 17, 2019 5:47:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/536) took 177507 ms. Total solver calls (SAT/UNSAT): 19096(1251/17845)
Mar 17, 2019 5:47:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
Mar 17, 2019 5:47:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=1 took 7461 ms
Mar 17, 2019 5:47:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/536) took 182139 ms. Total solver calls (SAT/UNSAT): 19605(1299/18306)
Mar 17, 2019 5:47:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
Mar 17, 2019 5:47:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=1 took 5217 ms
Mar 17, 2019 5:47:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/536) took 186991 ms. Total solver calls (SAT/UNSAT): 20110(1346/18764)
Mar 17, 2019 5:47:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/536) took 191547 ms. Total solver calls (SAT/UNSAT): 20611(1392/19219)
Mar 17, 2019 5:47:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-00
Mar 17, 2019 5:47:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-00(SAT) depth K=2 took 9296 ms
Mar 17, 2019 5:47:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/536) took 196079 ms. Total solver calls (SAT/UNSAT): 21108(1438/19670)
Mar 17, 2019 5:47:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/536) took 200687 ms. Total solver calls (SAT/UNSAT): 21601(1484/20117)
Mar 17, 2019 5:47:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=4 took 58911 ms
Mar 17, 2019 5:47:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/536) took 205123 ms. Total solver calls (SAT/UNSAT): 22090(1528/20562)
Mar 17, 2019 5:47:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/536) took 209652 ms. Total solver calls (SAT/UNSAT): 22575(1572/21003)
Mar 17, 2019 5:47:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/536) took 214118 ms. Total solver calls (SAT/UNSAT): 23056(1616/21440)
Mar 17, 2019 5:47:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/536) took 218526 ms. Total solver calls (SAT/UNSAT): 23533(1659/21874)
Mar 17, 2019 5:47:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/536) took 222827 ms. Total solver calls (SAT/UNSAT): 24006(1701/22305)
Mar 17, 2019 5:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/536) took 227042 ms. Total solver calls (SAT/UNSAT): 24475(1743/22732)
Mar 17, 2019 5:48:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/536) took 231270 ms. Total solver calls (SAT/UNSAT): 24940(1785/23155)
Mar 17, 2019 5:48:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/536) took 234386 ms. Total solver calls (SAT/UNSAT): 25273(1799/23474)
Mar 17, 2019 5:48:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/536) took 237490 ms. Total solver calls (SAT/UNSAT): 25606(1820/23786)
Mar 17, 2019 5:48:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/536) took 241610 ms. Total solver calls (SAT/UNSAT): 26057(1834/24223)
Mar 17, 2019 5:48:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/536) took 245819 ms. Total solver calls (SAT/UNSAT): 26512(1901/24611)
Mar 17, 2019 5:48:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/536) took 249942 ms. Total solver calls (SAT/UNSAT): 26963(1964/24999)
Mar 17, 2019 5:48:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/536) took 253995 ms. Total solver calls (SAT/UNSAT): 27410(2023/25387)
Mar 17, 2019 5:48:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/536) took 258003 ms. Total solver calls (SAT/UNSAT): 27853(2051/25802)
Mar 17, 2019 5:48:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/536) took 261967 ms. Total solver calls (SAT/UNSAT): 28292(2104/26188)
Mar 17, 2019 5:48:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/536) took 266201 ms. Total solver calls (SAT/UNSAT): 28727(2153/26574)
Mar 17, 2019 5:48:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/536) took 270165 ms. Total solver calls (SAT/UNSAT): 29158(2198/26960)
Mar 17, 2019 5:48:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/536) took 273965 ms. Total solver calls (SAT/UNSAT): 29585(2219/27366)
Mar 17, 2019 5:48:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(170/536) took 277683 ms. Total solver calls (SAT/UNSAT): 30008(2219/27789)
Mar 17, 2019 5:48:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/536) took 281411 ms. Total solver calls (SAT/UNSAT): 30427(2219/28208)
Mar 17, 2019 5:48:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/536) took 285031 ms. Total solver calls (SAT/UNSAT): 30842(2219/28623)
Mar 17, 2019 5:48:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/536) took 288567 ms. Total solver calls (SAT/UNSAT): 31253(2239/29014)
Mar 17, 2019 5:49:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(178/536) took 292233 ms. Total solver calls (SAT/UNSAT): 31660(2279/29381)
Mar 17, 2019 5:49:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/536) took 295775 ms. Total solver calls (SAT/UNSAT): 32063(2319/29744)
Mar 17, 2019 5:49:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/536) took 299301 ms. Total solver calls (SAT/UNSAT): 32462(2359/30103)
Mar 17, 2019 5:49:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/536) took 302795 ms. Total solver calls (SAT/UNSAT): 32857(2398/30459)
Mar 17, 2019 5:49:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(186/536) took 306253 ms. Total solver calls (SAT/UNSAT): 33248(2436/30812)
Mar 17, 2019 5:49:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/536) took 309715 ms. Total solver calls (SAT/UNSAT): 33635(2474/31161)
Mar 17, 2019 5:49:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/536) took 313097 ms. Total solver calls (SAT/UNSAT): 34018(2512/31506)
Mar 17, 2019 5:49:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/536) took 316475 ms. Total solver calls (SAT/UNSAT): 34397(2549/31848)
Mar 17, 2019 5:49:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/536) took 319803 ms. Total solver calls (SAT/UNSAT): 34772(2585/32187)
Mar 17, 2019 5:49:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(196/536) took 323159 ms. Total solver calls (SAT/UNSAT): 35143(2621/32522)
Mar 17, 2019 5:49:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(198/536) took 326475 ms. Total solver calls (SAT/UNSAT): 35510(2657/32853)
Mar 17, 2019 5:49:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(200/536) took 329775 ms. Total solver calls (SAT/UNSAT): 35873(2692/33181)
Mar 17, 2019 5:49:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/536) took 333017 ms. Total solver calls (SAT/UNSAT): 36232(2726/33506)
Mar 17, 2019 5:49:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/536) took 336169 ms. Total solver calls (SAT/UNSAT): 36587(2760/33827)
Mar 17, 2019 5:49:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/536) took 339427 ms. Total solver calls (SAT/UNSAT): 36938(2794/34144)
Mar 17, 2019 5:49:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/536) took 342614 ms. Total solver calls (SAT/UNSAT): 37285(2827/34458)
Mar 17, 2019 5:49:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/536) took 345619 ms. Total solver calls (SAT/UNSAT): 37628(2859/34769)
Mar 17, 2019 5:49:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(213/536) took 350115 ms. Total solver calls (SAT/UNSAT): 38135(2907/35228)
Mar 17, 2019 5:50:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=4 took 146471 ms
Mar 17, 2019 5:50:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/536) took 354501 ms. Total solver calls (SAT/UNSAT): 38633(2954/35679)
Mar 17, 2019 5:50:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/536) took 358879 ms. Total solver calls (SAT/UNSAT): 39122(2999/36123)
Mar 17, 2019 5:50:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(222/536) took 363158 ms. Total solver calls (SAT/UNSAT): 39602(3044/36558)
Mar 17, 2019 5:50:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/536) took 367367 ms. Total solver calls (SAT/UNSAT): 40073(3087/36986)
Mar 17, 2019 5:50:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/536) took 371425 ms. Total solver calls (SAT/UNSAT): 40535(3129/37406)
Mar 17, 2019 5:50:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/536) took 375459 ms. Total solver calls (SAT/UNSAT): 40988(3171/37817)
Mar 17, 2019 5:50:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/536) took 378823 ms. Total solver calls (SAT/UNSAT): 41354(3171/38183)
Mar 17, 2019 5:50:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(239/536) took 381905 ms. Total solver calls (SAT/UNSAT): 41704(3178/38526)
Mar 17, 2019 5:50:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/536) took 385623 ms. Total solver calls (SAT/UNSAT): 42119(3208/38911)
Mar 17, 2019 5:50:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(249/536) took 389109 ms. Total solver calls (SAT/UNSAT): 42509(3236/39273)
Mar 17, 2019 5:50:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/536) took 392491 ms. Total solver calls (SAT/UNSAT): 42874(3261/39613)
Mar 17, 2019 5:50:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(259/536) took 395571 ms. Total solver calls (SAT/UNSAT): 43214(3282/39932)
Mar 17, 2019 5:50:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(265/536) took 399051 ms. Total solver calls (SAT/UNSAT): 43589(3304/40285)
Mar 17, 2019 5:50:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/536) took 402203 ms. Total solver calls (SAT/UNSAT): 43928(3322/40606)
Mar 17, 2019 5:50:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(278/536) took 405494 ms. Total solver calls (SAT/UNSAT): 44278(3336/40942)
Mar 17, 2019 5:50:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(286/536) took 408693 ms. Total solver calls (SAT/UNSAT): 44618(3345/41273)
Mar 17, 2019 5:51:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(296/536) took 412047 ms. Total solver calls (SAT/UNSAT): 44985(3374/41611)
Mar 17, 2019 5:51:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
Mar 17, 2019 5:51:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=2 took 222167 ms
Mar 17, 2019 5:51:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(306/536) took 415103 ms. Total solver calls (SAT/UNSAT): 45324(3395/41929)
Mar 17, 2019 5:51:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/536) took 418211 ms. Total solver calls (SAT/UNSAT): 45663(3395/42268)
Mar 17, 2019 5:51:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(328/536) took 421383 ms. Total solver calls (SAT/UNSAT): 46006(3464/42542)
Mar 17, 2019 5:51:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(339/536) took 424507 ms. Total solver calls (SAT/UNSAT): 46338(3555/42783)
Mar 17, 2019 5:51:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(351/536) took 427658 ms. Total solver calls (SAT/UNSAT): 46674(3629/43045)
Mar 17, 2019 5:51:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(363/536) took 430885 ms. Total solver calls (SAT/UNSAT): 47006(3691/43315)
Mar 17, 2019 5:51:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(376/536) took 433890 ms. Total solver calls (SAT/UNSAT): 47323(3731/43592)
Mar 17, 2019 5:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(385/536) took 437605 ms. Total solver calls (SAT/UNSAT): 47715(3731/43984)
Mar 17, 2019 5:51:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(388/536) took 440987 ms. Total solver calls (SAT/UNSAT): 48096(3731/44365)
Mar 17, 2019 5:51:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(391/536) took 444327 ms. Total solver calls (SAT/UNSAT): 48468(3745/44723)
Mar 17, 2019 5:51:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=4 took 95411 ms
Mar 17, 2019 5:51:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(394/536) took 447627 ms. Total solver calls (SAT/UNSAT): 48831(3784/45047)
Mar 17, 2019 5:51:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(397/536) took 450769 ms. Total solver calls (SAT/UNSAT): 49185(3823/45362)
Mar 17, 2019 5:51:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(400/536) took 453834 ms. Total solver calls (SAT/UNSAT): 49530(3861/45669)
Mar 17, 2019 5:51:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(403/536) took 456891 ms. Total solver calls (SAT/UNSAT): 49866(3897/45969)
Mar 17, 2019 5:51:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(407/536) took 460815 ms. Total solver calls (SAT/UNSAT): 50300(3945/46355)
Mar 17, 2019 5:51:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(411/536) took 464473 ms. Total solver calls (SAT/UNSAT): 50718(3989/46729)
Mar 17, 2019 5:51:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(415/536) took 468117 ms. Total solver calls (SAT/UNSAT): 51120(4033/47087)
Mar 17, 2019 5:52:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(419/536) took 471581 ms. Total solver calls (SAT/UNSAT): 51506(4073/47433)
Mar 17, 2019 5:52:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(423/536) took 474787 ms. Total solver calls (SAT/UNSAT): 51876(4113/47763)
Mar 17, 2019 5:52:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(427/536) took 478063 ms. Total solver calls (SAT/UNSAT): 52230(4149/48081)
Mar 17, 2019 5:52:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(431/536) took 481182 ms. Total solver calls (SAT/UNSAT): 52568(4185/48383)
Mar 17, 2019 5:52:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(436/536) took 484775 ms. Total solver calls (SAT/UNSAT): 52968(4225/48743)
Mar 17, 2019 5:52:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(441/536) took 488089 ms. Total solver calls (SAT/UNSAT): 53343(4256/49087)
Mar 17, 2019 5:52:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(446/536) took 491283 ms. Total solver calls (SAT/UNSAT): 53693(4291/49402)
Mar 17, 2019 5:52:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(458/536) took 494621 ms. Total solver calls (SAT/UNSAT): 54060(4298/49762)
Mar 17, 2019 5:52:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(464/536) took 497911 ms. Total solver calls (SAT/UNSAT): 54417(4304/50113)
Mar 17, 2019 5:52:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(471/536) took 501315 ms. Total solver calls (SAT/UNSAT): 54788(4346/50442)
Mar 17, 2019 5:52:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(479/536) took 504619 ms. Total solver calls (SAT/UNSAT): 55152(4386/50766)
Mar 17, 2019 5:52:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(488/536) took 507661 ms. Total solver calls (SAT/UNSAT): 55485(4421/51064)
Mar 17, 2019 5:52:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(500/536) took 510691 ms. Total solver calls (SAT/UNSAT): 55803(4452/51351)
Mar 17, 2019 5:52:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 513037 ms. Total solver calls (SAT/UNSAT): 56020(4466/51554)
Mar 17, 2019 5:52:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 536 transitions.
Mar 17, 2019 5:52:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 92 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 5:52:43 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 557720ms conformant to PINS in folder :/home/mcc/execution
Mar 17, 2019 5:52:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=4 took 72564 ms
Mar 17, 2019 5:54:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-02
Mar 17, 2019 5:54:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(SAT) depth K=2 took 230792 ms
Mar 17, 2019 5:57:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=4 took 304039 ms
Mar 17, 2019 5:59:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
Mar 17, 2019 5:59:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=2 took 275817 ms
Mar 17, 2019 6:01:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=4 took 217747 ms
Mar 17, 2019 6:03:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=4 took 120803 ms
Mar 17, 2019 6:04:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=4 took 62200 ms
Mar 17, 2019 6:08:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
Mar 17, 2019 6:08:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=2 took 564630 ms
Mar 17, 2019 6:09:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=4 took 271192 ms
ITS-tools command line returned an error code 137
Mar 17, 2019 6:11:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=4 took 116447 ms
Mar 17, 2019 6:11:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
Mar 17, 2019 6:11:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=2 took 169069 ms
Mar 17, 2019 6:14:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=4 took 180454 ms
Mar 17, 2019 6:16:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
Mar 17, 2019 6:16:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=3 took 302223 ms
Mar 17, 2019 6:21:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=5 took 474915 ms
Mar 17, 2019 6:34:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
Mar 17, 2019 6:34:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=3 took 1075647 ms
Mar 17, 2019 6:34:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=5 took 772485 ms
Mar 17, 2019 6:37:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
Mar 17, 2019 6:37:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=3 took 158015 ms
Mar 17, 2019 6:38:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=5 took 234758 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r096-smll-155246587300233"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;