Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r085-csrt-155246554600539.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is GlobalResAllocation-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r085-csrt-155246554600539
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 136M
-rw-r--r-- 1 mcc users 13K Feb 11 01:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Feb 11 01:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.3M Feb 7 01:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 26M Feb 7 01:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 9.2K Feb 4 23:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 4 23:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4M Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 11M Feb 4 22:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 3 08:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 37K Feb 3 08:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.7M Jan 31 03:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15M Jan 31 03:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.3K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.7K Feb 4 22:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 70M Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552790323572

Working with output stream class java.io.PrintStream
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-00 with value :(!((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)<=((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-01 with value :(!(((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=1)||((((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)>=2)||((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)>=1))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-03 with value :(!((((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=3)&&(((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=2)))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-04 with value :((((((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)<=(((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9))||(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)))||(!(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)>=3)))||(!(((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)>=3)&&(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)>=1))))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-05 with value :(((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=3)
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-06 with value :((((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=3)||((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)<=((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-07 with value :((((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=(((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9))||(((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=2)&&(!((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)<=((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-08 with value :((in_critical_s_5_4>=1)&&(((in_critical_s_5_1<=Resources_7)||(Resources_5<=in_critical_s_2_7))&&((pr_in_3>=1)&&(in_critical_s_4_5<=in_critical_s_1_10))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-09 with value :(Processes_4>=3)
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-10 with value :(Processes_4>=3)
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-11 with value :((((Resources_4>=3)&&(in_critical_s_5_5>=1))||((pr_released_5<=Resources_3)||(in_critical_s_2_5<=pr_released_4)))||(!(in_critical_s_2_5>=1)))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-12 with value :((((in_critical_s_4_1>=2)&&(pr_released_4<=pr_in_5))||((in_critical_s_5_6>=2)||(in_critical_s_5_8>=1)))&&((Processes_2<=in_critical_s_5_2)&&((in_critical_s_5_7>=1)&&(in_critical_s_4_1>=1))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-13 with value :((((in_critical_s_1_7>=3)&&(Resources_3<=in_critical_s_3_8))&&(Processes_2<=in_critical_s_2_4))&&((!(in_critical_s_3_6>=3))&&((Resources_10>=3)||(in_critical_s_1_10<=in_critical_s_1_5))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-14 with value :((in_critical_s_5_2<=in_critical_s_5_5)&&(((in_critical_s_2_7>=3)&&(Resources_4<=Resources_1))&&((in_critical_s_2_7>=1)||(Processes_2<=pr_released_5))))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-15 with value :(in_critical_s_2_8<=Processes_4)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 5280
// Phase 1: matrix 5280 rows 75 cols
invariant :Resources_8 + in_critical_s_3_8 + in_critical_s_2_8 + in_critical_s_1_8 + in_critical_s_5_8 + in_critical_s_4_8 = 1
invariant :4'Processes_3 + in_critical_s_3_1 + in_critical_s_3_2 + in_critical_s_3_3 + in_critical_s_3_4 + in_critical_s_3_5 + in_critical_s_3_6 + in_critical_s_3_7 + in_critical_s_3_8 + in_critical_s_3_9 + in_critical_s_3_10 + pr_released_3 = 4
invariant :4'Processes_2 + in_critical_s_2_1 + in_critical_s_2_2 + in_critical_s_2_3 + in_critical_s_2_4 + in_critical_s_2_5 + in_critical_s_2_6 + in_critical_s_2_7 + in_critical_s_2_8 + in_critical_s_2_9 + in_critical_s_2_10 + pr_released_2 = 4
invariant :4'Processes_5 + pr_released_5 + pr_in_5 = 4
invariant :Resources_3 + -1'in_critical_s_1_1 + -1'in_critical_s_4_1 + -1'in_critical_s_1_2 + -1'in_critical_s_4_2 + in_critical_s_2_3 + in_critical_s_3_3 + in_critical_s_5_3 + -1'in_critical_s_1_4 + -1'in_critical_s_1_5 + -1'in_critical_s_4_4 + -1'in_critical_s_1_6 + -1'in_critical_s_4_5 + -1'in_critical_s_4_6 + -1'in_critical_s_4_7 + -1'in_critical_s_1_7 + -1'in_critical_s_1_8 + -1'in_critical_s_1_9 + -1'in_critical_s_4_8 + -1'in_critical_s_1_10 + -1'in_critical_s_4_9 + pr_in_1 + pr_in_4 + -1'in_critical_s_4_10 = 1
invariant :4'Processes_5 + in_critical_s_5_1 + in_critical_s_5_2 + in_critical_s_5_3 + in_critical_s_5_4 + in_critical_s_5_5 + in_critical_s_5_6 + in_critical_s_5_7 + in_critical_s_5_8 + in_critical_s_5_9 + in_critical_s_5_10 + pr_released_5 = 4
invariant :-1'in_critical_s_2_1 + -1'in_critical_s_2_2 + -1'in_critical_s_2_3 + -1'in_critical_s_2_4 + -1'in_critical_s_2_5 + -1'in_critical_s_2_6 + -1'in_critical_s_2_7 + -1'in_critical_s_2_8 + -1'in_critical_s_2_9 + pr_in_2 + -1'in_critical_s_2_10 = 0
invariant :4'Processes_4 + pr_in_4 + pr_released_4 = 4
invariant :Resources_10 + in_critical_s_1_10 + in_critical_s_2_10 + in_critical_s_3_10 + in_critical_s_4_10 + in_critical_s_5_10 = 1
invariant :Resources_9 + in_critical_s_2_9 + in_critical_s_1_9 + in_critical_s_5_9 + in_critical_s_4_9 + in_critical_s_3_9 = 1
invariant :Resources_2 + in_critical_s_1_2 + in_critical_s_3_2 + in_critical_s_2_2 + in_critical_s_5_2 + in_critical_s_4_2 = 1
invariant :Resources_5 + in_critical_s_1_5 + in_critical_s_2_5 + in_critical_s_5_5 + in_critical_s_3_5 + in_critical_s_4_5 = 1
invariant :4'Processes_1 + pr_in_1 + pr_released_1 = 4
invariant :Resources_6 + in_critical_s_1_6 + in_critical_s_4_6 + in_critical_s_5_6 + in_critical_s_2_6 + in_critical_s_3_6 = 1
invariant :in_critical_s_4_1 + in_critical_s_4_2 + in_critical_s_4_3 + in_critical_s_4_4 + in_critical_s_4_5 + in_critical_s_4_6 + in_critical_s_4_7 + in_critical_s_4_8 + in_critical_s_4_9 + -1'pr_in_4 + in_critical_s_4_10 = 0
invariant :-4'Processes_3 + -4'Processes_5 + Resources_4 + -1'in_critical_s_3_1 + -1'in_critical_s_5_1 + -1'in_critical_s_3_2 + -1'in_critical_s_5_2 + -1'in_critical_s_3_3 + in_critical_s_2_4 + -1'in_critical_s_5_3 + in_critical_s_1_4 + in_critical_s_4_4 + -1'in_critical_s_5_5 + -1'in_critical_s_3_5 + -1'in_critical_s_5_6 + -1'in_critical_s_3_6 + -1'in_critical_s_3_7 + -1'in_critical_s_3_8 + -1'in_critical_s_5_7 + -1'in_critical_s_5_8 + -1'in_critical_s_5_9 + -1'in_critical_s_3_9 + -1'in_critical_s_3_10 + -1'in_critical_s_5_10 + -1'pr_released_5 + -1'pr_released_3 = -7
invariant :Resources_7 + in_critical_s_4_7 + in_critical_s_3_7 + in_critical_s_2_7 + in_critical_s_1_7 + in_critical_s_5_7 = 1
invariant :Resources_1 + in_critical_s_2_1 + in_critical_s_1_1 + in_critical_s_4_1 + in_critical_s_3_1 + in_critical_s_5_1 = 1
invariant :in_critical_s_1_1 + in_critical_s_1_2 + in_critical_s_1_3 + in_critical_s_1_4 + in_critical_s_1_5 + in_critical_s_1_6 + in_critical_s_1_7 + in_critical_s_1_8 + in_critical_s_1_9 + in_critical_s_1_10 + -1'pr_in_1 = 0
invariant :4'Processes_3 + pr_in_3 + pr_released_3 = 4
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation\_PT\_05\_flat\_flat,1.06604e+08,2453.66,5615144,2,175538,5,9.46956e+06,6,0,7776,3.16832e+06,0
Total reachable state count : 106603672

Verifying 15 reachability properties.
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-00 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-00,1,2453.75,5615176,2,76,6,9.46956e+06,7,0,7792,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-01,0,2608.57,5612044,1,0,6,9.46956e+06,8,0,194568,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-03 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-03,1,2608.58,5613748,2,76,6,9.46956e+06,9,0,194575,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-04 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-04,0,2611.08,5614316,1,0,6,9.46956e+06,10,0,194953,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-05 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-05,1,2611.09,5614320,2,76,6,9.46956e+06,11,0,194953,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-06 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-06,1,2611.09,5614320,2,76,6,9.46956e+06,12,0,195010,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-07 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-07,1,2611.1,5614324,2,76,6,9.46956e+06,13,0,195029,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-08 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-08,18,2611.16,5614324,2,309,7,9.46956e+06,14,0,195045,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-09 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-09,0,2611.23,5614324,1,0,7,9.46956e+06,15,0,195046,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-10 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-10,0,2611.23,5614324,1,0,7,9.46956e+06,15,0,195046,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-11 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-11,2.45869e+06,2612.65,5614324,2,79022,8,9.46956e+06,16,0,195080,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-12 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-12,59416,2612.9,5614324,2,15275,9,9.46956e+06,17,0,195097,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-13 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-13,0,2613.59,5614324,1,0,9,9.46956e+06,18,0,195109,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-14 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-14,0,2614.41,5614324,1,0,9,9.46956e+06,19,0,195119,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-15 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-15,7470,2614.45,5614324,2,8232,10,9.46956e+06,20,0,195125,3.16832e+06,0

BK_STOP 1552793024345

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 17, 2019 2:38:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 17, 2019 2:38:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 17, 2019 2:38:49 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 2724 ms
Mar 17, 2019 2:38:49 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 75 places.
Mar 17, 2019 2:38:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 56105 transitions.
Mar 17, 2019 2:39:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 13046 ms
Mar 17, 2019 2:39:39 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
Mar 17, 2019 2:39:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (56105) to apply POR reductions. Disabling POR matrices.
Mar 17, 2019 2:39:41 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 28348 ms
Mar 17, 2019 2:39:43 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 25996 ms
Mar 17, 2019 2:39:44 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 969 ms
Mar 17, 2019 2:39:44 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 7 ms
Mar 17, 2019 2:39:51 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 33531ms conformant to PINS in folder :/home/mcc/execution
Mar 17, 2019 2:39:53 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
Mar 17, 2019 2:40:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 59890 ms.
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 389 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-01(UNSAT) depth K=0 took 43 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-03(UNSAT) depth K=0 took 88 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 96 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-05(UNSAT) depth K=0 took 27 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(UNSAT) depth K=0 took 55 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(UNSAT) depth K=0 took 20 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-08(UNSAT) depth K=0 took 52 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-10(UNSAT) depth K=0 took 29 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-11(UNSAT) depth K=0 took 13 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-12(UNSAT) depth K=0 took 23 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-13(UNSAT) depth K=0 took 6 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-14(UNSAT) depth K=0 took 36 ms
Mar 17, 2019 2:40:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-15(UNSAT) depth K=0 took 8 ms
Mar 17, 2019 2:40:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
Mar 17, 2019 2:41:21 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 20 place invariants in 1245 ms
Mar 17, 2019 2:43:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(UNSAT) depth K=1 took 158310 ms
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)
Mar 17, 2019 2:49:31 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 75 variables to be positive in 491809 ms
Mar 17, 2019 2:50:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-00
Mar 17, 2019 2:50:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(SAT) depth K=0 took 65227 ms
Mar 17, 2019 2:58:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-01(UNSAT) depth K=1 took 926863 ms
Mar 17, 2019 3:00:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-03(UNSAT) depth K=1 took 75374 ms
Mar 17, 2019 3:05:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-04(UNSAT) depth K=1 took 309314 ms
Mar 17, 2019 3:06:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-05(UNSAT) depth K=1 took 62412 ms
Mar 17, 2019 3:07:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(UNSAT) depth K=1 took 76666 ms
Mar 17, 2019 3:09:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(UNSAT) depth K=1 took 96148 ms
Mar 17, 2019 3:09:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-08(UNSAT) depth K=1 took 19792 ms
Mar 17, 2019 3:09:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-09(UNSAT) depth K=1 took 18986 ms
Mar 17, 2019 3:10:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-10(UNSAT) depth K=1 took 17572 ms
Mar 17, 2019 3:10:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-11(UNSAT) depth K=1 took 17156 ms
Mar 17, 2019 3:10:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-12(UNSAT) depth K=1 took 15316 ms
Mar 17, 2019 3:11:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-13(UNSAT) depth K=1 took 23726 ms
Mar 17, 2019 3:11:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-14(UNSAT) depth K=1 took 22886 ms
Mar 17, 2019 3:11:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-15(UNSAT) depth K=1 took 20903 ms
Mar 17, 2019 3:14:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate GlobalResAllocation-PT-05-ReachabilityCardinality-01
Mar 17, 2019 3:14:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-PT-05-ReachabilityCardinality-01
Mar 17, 2019 3:14:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-01(FALSE) depth K=0 took 1436138 ms
Mar 17, 2019 3:15:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-03
Mar 17, 2019 3:15:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-03(SAT) depth K=0 took 42566 ms
virtual memory exhausted: Cannot allocate memory
Mar 17, 2019 3:22:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant GlobalResAllocation-PT-05-ReachabilityCardinality-04
Mar 17, 2019 3:22:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-PT-05-ReachabilityCardinality-04
Mar 17, 2019 3:22:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-04(TRUE) depth K=0 took 433635 ms
Mar 17, 2019 3:23:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-05
Mar 17, 2019 3:23:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-05(SAT) depth K=0 took 32123 ms
Mar 17, 2019 3:23:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-06
Mar 17, 2019 3:23:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(SAT) depth K=0 took 22121 ms
Mar 17, 2019 3:23:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-07
Mar 17, 2019 3:23:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(SAT) depth K=0 took 19242 ms
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-PT-05-ReachabilityCardinality-00 SMT depth 2
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
Mar 17, 2019 3:23:43 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 2/ 15 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is GlobalResAllocation-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r085-csrt-155246554600539"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-05.tgz
mv GlobalResAllocation-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;