Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r085-csrt-155246554500476.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r085-csrt-155246554500476
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 4.3K Feb 11 01:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 11 01:37 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 7 01:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 7 01:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 113 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 351 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.5K Feb 4 23:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.7K Feb 4 23:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K Feb 4 22:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 3 08:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 3 08:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Jan 31 03:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K Jan 31 03:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 4 22:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 28K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552787162877

01:46:05.622 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
01:46:05.625 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-00 with value :(!((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)<=((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)))
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-01 with value :(!(((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)>=1)||((((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)>=2)||((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)>=1))))
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-03 with value :(!((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=3)&&(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=2)))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-04 with value :((((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9))||(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)))||(!(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)>=3)))||(!(((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)>=3)&&(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)>=1))))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-05 with value :(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=3)
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-06 with value :((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=3)||((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)<=((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-07 with value :((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9))||(((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)>=2)&&(!((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)<=((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)))))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-08 with value :((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)>=2)&&(!(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)>=1)))||(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)))
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-09 with value :((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)>=3)&&(((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9))&&((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)<=((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)))&&(!((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)>=3))))
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-10 with value :((!((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=3)||(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)<=((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4))))&&(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-11 with value :((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9))||(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)>=3))
Read [invariant] property : GlobalResAllocation-COL-05-ReachabilityCardinality-12 with value :(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)>=1)
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-13 with value :((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)<=((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4))
Read [reachable] property : GlobalResAllocation-COL-05-ReachabilityCardinality-15 with value :((!((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)>=2))&&(!((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=((((processes_0+processes_1)+processes_2)+processes_3)+processes_4))||(((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)<=(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)))))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 5280
// Phase 1: matrix 5280 rows 75 cols
invariant :resources_6 + incriticals_6 + incriticals_16 + incriticals_26 + incriticals_36 + incriticals_46 = 1
invariant :4'processes_3 + incriticals_30 + incriticals_31 + incriticals_32 + incriticals_33 + incriticals_34 + incriticals_35 + incriticals_36 + incriticals_37 + incriticals_38 + incriticals_39 + prreleased_3 = 4
invariant :-4'processes_3 + resources_1 + prin_2 + incriticals_1 + incriticals_11 + -1'incriticals_20 + -1'incriticals_22 + -1'incriticals_23 + -1'incriticals_24 + -1'incriticals_25 + -1'incriticals_26 + -1'incriticals_27 + -1'incriticals_28 + -1'incriticals_29 + -1'incriticals_30 + -1'incriticals_32 + -1'incriticals_33 + -1'incriticals_34 + -1'incriticals_35 + -1'incriticals_36 + -1'incriticals_37 + -1'incriticals_38 + -1'incriticals_39 + incriticals_41 + -1'prreleased_3 = -3
invariant :resources_5 + incriticals_5 + incriticals_15 + incriticals_25 + incriticals_35 + incriticals_45 = 1
invariant :resources_2 + incriticals_2 + incriticals_12 + incriticals_22 + incriticals_32 + incriticals_42 = 1
invariant :resources_0 + incriticals_0 + incriticals_10 + incriticals_20 + incriticals_30 + incriticals_40 = 1
invariant :4'processes_1 + incriticals_10 + incriticals_11 + incriticals_12 + incriticals_13 + incriticals_14 + incriticals_15 + incriticals_16 + incriticals_17 + incriticals_18 + incriticals_19 + prreleased_1 = 4
invariant :resources_9 + incriticals_9 + incriticals_19 + incriticals_29 + incriticals_39 + incriticals_49 = 1
invariant :resources_8 + incriticals_8 + incriticals_18 + incriticals_28 + incriticals_38 + incriticals_48 = 1
invariant :4'processes_0 + prin_0 + prreleased_0 = 4
invariant :-4'processes_4 + resources_3 + incriticals_3 + incriticals_13 + incriticals_23 + incriticals_33 + -1'incriticals_40 + -1'incriticals_41 + -1'incriticals_42 + -1'incriticals_44 + -1'incriticals_45 + -1'incriticals_46 + -1'incriticals_47 + -1'incriticals_48 + -1'incriticals_49 + -1'prreleased_4 = -3
invariant :4'processes_4 + incriticals_40 + incriticals_41 + incriticals_42 + incriticals_43 + incriticals_44 + incriticals_45 + incriticals_46 + incriticals_47 + incriticals_48 + incriticals_49 + prreleased_4 = 4
invariant :-4'processes_1 + resources_4 + prin_0 + -1'incriticals_0 + -1'incriticals_1 + -1'incriticals_2 + -1'incriticals_3 + -1'incriticals_5 + -1'incriticals_6 + -1'incriticals_7 + -1'incriticals_8 + -1'incriticals_9 + -1'incriticals_10 + -1'incriticals_11 + -1'incriticals_12 + -1'incriticals_13 + -1'incriticals_15 + -1'incriticals_16 + -1'incriticals_17 + -1'incriticals_18 + -1'incriticals_19 + incriticals_24 + incriticals_34 + incriticals_44 + -1'prreleased_1 = -3
invariant :4'processes_1 + prin_1 + prreleased_1 = 4
invariant :-1'prin_2 + incriticals_20 + incriticals_21 + incriticals_22 + incriticals_23 + incriticals_24 + incriticals_25 + incriticals_26 + incriticals_27 + incriticals_28 + incriticals_29 = 0
invariant :4'processes_3 + prin_3 + prreleased_3 = 4
invariant :4'processes_2 + prin_2 + prreleased_2 = 4
invariant :-1'prin_0 + incriticals_0 + incriticals_1 + incriticals_2 + incriticals_3 + incriticals_4 + incriticals_5 + incriticals_6 + incriticals_7 + incriticals_8 + incriticals_9 = 0
invariant :resources_7 + incriticals_7 + incriticals_17 + incriticals_27 + incriticals_37 + incriticals_47 = 1
invariant :4'processes_4 + prin_4 + prreleased_4 = 4
Compilation finished in 188146 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 244 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation\_COL\_05\_flat\_flat,1.06604e+08,1550.24,5157900,2,186403,5,1.18218e+07,6,0,6293,4.16258e+06,0
Total reachable state count : 106603672

Verifying 14 reachability properties.
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-00 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-00,1,1550.32,5157932,2,76,6,1.18218e+07,7,0,6309,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : GlobalResAllocation-COL-05-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-01,0,1557.89,5157996,1,0,6,1.18218e+07,8,0,7012,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-03 is true.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-03,1,1557.89,5157996,2,76,6,1.18218e+07,9,0,7019,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-04 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-04,0,1561.29,5157996,1,0,6,1.18218e+07,10,0,7398,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-05 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-05,1,1561.29,5157996,2,76,6,1.18218e+07,11,0,7398,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-06 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-06,1,1561.3,5157996,2,76,6,1.18218e+07,12,0,7455,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-07 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-07,1,1561.31,5157996,2,76,6,1.18218e+07,13,0,7474,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-08 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-08,1,1561.32,5157996,2,76,7,1.18218e+07,14,0,7481,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-09 does not hold.
No reachable states exhibit your property : GlobalResAllocation-COL-05-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-09,0,1570.06,5157996,1,0,7,1.18218e+07,15,0,10192,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-10 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-COL-05-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-10,0,1584.71,5157996,1,0,7,1.18218e+07,16,0,12892,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-11 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-11,220500,1608.94,5157996,2,107453,8,1.18218e+07,17,0,18025,4.16258e+06,0
Invariant property GlobalResAllocation-COL-05-ReachabilityCardinality-12 does not hold.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-12,1,1609.31,5157996,2,76,9,1.18218e+07,18,0,18040,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-13 is true.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-05-ReachabilityCardinality-13,1,1609.34,5157996,2,76,9,1.18218e+07,18,0,18040,4.16258e+06,0
Reachability property GlobalResAllocation-COL-05-ReachabilityCardinality-15 is true.
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, GlobalResAllocationCOL05ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552790721461

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 17, 2019 1:46:05 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 17, 2019 1:46:05 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 17, 2019 1:46:05 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 883 ms
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 5 places.
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Proc->processes,prin,prreleased,
Res->resources,
PR->incriticals,

Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r2 symmetric to r1 in transition enter2
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r2 in transition enter3
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r2 symmetric to r1 in transition enter3
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r4 in transition enter4
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r4 symmetric to r2 in transition enter4
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r2 symmetric to r1 in transition enter4
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r2 symmetric to r1 in transition release2
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
Mar 17, 2019 1:46:06 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 17, 2019 1:46:06 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Mar 17, 2019 1:46:07 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 50775.0 instantiations of transitions. Total transitions/syncs built is 5350
Mar 17, 2019 1:46:10 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4327 ms
Mar 17, 2019 1:46:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 5814 ms
Mar 17, 2019 1:46:25 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 6649 ms
Mar 17, 2019 1:46:25 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 605 ms
Mar 17, 2019 1:46:25 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 78 ms
Mar 17, 2019 1:46:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 5250 transitions. Expanding to a total of 5350 deterministic transitions.
Mar 17, 2019 1:46:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 98 ms.
Mar 17, 2019 1:46:27 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (5330) to apply POR reductions. Disabling POR matrices.
Mar 17, 2019 1:46:28 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 5250 transitions. Expanding to a total of 5350 deterministic transitions.
Mar 17, 2019 1:46:28 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 47 ms.
Mar 17, 2019 1:46:29 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 7024ms conformant to PINS in folder :/home/mcc/execution
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable GlobalResAllocation-COL-05-ReachabilityCardinality-09
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 14 in 10218 ms.
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 25 ms
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-01(UNSAT) depth K=0 took 18 ms
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-03(UNSAT) depth K=0 took 6 ms
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 63 ms
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-05(UNSAT) depth K=0 took 84 ms
Mar 17, 2019 1:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-06(UNSAT) depth K=0 took 102 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-07(UNSAT) depth K=0 took 29 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-08(UNSAT) depth K=0 took 32 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-10(UNSAT) depth K=0 took 32 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-11(UNSAT) depth K=0 took 36 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-12(UNSAT) depth K=0 took 32 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-13(UNSAT) depth K=0 took 32 ms
Mar 17, 2019 1:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-15(UNSAT) depth K=0 took 28 ms
Mar 17, 2019 1:46:38 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 5250 transitions. Expanding to a total of 5350 deterministic transitions.
Mar 17, 2019 1:46:38 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 288 ms.
Mar 17, 2019 1:46:44 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 20 place invariants in 1050 ms
Mar 17, 2019 1:51:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-00(UNSAT) depth K=1 took 280326 ms
Mar 17, 2019 1:56:32 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 75 variables to be positive in 588805 ms
Mar 17, 2019 1:57:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-00
Mar 17, 2019 1:57:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-00(SAT) depth K=0 took 84511 ms
Mar 17, 2019 2:14:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-01(UNSAT) depth K=1 took 1381101 ms
Mar 17, 2019 2:17:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-03(UNSAT) depth K=1 took 193897 ms
Mar 17, 2019 2:24:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-04(UNSAT) depth K=1 took 447379 ms
Mar 17, 2019 2:25:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate GlobalResAllocation-COL-05-ReachabilityCardinality-01
Mar 17, 2019 2:25:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-COL-05-ReachabilityCardinality-01
Mar 17, 2019 2:25:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-01(FALSE) depth K=0 took 1678366 ms
Mar 17, 2019 2:26:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-03
Mar 17, 2019 2:26:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-03(SAT) depth K=0 took 29134 ms
Mar 17, 2019 2:28:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-05(UNSAT) depth K=1 took 184127 ms
Mar 17, 2019 2:32:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-06(UNSAT) depth K=1 took 270218 ms
Mar 17, 2019 2:37:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant GlobalResAllocation-COL-05-ReachabilityCardinality-04
Mar 17, 2019 2:37:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-COL-05-ReachabilityCardinality-04
Mar 17, 2019 2:37:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-04(TRUE) depth K=0 took 650219 ms
Mar 17, 2019 2:37:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-05
Mar 17, 2019 2:37:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-05(SAT) depth K=0 took 23803 ms
Mar 17, 2019 2:39:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-07(UNSAT) depth K=1 took 388125 ms
Mar 17, 2019 2:39:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-06
Mar 17, 2019 2:39:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-06(SAT) depth K=0 took 109103 ms
Mar 17, 2019 2:39:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-07
Mar 17, 2019 2:39:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-07(SAT) depth K=0 took 27014 ms
Mar 17, 2019 2:43:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-05-ReachabilityCardinality-08
Mar 17, 2019 2:43:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-08(SAT) depth K=0 took 213332 ms
Mar 17, 2019 2:44:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-05-ReachabilityCardinality-08(UNSAT) depth K=1 took 323678 ms
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-COL-05-ReachabilityCardinality-10 K-induction depth 0
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-COL-05-ReachabilityCardinality-10 SMT depth 1
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 1
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 1
Mar 17, 2019 2:45:20 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 3/ 14 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r085-csrt-155246554500476"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-05.tgz
mv GlobalResAllocation-COL-05 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;