fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r030-smll-155225126800205
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for CircularTrains-PT-192

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
9827.750 3600000.00 3727822.00 12952.20 FFT????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r030-smll-155225126800205.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is CircularTrains-PT-192, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r030-smll-155225126800205
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 308K
-rw-r--r-- 1 mcc users 3.6K Feb 9 08:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 9 08:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 07:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 5 07:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 108 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 346 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.6K Feb 4 23:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 2 01:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 2 01:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Jan 29 15:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Jan 29 15:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:18 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 147K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-192-LTLFireability-00
FORMULA_NAME CircularTrains-PT-192-LTLFireability-01
FORMULA_NAME CircularTrains-PT-192-LTLFireability-02
FORMULA_NAME CircularTrains-PT-192-LTLFireability-03
FORMULA_NAME CircularTrains-PT-192-LTLFireability-04
FORMULA_NAME CircularTrains-PT-192-LTLFireability-05
FORMULA_NAME CircularTrains-PT-192-LTLFireability-06
FORMULA_NAME CircularTrains-PT-192-LTLFireability-07
FORMULA_NAME CircularTrains-PT-192-LTLFireability-08
FORMULA_NAME CircularTrains-PT-192-LTLFireability-09
FORMULA_NAME CircularTrains-PT-192-LTLFireability-10
FORMULA_NAME CircularTrains-PT-192-LTLFireability-11
FORMULA_NAME CircularTrains-PT-192-LTLFireability-12
FORMULA_NAME CircularTrains-PT-192-LTLFireability-13
FORMULA_NAME CircularTrains-PT-192-LTLFireability-14
FORMULA_NAME CircularTrains-PT-192-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552525570561

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((Section_173>=1)&&(F174>=1))"))
Formula 0 simplified : !"((Section_173>=1)&&(F174>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 192 rows 384 cols
invariant :Section_161 + Section_160 + F160 = 1
invariant :Section_4 + Section_5 + F4 = 1
invariant :Section_11 + Section_10 + F10 = 1
invariant :Section_9 + F8 + Section_8 = 2
invariant :F48 + -1'F47 + Section_49 + -1'Section_47 = -1
invariant :F46 + Section_47 + Section_46 = 1
invariant :Section_144 + Section_143 + F143 = 2
invariant :Section_178 + Section_177 + F177 = 1
invariant :Section_134 + -1'F135 + F134 + -1'Section_136 = 1
invariant :F57 + -1'Section_56 + Section_58 + -1'F56 = -1
invariant :Section_180 + -1'F178 + Section_177 + F177 + F179 = 2
invariant :F79 + Section_79 + Section_80 = 1
invariant :F190 + -1'F189 + -1'F191 + -1'Section_189 + Section_1 + F192 = -1
invariant :Section_101 + Section_100 + F100 = 1
invariant :F110 + -1'Section_109 + -1'F109 + Section_111 = 1
invariant :F89 + Section_90 + -1'F88 + -1'Section_88 = 1
invariant :F136 + Section_136 + -1'Section_138 + -1'F137 = -1
invariant :Section_39 + F39 + Section_40 = 1
invariant :Section_135 + F135 + Section_136 = 1
invariant :F28 + Section_26 + -1'F27 + F26 + Section_29 = 2
invariant :Section_91 + F91 + Section_92 = 1
invariant :Section_154 + Section_153 + F153 = 1
invariant :Section_71 + Section_72 + F71 = 2
invariant :Section_85 + F84 + Section_84 = 1
invariant :Section_34 + F34 + Section_35 = 1
invariant :Section_172 + F172 + Section_173 = 1
invariant :F14 + Section_15 + -1'F13 + -1'Section_13 = 1
invariant :Section_75 + Section_76 + F75 = 1
invariant :Section_110 + Section_109 + F109 = 1
invariant :F44 + Section_45 + Section_44 = 2
invariant :Section_25 + Section_24 + F24 = 1
invariant :Section_140 + Section_139 + F139 = 1
invariant :F168 + Section_169 + Section_168 = 1
invariant :F45 + Section_45 + Section_46 = 1
invariant :F32 + Section_33 + -1'F31 + -1'Section_31 = 1
invariant :F131 + -1'F130 + -1'Section_133 + Section_129 + -1'F132 + F129 = 1
invariant :Section_171 + -1'F172 + F171 + -1'Section_173 = 0
invariant :Section_48 + F47 + Section_47 = 2
invariant :Section_104 + F106 + -1'F105 + Section_107 + F104 = 2
invariant :Section_43 + F43 + Section_44 = 1
invariant :Section_6 + Section_5 + F5 = 2
invariant :F51 + Section_49 + F49 + Section_52 + -1'F50 = 0
invariant :F124 + -1'F123 + Section_125 + -1'Section_123 = 0
invariant :Section_170 + Section_169 + F169 = 1
invariant :F6 + -1'Section_5 + Section_7 + -1'F5 = -1
invariant :Section_42 + -1'F40 + -1'Section_40 + F41 = 1
invariant :Section_12 + -1'Section_10 + -1'F10 + F11 = 1
invariant :F23 + Section_24 + -1'F22 + -1'Section_22 = 1
invariant :F126 + Section_127 + -1'Section_125 + -1'F125 = -1
invariant :Section_185 + F184 + Section_184 = 1
invariant :F37 + F39 + Section_40 + -1'F36 + Section_35 + -1'F38 + F35 = 1
invariant :F112 + -1'Section_111 + Section_113 + -1'F111 = 0
invariant :Section_147 + Section_146 + F146 = 2
invariant :Section_18 + Section_17 + F17 = 2
invariant :F185 + -1'F184 + -1'Section_184 + Section_186 = 1
invariant :F86 + Section_87 + Section_86 = 2
invariant :F161 + F163 + -1'Section_160 + Section_164 + -1'F162 + -1'F160 = 1
invariant :Section_162 + -1'F163 + -1'Section_164 + F162 = 0
invariant :Section_112 + Section_111 + F111 = 1
invariant :Section_179 + F178 + -1'Section_177 + -1'F177 = 0
invariant :F164 + Section_164 + -1'Section_166 + -1'F165 = 1
invariant :Section_2 + F1 + Section_1 = 1
invariant :Section_124 + F123 + Section_123 = 1
invariant :Section_149 + Section_148 + F148 = 1
invariant :F69 + -1'F68 + Section_70 + -1'Section_68 = -1
invariant :F70 + -1'Section_72 + Section_70 + -1'F71 = -1
invariant :Section_188 + F187 + Section_187 = 1
invariant :Section_82 + F81 + -1'F80 + -1'Section_80 = -1
invariant :F58 + Section_58 + Section_59 = 1
invariant :F122 + Section_123 + Section_122 = 2
invariant :Section_158 + Section_157 + F157 = 1
invariant :F119 + -1'F118 + -1'Section_118 + Section_120 = 1
invariant :Section_55 + F54 + -1'Section_53 + -1'F53 = -1
invariant :Section_23 + F22 + Section_22 = 1
invariant :Section_176 + F175 + Section_175 = 1
invariant :Section_174 + F173 + Section_173 = 2
invariant :F90 + -1'F91 + Section_90 + -1'Section_92 = 0
invariant :F19 + Section_19 + Section_20 = 1
invariant :F74 + -1'Section_76 + -1'F75 + Section_74 = 1
invariant :F115 + Section_116 + -1'F114 + -1'Section_114 = 0
invariant :Section_119 + F118 + Section_118 = 1
invariant :F166 + -1'F167 + Section_166 + -1'Section_168 = -1
invariant :Section_190 + F189 + Section_189 = 1
invariant :F101 + -1'Section_100 + -1'F100 + Section_102 = 1
invariant :F151 + Section_151 + Section_152 = 1
invariant :F188 + -1'F187 + -1'Section_187 + Section_189 = 1
invariant :Section_131 + F130 + -1'Section_129 + -1'F129 = 0
invariant :Section_81 + F80 + Section_80 = 2
invariant :F59 + Section_60 + Section_59 = 2
invariant :F145 + Section_145 + Section_146 = 1
invariant :F170 + -1'Section_169 + F172 + -1'F169 + -1'F171 + Section_173 = 1
invariant :F30 + -1'F29 + Section_31 + -1'Section_29 = -1
invariant :Section_67 + F66 + -1'F65 + -1'Section_65 = -1
invariant :Section_105 + -1'F106 + F105 + -1'Section_107 = 0
invariant :Section_191 + F191 + -1'Section_1 + -1'F192 = 1
invariant :Section_73 + Section_72 + F72 = 1
invariant :F147 + Section_148 + -1'Section_146 + -1'F146 = -1
invariant :F9 + Section_10 + -1'F8 + -1'Section_8 = -1
invariant :F73 + -1'Section_72 + -1'F72 + Section_74 = 0
invariant :Section_192 + Section_1 + F192 = 1
invariant :F55 + Section_56 + -1'F54 + Section_53 + F53 = 2
invariant :F61 + Section_61 + Section_62 = 1
invariant :Section_137 + Section_138 + F137 = 2
invariant :F82 + -1'F81 + F80 + Section_83 + Section_80 = 2
invariant :Section_54 + Section_53 + F53 = 2
invariant :Section_37 + F36 + -1'Section_35 + -1'F35 = -1
invariant :F159 + Section_160 + Section_159 = 1
invariant :F25 + -1'Section_24 + Section_26 + -1'F24 = 0
invariant :F99 + Section_99 + Section_100 = 1
invariant :Section_64 + Section_63 + F63 = 1
invariant :F156 + Section_157 + -1'F155 + -1'Section_155 = -1
invariant :Section_16 + Section_15 + F15 = 1
invariant :F3 + Section_3 + -1'Section_5 + -1'F4 = 0
invariant :Section_156 + F155 + Section_155 = 2
invariant :Section_182 + F181 + -1'F178 + Section_177 + -1'F180 + F177 + F179 = 2
invariant :Section_32 + F31 + Section_31 = 1
invariant :Section_132 + Section_133 + F132 = 1
invariant :Section_30 + F29 + Section_29 = 2
invariant :F7 + Section_8 + Section_7 = 1
invariant :F95 + -1'Section_60 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_127 + F167 + -1'Section_151 + F118 + F130 + F100 + -1'Section_79 + -1'Section_164 + F148 + F106 + F29 + F1 + -1'Section_45 + F187 + -1'Section_150 + F109 + F162 + F15 + F184 + F68 + F77 + F54 + F139 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F123 + F178 + F84 + F155 + F47 + F63 + F8 + -1'Section_145 + F31 + F75 + -1'Section_49 + F24 + Section_72 + -1'Section_177 + F175 + F182 + F72 + F189 + F27 + F88 + F114 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + F107 + F128 + -1'Section_61 + F93 + -1'Section_152 + -1'Section_74 + F157 + F134 + F180 + -1'Section_58 + F173 + -1'Section_97 + F22 + F160 + F169 + -1'Section_136 + F102 + F81 + -1'Section_7 + F191 + F125 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_186 + F141 + -1'Section_59 + F11 + F71 + F116 + F171 + F4 + F165 + F120 + F132 + Section_107 + F98 + F41 + -1'Section_113 + F56 + -1'Section_86 + -1'Section_159 + F104 + -1'Section_52 + F111 + -1'Section_62 + F20 + F153 + -1'Section_122 + F17 + F146 + -1'Section_65 + F38 + F50 + -1'Section_46 + F143 + F137 + -1'Section_80 = 44
invariant :F183 + F181 + -1'F178 + Section_177 + -1'F182 + Section_184 + -1'F180 + F177 + F179 = 1
invariant :F149 + -1'Section_148 + -1'F148 + Section_150 = 1
invariant :F87 + Section_87 + Section_88 = 1
invariant :F113 + Section_114 + Section_113 = 2
invariant :Section_21 + Section_20 + F20 = 2
invariant :F18 + -1'Section_17 + Section_19 + -1'F17 = -1
invariant :Section_69 + F68 + Section_68 = 2
invariant :Section_94 + F93 + -1'Section_92 + -1'F92 = -1
invariant :F78 + Section_79 + -1'F77 + -1'Section_77 = -1
invariant :F60 + Section_60 + Section_61 = 1
invariant :F85 + -1'F84 + -1'Section_84 + Section_86 = 0
invariant :Section_27 + Section_26 + F26 = 2
invariant :Section_163 + F163 + Section_164 = 1
invariant :F76 + Section_76 + Section_77 = 1
invariant :Section_165 + Section_166 + F165 = 1
invariant :Section_98 + Section_99 + F98 = 2
invariant :F140 + -1'Section_139 + -1'F139 + Section_141 = 1
invariant :Section_14 + F13 + Section_13 = 1
invariant :F176 + Section_177 + -1'F175 + -1'Section_175 = 1
invariant :Section_57 + Section_56 + F56 = 2
invariant :F21 + -1'Section_20 + Section_22 + -1'F20 = -1
invariant :F94 + -1'Section_60 + F96 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_127 + F167 + -1'Section_151 + F118 + F130 + F100 + -1'Section_79 + -1'Section_164 + F148 + F106 + F29 + F1 + -1'Section_45 + F187 + -1'Section_150 + F109 + F162 + F15 + F184 + F68 + F77 + F54 + F139 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F123 + F178 + F84 + F155 + F47 + F63 + F8 + -1'Section_145 + F31 + F75 + -1'Section_49 + F24 + Section_72 + -1'Section_177 + F175 + F182 + F72 + F189 + F27 + F88 + F114 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + F107 + F128 + -1'Section_61 + -1'Section_152 + -1'Section_74 + F157 + F134 + F180 + -1'Section_58 + F173 + F22 + F160 + F169 + -1'Section_136 + F102 + F81 + -1'Section_7 + F191 + F125 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_186 + F141 + -1'Section_59 + F11 + F71 + F116 + F171 + F4 + F165 + F120 + F132 + Section_92 + Section_107 + F98 + F41 + -1'Section_113 + F56 + -1'Section_86 + -1'Section_159 + F104 + -1'Section_52 + F111 + -1'Section_62 + F20 + F153 + -1'Section_122 + F17 + F146 + -1'Section_65 + F92 + F38 + F50 + -1'Section_46 + F143 + F137 + -1'Section_80 = 45
invariant :Section_106 + F106 + Section_107 = 1
invariant :F142 + Section_143 + -1'F141 + -1'Section_141 = 0
invariant :Section_121 + F120 + Section_120 = 1
invariant :Section_95 + Section_60 + -1'F96 + -1'F43 + -1'F34 + Section_33 + Section_87 + -1'F91 + Section_90 + Section_127 + -1'F167 + Section_151 + -1'F118 + -1'F130 + -1'F100 + Section_79 + Section_164 + -1'F148 + -1'F106 + -1'F29 + -1'F1 + Section_45 + -1'F187 + Section_150 + -1'F109 + -1'F162 + -1'F15 + -1'F184 + -1'F68 + -1'F77 + -1'F54 + -1'F139 + Section_3 + Section_26 + Section_10 + -1'F123 + -1'F178 + -1'F84 + -1'F155 + -1'F47 + -1'F63 + -1'F8 + Section_145 + -1'F31 + -1'F75 + Section_49 + -1'F24 + -1'Section_72 + Section_177 + -1'F175 + -1'F182 + -1'F72 + -1'F189 + -1'F27 + -1'F88 + -1'F114 + -1'Section_5 + Section_70 + -1'F13 + Section_19 + -1'F66 + Section_40 + -1'F36 + -1'F107 + -1'F128 + Section_61 + -1'F93 + Section_152 + Section_74 + -1'F157 + -1'F134 + -1'F180 + Section_58 + -1'F173 + -1'F22 + -1'F160 + -1'F169 + Section_136 + -1'F102 + -1'F81 + Section_7 + -1'F191 + -1'F125 + Section_83 + Section_53 + -1'F5 + Section_186 + -1'F141 + Section_59 + -1'F11 + -1'F71 + -1'F116 + -1'F171 + -1'F4 + -1'F165 + -1'F120 + -1'F132 + -1'Section_107 + -1'F98 + -1'F41 + Section_113 + -1'F56 + Section_86 + Section_159 + -1'F104 + Section_52 + -1'F111 + Section_62 + -1'F20 + -1'F153 + Section_122 + -1'F17 + -1'F146 + Section_65 + -1'F38 + -1'F50 + Section_46 + -1'F143 + -1'F137 + Section_80 = -43
invariant :Section_167 + F167 + Section_168 = 2
invariant :Section_38 + -1'F39 + -1'Section_40 + F38 = 1
invariant :F42 + -1'F43 + F40 + Section_40 + -1'Section_44 + -1'F41 = -1
invariant :F154 + Section_155 + -1'Section_153 + -1'F153 = 0
invariant :F52 + Section_53 + Section_52 = 1
invariant :Section_130 + Section_129 + F129 = 1
invariant :F150 + Section_151 + Section_150 = 1
invariant :Section_117 + Section_116 + F116 = 2
invariant :Section_41 + F40 + Section_40 = 1
invariant :Section_126 + Section_125 + F125 = 2
invariant :Section_36 + Section_35 + F35 = 2
invariant :Section_115 + F114 + Section_114 = 1
invariant :Section_181 + F178 + -1'Section_177 + F180 + -1'F177 + -1'F179 = -1
invariant :F33 + -1'F34 + Section_33 + -1'Section_35 = 0
invariant :Section_96 + F96 + Section_97 = 1
invariant :Section_128 + F128 + Section_129 = 2
invariant :F121 + -1'F120 + Section_122 + -1'Section_120 = 0
invariant :F62 + Section_63 + Section_62 = 2
invariant :Section_142 + F141 + Section_141 = 1
invariant :F127 + Section_127 + -1'F128 + -1'Section_129 = -1
invariant :F64 + -1'Section_63 + -1'F63 + Section_65 = 0
invariant :F83 + Section_84 + Section_83 = 2
invariant :F174 + Section_175 + -1'F173 + -1'Section_173 = -1
invariant :F2 + -1'F1 + Section_3 + -1'Section_1 = 1
invariant :Section_51 + -1'Section_49 + -1'F49 + F50 = 1
invariant :F12 + Section_10 + F10 + -1'F11 + Section_13 = 0
invariant :F152 + Section_152 + Section_153 = 2
invariant :F67 + -1'F66 + F65 + Section_68 + Section_65 = 2
invariant :Section_183 + -1'F181 + F178 + -1'Section_177 + F182 + F180 + -1'F177 + -1'F179 = 0
invariant :F16 + -1'Section_15 + Section_17 + -1'F15 = 0
invariant :F108 + Section_109 + -1'F107 + -1'Section_107 = -1
invariant :F117 + Section_118 + -1'Section_116 + -1'F116 = -1
invariant :Section_78 + F77 + Section_77 = 2
invariant :Section_89 + F88 + Section_88 = 1
invariant :F144 + Section_145 + -1'Section_143 + -1'F143 = -1
invariant :F103 + -1'F106 + -1'Section_102 + -1'F102 + F105 + -1'Section_107 + -1'F104 = -2
invariant :Section_28 + -1'Section_26 + F27 + -1'F26 = -1
invariant :F138 + Section_139 + Section_138 = 1
invariant :F158 + -1'Section_157 + -1'F157 + Section_159 = 1
invariant :F186 + Section_187 + Section_186 = 1
invariant :Section_66 + F65 + Section_65 = 2
invariant :Section_50 + Section_49 + F49 = 1
invariant :Section_93 + Section_92 + F92 = 2
invariant :Section_108 + F107 + Section_107 = 2
invariant :Section_103 + Section_102 + F102 = 1
invariant :F133 + F135 + Section_133 + -1'F134 + Section_136 = 0
invariant :F97 + -1'Section_99 + Section_97 + -1'F98 = -1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3910 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 56 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1260 ms.
FORMULA CircularTrains-PT-192-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP1==true))U(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP1==true))U(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
8505 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,85.1041,1566600,1,0,6,1.15387e+07,20,0,8682,2.6563e+06,17
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA CircularTrains-PT-192-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((X(("((Section_76>=1)&&(F77>=1))")U(X("((Section_82>=1)&&(F83>=1))")))))
Formula 1 simplified : !X("((Section_76>=1)&&(F77>=1))" U X"((Section_82>=1)&&(F83>=1))")
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
16 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,85.2711,1570216,1,0,12,1.15568e+07,27,0,8690,2.67446e+06,34
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA CircularTrains-PT-192-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(((F(("((F150>=1)&&(Section_149>=1))")U("((F113>=1)&&(Section_112>=1))")))U("((F94>=1)&&(Section_93>=1))")))
Formula 2 simplified : !(F("((F150>=1)&&(Section_149>=1))" U "((F113>=1)&&(Section_112>=1))") U "((F94>=1)&&(Section_93>=1))")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,85.2732,1570440,1,0,12,1.15568e+07,35,0,8700,2.67446e+06,38
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA CircularTrains-PT-192-LTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(F((X("((Section_85>=1)&&(F86>=1))"))U("((F192>=1)&&(Section_191>=1))")))))
Formula 3 simplified : !XF(X"((Section_85>=1)&&(F86>=1))" U "((F192>=1)&&(Section_191>=1))")

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 14, 2019 1:06:12 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 14, 2019 1:06:12 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 14, 2019 1:06:13 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 101 ms
Mar 14, 2019 1:06:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 384 places.
Mar 14, 2019 1:06:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 192 transitions.
Mar 14, 2019 1:06:13 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 24 ms
Mar 14, 2019 1:06:13 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
Mar 14, 2019 1:06:13 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Mar 14, 2019 1:06:13 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 14, 2019 1:06:13 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 192 transitions.
Mar 14, 2019 1:06:14 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 193 place invariants in 156 ms
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 384 variables to be positive in 984 ms
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 192 transitions.
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/192 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 192 transitions.
Mar 14, 2019 1:06:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 21 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 14, 2019 1:06:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 192 transitions.
Mar 14, 2019 1:06:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/192) took 2136 ms. Total solver calls (SAT/UNSAT): 671(644/27)
Mar 14, 2019 1:06:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/192) took 5247 ms. Total solver calls (SAT/UNSAT): 1825(1722/103)
Mar 14, 2019 1:06:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/192) took 8267 ms. Total solver calls (SAT/UNSAT): 2696(2527/169)
Mar 14, 2019 1:06:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/192) took 11372 ms. Total solver calls (SAT/UNSAT): 3716(3515/201)
Mar 14, 2019 1:06:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/192) took 14449 ms. Total solver calls (SAT/UNSAT): 4519(4302/217)
Mar 14, 2019 1:06:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 15848 ms. Total solver calls (SAT/UNSAT): 4737(4515/222)
Mar 14, 2019 1:06:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 192 transitions.
Mar 14, 2019 1:06:33 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 14, 2019 1:06:34 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 14, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 7457 ms. Total solver calls (SAT/UNSAT): 162(0/162)
Mar 14, 2019 1:06:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 25797ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 0/ 8), 0.024: Loading model from ./gal.so
pins2lts-mc( 2/ 8), 0.024: library has no initializer
pins2lts-mc( 6/ 8), 0.008: library has no initializer
pins2lts-mc( 6/ 8), 0.008: loading model GAL
pins2lts-mc( 5/ 8), 0.000: library has no initializer
pins2lts-mc( 5/ 8), 0.000: loading model GAL
pins2lts-mc( 7/ 8), 0.001: library has no initializer
pins2lts-mc( 7/ 8), 0.001: loading model GAL
pins2lts-mc( 1/ 8), 0.025: library has no initializer
pins2lts-mc( 1/ 8), 0.025: loading model GAL
pins2lts-mc( 2/ 8), 0.025: loading model GAL
pins2lts-mc( 0/ 8), 0.025: library has no initializer
pins2lts-mc( 3/ 8), 0.025: library has no initializer
pins2lts-mc( 3/ 8), 0.026: loading model GAL
pins2lts-mc( 0/ 8), 0.025: loading model GAL
pins2lts-mc( 4/ 8), 0.009: library has no initializer
pins2lts-mc( 4/ 8), 0.010: loading model GAL
pins2lts-mc( 6/ 8), 0.012: completed loading model GAL
pins2lts-mc( 6/ 8), 0.013: LTL layer: formula: X(((LTLAP1==true))U(X((LTLAP2==true))))
pins2lts-mc( 5/ 8), 0.005: completed loading model GAL
pins2lts-mc( 2/ 8), 0.030: completed loading model GAL
pins2lts-mc( 6/ 8), 0.016: "X(((LTLAP1==true))U(X((LTLAP2==true))))" is not a file, parsing as formula...
pins2lts-mc( 1/ 8), 0.032: completed loading model GAL
pins2lts-mc( 7/ 8), 0.008: completed loading model GAL
pins2lts-mc( 3/ 8), 0.033: completed loading model GAL
pins2lts-mc( 6/ 8), 0.017: Using Spin LTL semantics
pins2lts-mc( 4/ 8), 0.018: completed loading model GAL
pins2lts-mc( 0/ 8), 0.035: completed loading model GAL
pins2lts-mc( 0/ 8), 0.052: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc( 0/ 8), 0.145: DFS-FIFO for weak LTL, using special progress label 221
pins2lts-mc( 0/ 8), 0.145: There are 222 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 0.145: State length is 385, there are 199 groups
pins2lts-mc( 0/ 8), 0.145: Running dfsfifo using 8 cores
pins2lts-mc( 0/ 8), 0.145: Using a tree table with 2^27 elements
pins2lts-mc( 0/ 8), 0.145: Successor permutation: rr
pins2lts-mc( 0/ 8), 0.145: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc( 7/ 8), 0.796: ~101 levels ~960 states ~53256 transitions
pins2lts-mc( 7/ 8), 1.080: ~216 levels ~1920 states ~92496 transitions
pins2lts-mc( 7/ 8), 1.548: ~447 levels ~3840 states ~168712 transitions
pins2lts-mc( 7/ 8), 2.235: ~905 levels ~7680 states ~301464 transitions
pins2lts-mc( 7/ 8), 3.111: ~1799 levels ~15360 states ~514568 transitions
pins2lts-mc( 7/ 8), 3.808: ~2856 levels ~30720 states ~688344 transitions
pins2lts-mc( 7/ 8), 4.521: ~2856 levels ~61440 states ~804464 transitions
pins2lts-mc( 7/ 8), 5.655: ~2856 levels ~122880 states ~1060488 transitions
pins2lts-mc( 7/ 8), 7.953: ~2856 levels ~245760 states ~1584912 transitions
pins2lts-mc( 7/ 8), 12.706: ~2856 levels ~491520 states ~2725840 transitions
pins2lts-mc( 4/ 8), 22.697: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 24.482:
pins2lts-mc( 0/ 8), 24.482: mean standard work distribution: 86.1% (states) 10.3% (transitions)
pins2lts-mc( 0/ 8), 24.482:
pins2lts-mc( 0/ 8), 24.482: Explored 260934 states 6118236 transitions, fanout: 23.447
pins2lts-mc( 0/ 8), 24.482: Total exploration time 24.340 sec (22.680 sec minimum, 23.587 sec on average)
pins2lts-mc( 0/ 8), 24.482: States per second: 10720, Transitions per second: 251365
pins2lts-mc( 0/ 8), 24.482:
pins2lts-mc( 0/ 8), 24.482: Progress states detected: 143283
pins2lts-mc( 0/ 8), 24.482: Redundant explorations: -95.5603
pins2lts-mc( 0/ 8), 24.482:
pins2lts-mc( 0/ 8), 24.482: Queue width: 8B, total height: 301459, memory: 2.30MB
pins2lts-mc( 0/ 8), 24.482: Tree memory: 300.8MB, 53.7 B/state, compr.: 3.5%
pins2lts-mc( 0/ 8), 24.482: Tree fill ratio (roots/leafs): 4.0%/100.0%
pins2lts-mc( 0/ 8), 24.482: Stored 193 string chucks using 0MB
pins2lts-mc( 0/ 8), 24.482: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 24.482: Est. total memory use: 303.1MB (~1026.3MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP1==true))U(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-192"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is CircularTrains-PT-192, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r030-smll-155225126800205"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-192.tgz
mv CircularTrains-PT-192 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;