fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r019-csrt-155225080100251
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for BART-COL-002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
603.930 60848.00 88606.00 236.50 FTFFTTFTFTTFTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r019-csrt-155225080100251.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is BART-COL-002, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r019-csrt-155225080100251
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 340K
-rw-r--r-- 1 mcc users 4.6K Feb 9 07:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 9 07:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 5 04:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 5 04:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 99 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 337 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.5K Feb 4 22:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 2 01:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 2 01:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Jan 29 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K Jan 29 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:18 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 184K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-002-ReachabilityCardinality-00
FORMULA_NAME BART-COL-002-ReachabilityCardinality-01
FORMULA_NAME BART-COL-002-ReachabilityCardinality-02
FORMULA_NAME BART-COL-002-ReachabilityCardinality-03
FORMULA_NAME BART-COL-002-ReachabilityCardinality-04
FORMULA_NAME BART-COL-002-ReachabilityCardinality-05
FORMULA_NAME BART-COL-002-ReachabilityCardinality-06
FORMULA_NAME BART-COL-002-ReachabilityCardinality-07
FORMULA_NAME BART-COL-002-ReachabilityCardinality-08
FORMULA_NAME BART-COL-002-ReachabilityCardinality-09
FORMULA_NAME BART-COL-002-ReachabilityCardinality-10
FORMULA_NAME BART-COL-002-ReachabilityCardinality-11
FORMULA_NAME BART-COL-002-ReachabilityCardinality-12
FORMULA_NAME BART-COL-002-ReachabilityCardinality-13
FORMULA_NAME BART-COL-002-ReachabilityCardinality-14
FORMULA_NAME BART-COL-002-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552429406990

22:23:30.205 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
22:23:30.207 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
FORMULA BART-COL-002-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-COL-002-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : BART-COL-002-ReachabilityCardinality-06 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TrainState_0+TrainState_1)+TrainState_2)+TrainState_3)+TrainState_4)+TrainState_5)+TrainState_6)+TrainState_7)+TrainState_8)+TrainState_9)+TrainState_10)+TrainState_11)+TrainState_12)+TrainState_13)+TrainState_14)+TrainState_15)+TrainState_16)+TrainState_17)+TrainState_18)+TrainState_19)+TrainState_20)+TrainState_21)+TrainState_22)+TrainState_23)+TrainState_24)+TrainState_25)+TrainState_26)+TrainState_27)+TrainState_28)+TrainState_29)+TrainState_30)+TrainState_31)+TrainState_32)+TrainState_33)+TrainState_34)+TrainState_35)+TrainState_36)+TrainState_37)+TrainState_38)+TrainState_39)+TrainState_40)+TrainState_41)+TrainState_42)+TrainState_43)+TrainState_44)+TrainState_45)+TrainState_46)+TrainState_47)+TrainState_48)+TrainState_49)+TrainState_50)+TrainState_51)+TrainState_52)+TrainState_53)+TrainState_54)+TrainState_55)+TrainState_56)+TrainState_57)+TrainState_58)+TrainState_59)+TrainState_60)+TrainState_61)+TrainState_62)+TrainState_63)+TrainState_64)+TrainState_65)+TrainState_66)+TrainState_67)+TrainState_68)+TrainState_69)+TrainState_70)+TrainState_71)+TrainState_72)+TrainState_73)+TrainState_74)+TrainState_75)+TrainState_76)+TrainState_77)+TrainState_78)+TrainState_79)+TrainState_80)+TrainState_81)+TrainState_82)+TrainState_83)+TrainState_84)+TrainState_85)+TrainState_86)+TrainState_87)+TrainState_88)+TrainState_89)+TrainState_90)+TrainState_91)+TrainState_92)+TrainState_93)+TrainState_94)+TrainState_95)+TrainState_96)+TrainState_97)+TrainState_98)+TrainState_99)+TrainState_100)+TrainState_101)+TrainState_102)+TrainState_103)+TrainState_104)+TrainState_105)+TrainState_106)+TrainState_107)+TrainState_108)+TrainState_109)+TrainState_110)+TrainState_111)+TrainState_112)+TrainState_113)+TrainState_114)+TrainState_115)+TrainState_116)+TrainState_117)+TrainState_118)+TrainState_119)+TrainState_120)+TrainState_121)+TrainState_122)+TrainState_123)+TrainState_124)+TrainState_125)+TrainState_126)+TrainState_127)+TrainState_128)+TrainState_129)+TrainState_130)+TrainState_131)+TrainState_132)+TrainState_133)+TrainState_134)+TrainState_135)+TrainState_136)+TrainState_137)+TrainState_138)+TrainState_139)+TrainState_140)+TrainState_141)+TrainState_142)+TrainState_143)+TrainState_144)+TrainState_145)+TrainState_146)+TrainState_147)+TrainState_148)+TrainState_149)+TrainState_150)+TrainState_151)+TrainState_152)+TrainState_153)+TrainState_154)+TrainState_155)+TrainState_156)+TrainState_157)+TrainState_158)+TrainState_159)+TrainState_160)+TrainState_161)+TrainState_162)+TrainState_163)+TrainState_164)+TrainState_165)+TrainState_166)+TrainState_167)+TrainState_168)+TrainState_169)+TrainState_170)+TrainState_171)+TrainState_172)+TrainState_173)+TrainState_174)+TrainState_175)+TrainState_176)+TrainState_177)+TrainState_178)+TrainState_179)+TrainState_180)+TrainState_181)+TrainState_182)+TrainState_183)+TrainState_184)+TrainState_185)+TrainState_186)+TrainState_187)+TrainState_188)+TrainState_189)+TrainState_190)+TrainState_191)+TrainState_192)+TrainState_193)+TrainState_194)+TrainState_195)+TrainState_196)+TrainState_197)+TrainState_198)+TrainState_199)+TrainState_200)+TrainState_201)+TrainState_202)+TrainState_203)+TrainState_204)+TrainState_205)+TrainState_210)+TrainState_211)+TrainState_212)+TrainState_213)+TrainState_214)+TrainState_215)+TrainState_216)+TrainState_217)+TrainState_218)+TrainState_219)+TrainState_220)+TrainState_221)+TrainState_222)+TrainState_223)+TrainState_224)+TrainState_225)+TrainState_246)+TrainState_247)+TrainState_248)+TrainState_249)+TrainState_250)+TrainState_251)+TrainState_252)+TrainState_253)+TrainState_254)+TrainState_255)+TrainState_256)+TrainState_257)+TrainState_258)+TrainState_259)+TrainState_260)+TrainState_261)+TrainState_262)+TrainState_263)+TrainState_264)+TrainState_265)+TrainState_266)+TrainState_267)+TrainState_268)+TrainState_269)+TrainState_270)+TrainState_271)+TrainState_272)+TrainState_273)+TrainState_274)+TrainState_275)+TrainState_276)+TrainState_277)+TrainState_278)+TrainState_279)+TrainState_280)+TrainState_281)+TrainState_282)+TrainState_283)+TrainState_284)+TrainState_285)+TrainState_286)+TrainState_287)+TrainState_288)+TrainState_289)+TrainState_290)+TrainState_291)+TrainState_292)+TrainState_293)+TrainState_294)+TrainState_295)+TrainState_296)+TrainState_297)+TrainState_298)+TrainState_299)+TrainState_300)+TrainState_301)+TrainState_302)+TrainState_303)+TrainState_304)+TrainState_305)+TrainState_306)+TrainState_307)+TrainState_308)+TrainState_309)+TrainState_310)+TrainState_311)+TrainState_312)+TrainState_313)+TrainState_314)+TrainState_315)+TrainState_316)+TrainState_317)+TrainState_318)+TrainState_319)+TrainState_320)+TrainState_321)+TrainState_322)+TrainState_323)+TrainState_324)+TrainState_325)+TrainState_326)+TrainState_327)+TrainState_328)+TrainState_329)+TrainState_330)+TrainState_331)+TrainState_332)+TrainState_333)+TrainState_334)+TrainState_335)+TrainState_336)+TrainState_337)+TrainState_338)+TrainState_339)+TrainState_340)+TrainState_341)+TrainState_342)+TrainState_343)+TrainState_344)+TrainState_345)+TrainState_346)+TrainState_347)+TrainState_348)+TrainState_349)+TrainState_350)+TrainState_351)+TrainState_352)+TrainState_353)+TrainState_354)+TrainState_355)+TrainState_356)+TrainState_357)+TrainState_358)+TrainState_359)+TrainState_360)+TrainState_361)+TrainState_362)+TrainState_363)+TrainState_364)+TrainState_365)+TrainState_366)+TrainState_367)+TrainState_368)+TrainState_369)+TrainState_370)+TrainState_371)+TrainState_372)+TrainState_373)+TrainState_374)+TrainState_375)+TrainState_376)+TrainState_377)+TrainState_378)+TrainState_379)+TrainState_380)+TrainState_381)+TrainState_382)+TrainState_383)+TrainState_384)+TrainState_385)+TrainState_386)+TrainState_387)+TrainState_388)+TrainState_389)+TrainState_390)+TrainState_391)+TrainState_392)+TrainState_393)+TrainState_394)+TrainState_395)+TrainState_396)+TrainState_397)+TrainState_398)+TrainState_399)+TrainState_400)+TrainState_401)+TrainState_402)+TrainState_403)+TrainState_404)+TrainState_405)+TrainState_406)+TrainState_407)+TrainState_408)+TrainState_409)+TrainState_410)+TrainState_411)+TrainState_412)+TrainState_413)+TrainState_414)+TrainState_415)+TrainState_416)+TrainState_417)+TrainState_418)+TrainState_419)+TrainState_420)+TrainState_421)+TrainState_422)+TrainState_423)+TrainState_424)+TrainState_425)+TrainState_426)+TrainState_427)+TrainState_428)+TrainState_429)+TrainState_430)+TrainState_431)+TrainState_432)+TrainState_433)+TrainState_434)+TrainState_435)+TrainState_436)+TrainState_437)+TrainState_438)+TrainState_439)+TrainState_440)+TrainState_441)+TrainState_442)+TrainState_443)+TrainState_444)+TrainState_445)+TrainState_446)+TrainState_447)+TrainState_448)+TrainState_449)+TrainState_450)+TrainState_451)+TrainState_456)+TrainState_457)+TrainState_458)+TrainState_459)+TrainState_460)+TrainState_461)+TrainState_462)+TrainState_463)+TrainState_464)+TrainState_465)+TrainState_466)+TrainState_467)+TrainState_468)+TrainState_469)+TrainState_470)+TrainState_471)>=230)||(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TrainState_0+TrainState_1)+TrainState_2)+TrainState_3)+TrainState_4)+TrainState_5)+TrainState_6)+TrainState_7)+TrainState_8)+TrainState_9)+TrainState_10)+TrainState_11)+TrainState_12)+TrainState_13)+TrainState_14)+TrainState_15)+TrainState_16)+TrainState_17)+TrainState_18)+TrainState_19)+TrainState_20)+TrainState_21)+TrainState_22)+TrainState_23)+TrainState_24)+TrainState_25)+TrainState_26)+TrainState_27)+TrainState_28)+TrainState_29)+TrainState_30)+TrainState_31)+TrainState_32)+TrainState_33)+TrainState_34)+TrainState_35)+TrainState_36)+TrainState_37)+TrainState_38)+TrainState_39)+TrainState_40)+TrainState_41)+TrainState_42)+TrainState_43)+TrainState_44)+TrainState_45)+TrainState_46)+TrainState_47)+TrainState_48)+TrainState_49)+TrainState_50)+TrainState_51)+TrainState_52)+TrainState_53)+TrainState_54)+TrainState_55)+TrainState_56)+TrainState_57)+TrainState_58)+TrainState_59)+TrainState_60)+TrainState_61)+TrainState_62)+TrainState_63)+TrainState_64)+TrainState_65)+TrainState_66)+TrainState_67)+TrainState_68)+TrainState_69)+TrainState_70)+TrainState_71)+TrainState_72)+TrainState_73)+TrainState_74)+TrainState_75)+TrainState_76)+TrainState_77)+TrainState_78)+TrainState_79)+TrainState_80)+TrainState_81)+TrainState_82)+TrainState_83)+TrainState_84)+TrainState_85)+TrainState_86)+TrainState_87)+TrainState_88)+TrainState_89)+TrainState_90)+TrainState_91)+TrainState_92)+TrainState_93)+TrainState_94)+TrainState_95)+TrainState_96)+TrainState_97)+TrainState_98)+TrainState_99)+TrainState_100)+TrainState_101)+TrainState_102)+TrainState_103)+TrainState_104)+TrainState_105)+TrainState_106)+TrainState_107)+TrainState_108)+TrainState_109)+TrainState_110)+TrainState_111)+TrainState_112)+TrainState_113)+TrainState_114)+TrainState_115)+TrainState_116)+TrainState_117)+TrainState_118)+TrainState_119)+TrainState_120)+TrainState_121)+TrainState_122)+TrainState_123)+TrainState_124)+TrainState_125)+TrainState_126)+TrainState_127)+TrainState_128)+TrainState_129)+TrainState_130)+TrainState_131)+TrainState_132)+TrainState_133)+TrainState_134)+TrainState_135)+TrainState_136)+TrainState_137)+TrainState_138)+TrainState_139)+TrainState_140)+TrainState_141)+TrainState_142)+TrainState_143)+TrainState_144)+TrainState_145)+TrainState_146)+TrainState_147)+TrainState_148)+TrainState_149)+TrainState_150)+TrainState_151)+TrainState_152)+TrainState_153)+TrainState_154)+TrainState_155)+TrainState_156)+TrainState_157)+TrainState_158)+TrainState_159)+TrainState_160)+TrainState_161)+TrainState_162)+TrainState_163)+TrainState_164)+TrainState_165)+TrainState_166)+TrainState_167)+TrainState_168)+TrainState_169)+TrainState_170)+TrainState_171)+TrainState_172)+TrainState_173)+TrainState_174)+TrainState_175)+TrainState_176)+TrainState_177)+TrainState_178)+TrainState_179)+TrainState_180)+TrainState_181)+TrainState_182)+TrainState_183)+TrainState_184)+TrainState_185)+TrainState_186)+TrainState_187)+TrainState_188)+TrainState_189)+TrainState_190)+TrainState_191)+TrainState_192)+TrainState_193)+TrainState_194)+TrainState_195)+TrainState_196)+TrainState_197)+TrainState_198)+TrainState_199)+TrainState_200)+TrainState_201)+TrainState_202)+TrainState_203)+TrainState_204)+TrainState_205)+TrainState_210)+TrainState_211)+TrainState_212)+TrainState_213)+TrainState_214)+TrainState_215)+TrainState_216)+TrainState_217)+TrainState_218)+TrainState_219)+TrainState_220)+TrainState_221)+TrainState_222)+TrainState_223)+TrainState_224)+TrainState_225)+TrainState_246)+TrainState_247)+TrainState_248)+TrainState_249)+TrainState_250)+TrainState_251)+TrainState_252)+TrainState_253)+TrainState_254)+TrainState_255)+TrainState_256)+TrainState_257)+TrainState_258)+TrainState_259)+TrainState_260)+TrainState_261)+TrainState_262)+TrainState_263)+TrainState_264)+TrainState_265)+TrainState_266)+TrainState_267)+TrainState_268)+TrainState_269)+TrainState_270)+TrainState_271)+TrainState_272)+TrainState_273)+TrainState_274)+TrainState_275)+TrainState_276)+TrainState_277)+TrainState_278)+TrainState_279)+TrainState_280)+TrainState_281)+TrainState_282)+TrainState_283)+TrainState_284)+TrainState_285)+TrainState_286)+TrainState_287)+TrainState_288)+TrainState_289)+TrainState_290)+TrainState_291)+TrainState_292)+TrainState_293)+TrainState_294)+TrainState_295)+TrainState_296)+TrainState_297)+TrainState_298)+TrainState_299)+TrainState_300)+TrainState_301)+TrainState_302)+TrainState_303)+TrainState_304)+TrainState_305)+TrainState_306)+TrainState_307)+TrainState_308)+TrainState_309)+TrainState_310)+TrainState_311)+TrainState_312)+TrainState_313)+TrainState_314)+TrainState_315)+TrainState_316)+TrainState_317)+TrainState_318)+TrainState_319)+TrainState_320)+TrainState_321)+TrainState_322)+TrainState_323)+TrainState_324)+TrainState_325)+TrainState_326)+TrainState_327)+TrainState_328)+TrainState_329)+TrainState_330)+TrainState_331)+TrainState_332)+TrainState_333)+TrainState_334)+TrainState_335)+TrainState_336)+TrainState_337)+TrainState_338)+TrainState_339)+TrainState_340)+TrainState_341)+TrainState_342)+TrainState_343)+TrainState_344)+TrainState_345)+TrainState_346)+TrainState_347)+TrainState_348)+TrainState_349)+TrainState_350)+TrainState_351)+TrainState_352)+TrainState_353)+TrainState_354)+TrainState_355)+TrainState_356)+TrainState_357)+TrainState_358)+TrainState_359)+TrainState_360)+TrainState_361)+TrainState_362)+TrainState_363)+TrainState_364)+TrainState_365)+TrainState_366)+TrainState_367)+TrainState_368)+TrainState_369)+TrainState_370)+TrainState_371)+TrainState_372)+TrainState_373)+TrainState_374)+TrainState_375)+TrainState_376)+TrainState_377)+TrainState_378)+TrainState_379)+TrainState_380)+TrainState_381)+TrainState_382)+TrainState_383)+TrainState_384)+TrainState_385)+TrainState_386)+TrainState_387)+TrainState_388)+TrainState_389)+TrainState_390)+TrainState_391)+TrainState_392)+TrainState_393)+TrainState_394)+TrainState_395)+TrainState_396)+TrainState_397)+TrainState_398)+TrainState_399)+TrainState_400)+TrainState_401)+TrainState_402)+TrainState_403)+TrainState_404)+TrainState_405)+TrainState_406)+TrainState_407)+TrainState_408)+TrainState_409)+TrainState_410)+TrainState_411)+TrainState_412)+TrainState_413)+TrainState_414)+TrainState_415)+TrainState_416)+TrainState_417)+TrainState_418)+TrainState_419)+TrainState_420)+TrainState_421)+TrainState_422)+TrainState_423)+TrainState_424)+TrainState_425)+TrainState_426)+TrainState_427)+TrainState_428)+TrainState_429)+TrainState_430)+TrainState_431)+TrainState_432)+TrainState_433)+TrainState_434)+TrainState_435)+TrainState_436)+TrainState_437)+TrainState_438)+TrainState_439)+TrainState_440)+TrainState_441)+TrainState_442)+TrainState_443)+TrainState_444)+TrainState_445)+TrainState_446)+TrainState_447)+TrainState_448)+TrainState_449)+TrainState_450)+TrainState_451)+TrainState_456)+TrainState_457)+TrainState_458)+TrainState_459)+TrainState_460)+TrainState_461)+TrainState_462)+TrainState_463)+TrainState_464)+TrainState_465)+TrainState_466)+TrainState_467)+TrainState_468)+TrainState_469)+TrainState_470)+TrainState_471)>=1)))
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART\_COL\_002\_flat\_flat,17424,0.802808,7732,2,801,5,8497,7,0,2148,3565,0
Total reachable state count : 17424

Verifying 1 reachability properties.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 643
// Phase 1: matrix 643 rows 492 cols
invariant :TrainState_476 = 0
invariant :TrainState_454 = 0
invariant :TrainState_238 = 0
invariant :TrainState_207 = 0
invariant :TrainState_370 + TrainState_415 + TrainState_461 = 0
invariant :TrainState_453 = 0
invariant :TrainState_413 + TrainState_459 = 0
invariant :TrainState_233 = 0
invariant :TrainState_227 = 0
invariant :TrainState_488 = 0
invariant :TrainState_166 + TrainState_212 = 0
invariant :TrainState_473 = 0
invariant :TrainState_83 + TrainState_127 + TrainState_172 + TrainState_218 = 0
invariant :TrainState_330 + TrainState_374 + TrainState_419 + TrainState_465 = 0
invariant :TrainState_242 = 0
invariant :TrainState_209 = 0
invariant :TrainState_491 = 0
invariant :TrainState_240 = 0
invariant :TrainState_479 = 0
invariant :TrainState_237 = 0
invariant :TrainState_411 + TrainState_457 = 0
invariant :TrainState_84 + TrainState_128 + TrainState_173 + TrainState_219 = 0
invariant :TrainState_480 = 0
invariant :TrainState_165 + TrainState_211 = 0
invariant :TrainState_126 + TrainState_171 + TrainState_217 = 0
invariant :TrainState_236 = 0
invariant :TrainState_206 = 0
invariant :TrainState_477 = 0
invariant :TrainState_231 = 0
invariant :TrainState_241 = 0
invariant :TrainState_490 = 0
invariant :TrainState_485 = 0
invariant :TrainState_455 = 0
invariant :TrainState_239 = 0
invariant :TrainState_245 = 0
invariant :TrainState_243 = 0
invariant :TrainState_452 = 0
invariant :TrainState_478 = 0
invariant :TrainState_229 = 0
invariant :TrainState_472 = 0
invariant :TrainState_244 = 0
invariant :TrainState_489 = 0
invariant :TrainState_230 = 0
invariant :TrainState_168 + TrainState_214 = 0
invariant :TrainState_483 = 0
invariant :TrainState_208 = 0
invariant :TrainState_226 = 0
invariant :TrainState_412 + TrainState_458 = 0
invariant :TrainState_372 + TrainState_417 + TrainState_463 = 0
invariant :TrainState_371 + TrainState_416 + TrainState_462 = 0
invariant :TrainState_486 = 0
invariant :TrainState_234 = 0
invariant :TrainState_124 + TrainState_169 + TrainState_215 = 0
invariant :TrainState_125 + TrainState_170 + TrainState_216 = 0
invariant :TrainState_228 = 0
invariant :TrainState_329 + TrainState_373 + TrainState_418 + TrainState_464 = 0
invariant :TrainState_482 = 0
invariant :TrainState_474 = 0
invariant :TrainState_235 = 0
invariant :TrainState_484 = 0
invariant :TrainState_487 = 0
invariant :TrainState_232 = 0
invariant :TrainState_167 + TrainState_213 = 0
invariant :TrainState_481 = 0
invariant :TrainState_475 = 0
invariant :TrainState_414 + TrainState_460 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 643
// Phase 1: matrix 643 rows 444 cols
invariant :TrainState_165 + TrainState_211 = 0
invariant :TrainState_372 + TrainState_417 + TrainState_463 = 0
invariant :TrainState_411 + TrainState_457 = 0
invariant :TrainState_370 + TrainState_415 + TrainState_461 = 0
invariant :TrainState_168 + TrainState_214 = 0
invariant :TrainState_412 + TrainState_458 = 0
invariant :TrainState_414 + TrainState_460 = 0
invariant :TrainState_126 + TrainState_171 + TrainState_217 = 0
invariant :TrainState_329 + TrainState_373 + TrainState_418 + TrainState_464 = 0
invariant :TrainState_330 + TrainState_374 + TrainState_419 + TrainState_465 = 0
invariant :TrainState_84 + TrainState_128 + TrainState_173 + TrainState_219 = 0
invariant :TrainState_124 + TrainState_169 + TrainState_215 = 0
invariant :TrainState_125 + TrainState_170 + TrainState_216 = 0
invariant :TrainState_83 + TrainState_127 + TrainState_172 + TrainState_218 = 0
invariant :TrainState_413 + TrainState_459 = 0
invariant :TrainState_371 + TrainState_416 + TrainState_462 = 0
invariant :TrainState_166 + TrainState_212 = 0
invariant :TrainState_167 + TrainState_213 = 0
Reachability property BART-COL-002-ReachabilityCardinality-06 does not hold.
FORMULA BART-COL-002-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : BART-COL-002-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityCardinality-06,0,6.25642,34192,1,0,5,8497,7,0,7489,3565,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1552429467838

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 12, 2019 10:23:29 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 12, 2019 10:23:29 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 12, 2019 10:23:29 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 12, 2019 10:23:30 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1288 ms
Mar 12, 2019 10:23:30 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 4 places.
Mar 12, 2019 10:23:30 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 12, 2019 10:23:30 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :speedXdist->StopTable,
distXspeedXdist->NewDistTable,
traincontext->TrainState,
distance->DistStation,

Mar 12, 2019 10:23:31 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
Mar 12, 2019 10:23:31 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 12, 2019 10:23:31 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 30 ms
Mar 12, 2019 10:23:31 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 10865 variables) in GAL type BART_COL_002
Mar 12, 2019 10:23:31 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10373 constant array cells/variables (out of 10865 variables) in type BART_COL_002
Mar 12, 2019 10:23:31 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: StopTable[0-245], DistStation[0-40], NewDistTable[0-10085],
Mar 12, 2019 10:23:33 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 1.458093333E9 instantiations of transitions. Total transitions/syncs built is 698
Mar 12, 2019 10:23:34 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 10865 variables) in GAL type BART_COL_002
Mar 12, 2019 10:23:34 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10421 constant array cells/variables (out of 10865 variables) in type BART_COL_002
Mar 12, 2019 10:23:34 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: StopTable[0-245], TrainState[206-209,226-245,452-455,472-491], DistStation[0-40], NewDistTable[0-10085],
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :StopTable[]
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :DistStation[]
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :NewDistTable[]
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 146331 expressions due to constant valuations.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :TrainDeccds2_0_1,TrainDeccds2_0_1,TrainDeccds2_0_1,TrainDeccds2_0_1,TrainDeccds2_0_1,
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5 redundant transitions.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-00 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-02 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-03 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property BART-COL-002-ReachabilityCardinality-07 is trivially true : it is verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-08 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property BART-COL-002-ReachabilityCardinality-10 is trivially true : it is verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-11 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property BART-COL-002-ReachabilityCardinality-12 is trivially true : it is verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property BART-COL-002-ReachabilityCardinality-14 is trivially false : it is not verified in initial state.
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 10 uncalled transitions from type BART_COL_002
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 48299 ms
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 48 fixed domain variables (out of 492 variables) in GAL type BART_COL_002_flat
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 48 constant array cells/variables (out of 492 variables) in type BART_COL_002_flat
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: TrainState_245,TrainState_231,TrainState_230,TrainState_482,TrainState_235,TrainState_241,TrainState_480,TrainState_452,TrainState_453,TrainState_243,TrainState_477,TrainState_486,TrainState_240,TrainState_232,TrainState_481,TrainState_473,TrainState_227,TrainState_206,TrainState_233,TrainState_475,TrainState_454,TrainState_490,TrainState_228,TrainState_239,TrainState_207,TrainState_209,TrainState_474,TrainState_455,TrainState_472,TrainState_237,TrainState_485,TrainState_478,TrainState_244,TrainState_489,TrainState_488,TrainState_476,TrainState_483,TrainState_238,TrainState_484,TrainState_491,TrainState_487,TrainState_242,TrainState_479,TrainState_234,TrainState_208,TrainState_226,TrainState_229,TrainState_236,
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 48 fixed domain variables (out of 492 variables) in GAL type BART_COL_002_flat
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 48 constant array cells/variables (out of 492 variables) in type BART_COL_002_flat
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: TrainState_245,TrainState_231,TrainState_230,TrainState_482,TrainState_235,TrainState_241,TrainState_480,TrainState_452,TrainState_453,TrainState_243,TrainState_477,TrainState_486,TrainState_240,TrainState_232,TrainState_481,TrainState_473,TrainState_227,TrainState_206,TrainState_233,TrainState_475,TrainState_454,TrainState_490,TrainState_228,TrainState_239,TrainState_207,TrainState_209,TrainState_474,TrainState_455,TrainState_472,TrainState_237,TrainState_485,TrainState_478,TrainState_244,TrainState_489,TrainState_488,TrainState_476,TrainState_483,TrainState_238,TrainState_484,TrainState_491,TrainState_487,TrainState_242,TrainState_479,TrainState_234,TrainState_208,TrainState_226,TrainState_229,TrainState_236,
Mar 12, 2019 10:24:19 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 48 constant variables :TrainState_245=0, TrainState_231=0, TrainState_230=0, TrainState_482=0, TrainState_235=0, TrainState_241=0, TrainState_480=0, TrainState_452=0, TrainState_453=0, TrainState_243=0, TrainState_477=0, TrainState_486=0, TrainState_240=0, TrainState_232=0, TrainState_481=0, TrainState_473=0, TrainState_227=0, TrainState_206=0, TrainState_233=0, TrainState_475=0, TrainState_454=0, TrainState_490=0, TrainState_228=0, TrainState_239=0, TrainState_207=0, TrainState_209=0, TrainState_474=0, TrainState_455=0, TrainState_472=0, TrainState_237=0, TrainState_485=0, TrainState_478=0, TrainState_244=0, TrainState_489=0, TrainState_488=0, TrainState_476=0, TrainState_483=0, TrainState_238=0, TrainState_484=0, TrainState_491=0, TrainState_487=0, TrainState_242=0, TrainState_479=0, TrainState_234=0, TrainState_208=0, TrainState_226=0, TrainState_229=0, TrainState_236=0
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 194 ms
Mar 12, 2019 10:24:20 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 34 ms
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 48 fixed domain variables (out of 492 variables) in GAL type BART_COL_002_flat
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 48 constant array cells/variables (out of 492 variables) in type BART_COL_002_flat
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: TrainState_238,TrainState_243,TrainState_207,TrainState_491,TrainState_481,TrainState_476,TrainState_240,TrainState_245,TrainState_244,TrainState_486,TrainState_453,TrainState_233,TrainState_241,TrainState_479,TrainState_235,TrainState_226,TrainState_454,TrainState_484,TrainState_208,TrainState_232,TrainState_480,TrainState_478,TrainState_487,TrainState_231,TrainState_228,TrainState_488,TrainState_482,TrainState_242,TrainState_209,TrainState_239,TrainState_474,TrainState_230,TrainState_234,TrainState_483,TrainState_473,TrainState_489,TrainState_490,TrainState_455,TrainState_236,TrainState_472,TrainState_475,TrainState_206,TrainState_229,TrainState_237,TrainState_452,TrainState_477,TrainState_227,TrainState_485,
Mar 12, 2019 10:24:20 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 48 fixed domain variables (out of 492 variables) in GAL type BART_COL_002_flat
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 48 constant array cells/variables (out of 492 variables) in type BART_COL_002_flat
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: TrainState_238,TrainState_243,TrainState_207,TrainState_491,TrainState_481,TrainState_476,TrainState_240,TrainState_245,TrainState_244,TrainState_486,TrainState_453,TrainState_233,TrainState_241,TrainState_479,TrainState_235,TrainState_226,TrainState_454,TrainState_484,TrainState_208,TrainState_232,TrainState_480,TrainState_478,TrainState_487,TrainState_231,TrainState_228,TrainState_488,TrainState_482,TrainState_242,TrainState_209,TrainState_239,TrainState_474,TrainState_230,TrainState_234,TrainState_483,TrainState_473,TrainState_489,TrainState_490,TrainState_455,TrainState_236,TrainState_472,TrainState_475,TrainState_206,TrainState_229,TrainState_237,TrainState_452,TrainState_477,TrainState_227,TrainState_485,
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 48 constant variables :TrainState_238=0, TrainState_243=0, TrainState_207=0, TrainState_491=0, TrainState_481=0, TrainState_476=0, TrainState_240=0, TrainState_245=0, TrainState_244=0, TrainState_486=0, TrainState_453=0, TrainState_233=0, TrainState_241=0, TrainState_479=0, TrainState_235=0, TrainState_226=0, TrainState_454=0, TrainState_484=0, TrainState_208=0, TrainState_232=0, TrainState_480=0, TrainState_478=0, TrainState_487=0, TrainState_231=0, TrainState_228=0, TrainState_488=0, TrainState_482=0, TrainState_242=0, TrainState_209=0, TrainState_239=0, TrainState_474=0, TrainState_230=0, TrainState_234=0, TrainState_483=0, TrainState_473=0, TrainState_489=0, TrainState_490=0, TrainState_455=0, TrainState_236=0, TrainState_472=0, TrainState_475=0, TrainState_206=0, TrainState_229=0, TrainState_237=0, TrainState_452=0, TrainState_477=0, TrainState_227=0, TrainState_485=0
Mar 12, 2019 10:24:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 93 ms
Mar 12, 2019 10:24:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 610 transitions. Expanding to a total of 682 deterministic transitions.
Mar 12, 2019 10:24:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 610 transitions. Expanding to a total of 682 deterministic transitions.
Mar 12, 2019 10:24:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 99 ms.
Mar 12, 2019 10:24:21 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 162 ms.
Mar 12, 2019 10:24:22 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 66 place invariants in 221 ms
Mar 12, 2019 10:24:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 1 in 2736 ms.
Mar 12, 2019 10:24:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 610 transitions. Expanding to a total of 682 deterministic transitions.
Mar 12, 2019 10:24:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 1 ms.
Mar 12, 2019 10:24:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityCardinality-06(UNSAT) depth K=0 took 654 ms
Mar 12, 2019 10:24:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 18 place invariants in 159 ms
Mar 12, 2019 10:24:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityCardinality-06(UNSAT) depth K=1 took 1938 ms
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception :(error "Failed to assert expression: java.io.IOException: Broken pipe false")
Exception in thread "Thread-8" java.lang.RuntimeException: SMT solver raised an exception :(error "Failed to assert expression: java.io.IOException: Broken pipe false")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.assertCouldModifyNext(KInductionSolver.java:212)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:90)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying BART-COL-002-ReachabilityCardinality-06 SMT depth 2
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 1 properties. Interrupting other analysis methods.
Mar 12, 2019 10:24:27 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6894ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-002"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is BART-COL-002, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r019-csrt-155225080100251"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-002.tgz
mv BART-COL-002 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;