fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r019-csrt-155225080000196
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for AutoFlight-PT-24a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4267.840 414617.00 1237968.00 310.30 FFFFFFFFFFFFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r019-csrt-155225080000196.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is AutoFlight-PT-24a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r019-csrt-155225080000196
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 332K
-rw-r--r-- 1 mcc users 3.1K Feb 9 07:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 9 07:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 03:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 5 03:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 104 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 342 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 22:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.3K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 2 00:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 2 00:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Jan 29 11:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Jan 29 11:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:18 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 169K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-00
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-01
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-02
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-03
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-04
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-05
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-06
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-07
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-08
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-09
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-10
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-11
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-12
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-13
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-14
FORMULA_NAME AutoFlight-PT-24a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552425464997

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(u20.p47>=1)"))
Formula 0 simplified : !"(u20.p47>=1)"
built 219 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 485 rows 607 cols
invariant :u27:p63 + u148:p0 = 1
invariant :u115:p232 + u115:p233 + u148:p0 = 1
invariant :u139:p557 + u139:p558 + u139:p559 + u139:p560 + u139:p561 + u139:p562 + u148:p0 = 1
invariant :u134:p527 + u134:p528 + u134:p529 + u134:p530 + u134:p531 + u134:p532 + u148:p0 = 1
invariant :u76:p174 + u148:p0 = 1
invariant :u135:p533 + u135:p534 + u135:p535 + u135:p536 + u135:p537 + u135:p538 + u148:p0 = 1
invariant :u106:p219 + u148:p0 = 1
invariant :u64:p148 + u64:p149 + u64:p150 + u148:p0 = 1
invariant :u114:p231 + u148:p0 = 1
invariant :u104:p216 + u148:p0 = 1
invariant :u40:p92 + u40:p93 + u40:p94 + u148:p0 = 1
invariant :u96:p204 + u148:p0 = 1
invariant :u3:p7 + u148:p0 = 1
invariant :u57:p133 + u148:p0 = 1
invariant :u97:p205 + u97:p206 + u148:p0 = 1
invariant :u103:p214 + u103:p215 + u148:p0 = 1
invariant :u62:p144 + u62:p145 + u62:p146 + u148:p0 = 1
invariant :u83:p184 + u83:p185 + u148:p0 = 1
invariant :u126:p479 + u126:p480 + u126:p481 + u126:p482 + u126:p483 + u126:p484 + u148:p0 = 1
invariant :u92:p198 + u148:p0 = 1
invariant :u121:p241 + u121:p242 + u121:p243 + u121:p244 + u121:p245 + u121:p246 + u121:p247 + u121:p248 + u121:p249 + u121:p250 + u121:p251 + u121:p252 + u121:p253 + u121:p254 + u121:p255 + u121:p256 + u121:p257 + u121:p258 + u121:p259 + u121:p260 + u121:p261 + u121:p262 + u121:p263 + u121:p264 + u121:p265 + u121:p266 + u121:p267 + u121:p268 + u121:p269 + u121:p270 + u121:p271 + u121:p272 + u121:p273 + u121:p274 + u121:p275 + u121:p276 + u121:p277 + u121:p278 + u121:p279 + u121:p280 + u121:p281 + u121:p282 + u121:p283 + u121:p284 + u121:p285 + u121:p286 + u121:p287 + u121:p288 + u121:p289 + u121:p290 + u121:p291 + u121:p292 + u121:p293 + u121:p294 + u121:p295 + u121:p296 + u121:p297 + u121:p298 + u121:p299 + u121:p300 + u121:p301 + u121:p302 + u121:p303 + u121:p304 + u121:p305 + u121:p306 + u121:p307 + u121:p308 + u121:p309 + u121:p310 + u121:p311 + u121:p312 + u121:p313 + u121:p314 + u121:p315 + u121:p316 + u121:p317 + u121:p318 + u121:p319 + u121:p320 + u121:p321 + u121:p322 + u121:p323 + u121:p324 + u121:p325 + u121:p326 + u121:p327 + u121:p328 + u121:p329 + u121:p330 + u121:p331 + u121:p332 + u121:p333 + u121:p334 + u121:p335 + u121:p336 + u121:p337 + u121:p338 + u121:p339 + u121:p340 + u121:p341 + u121:p342 + u121:p343 + u121:p344 + u121:p345 + u121:p346 + u121:p347 + u121:p348 + u121:p349 + u121:p350 + u121:p351 + u121:p352 + u121:p353 + u121:p354 + u121:p355 + u121:p356 + u121:p357 + u121:p358 + u121:p359 + u121:p360 + u121:p361 + -1'u122:p460 + -1'u123:p466 + -1'u124:p472 + -1'u125:p478 + -1'u126:p484 + -1'u127:p490 + -1'u128:p496 + -1'u129:p502 + -1'u130:p508 + -1'u131:p514 + -1'u132:p520 + -1'u133:p526 + -1'u134:p532 + -1'u135:p538 + -1'u136:p544 + -1'u137:p550 + -1'u138:p556 + -1'u139:p562 + -1'u140:p568 + -1'u141:p574 + -1'u142:p580 + -1'u143:p586 + -1'u144:p592 + -1'u145:p598 + -1'u146:p604 + -1'u147:p606 + -25'u148:p0 = -25
invariant :u142:p575 + u142:p576 + u142:p577 + u142:p578 + u142:p579 + u142:p580 + u148:p0 = 1
invariant :u86:p189 + u148:p0 = 1
invariant :u20:p46 + u20:p47 + u20:p48 + u148:p0 = 1
invariant :u29:p67 + u29:p68 + u29:p69 + u148:p0 = 1
invariant :u39:p91 + u148:p0 = 1
invariant :u117:p235 + u117:p236 + u148:p0 = 1
invariant :u136:p539 + u136:p540 + u136:p541 + u136:p542 + u136:p543 + u136:p544 + u148:p0 = 1
invariant :u72:p168 + u148:p0 = 1
invariant :u32:p74 + u32:p75 + u32:p76 + u148:p0 = 1
invariant :u69:p161 + u148:p0 = 1
invariant :u118:p237 + u148:p0 = 1
invariant :u137:p545 + u137:p546 + u137:p547 + u137:p548 + u137:p549 + u137:p550 + u148:p0 = 1
invariant :u44:p102 + u44:p103 + u44:p104 + u148:p0 = 1
invariant :u100:p210 + u148:p0 = 1
invariant :u140:p563 + u140:p564 + u140:p565 + u140:p566 + u140:p567 + u140:p568 + u148:p0 = 1
invariant :u37:p85 + u37:p86 + u37:p87 + u148:p0 = 1
invariant :u75:p172 + u75:p173 + u148:p0 = 1
invariant :u53:p123 + u53:p124 + u53:p125 + u148:p0 = 1
invariant :u105:p217 + u105:p218 + u148:p0 = 1
invariant :u108:p222 + u148:p0 = 1
invariant :u7:p15 + u7:p16 + u7:p17 + u148:p0 = 1
invariant :u87:p190 + u87:p191 + u148:p0 = 1
invariant :u51:p119 + u148:p0 = 1
invariant :u31:p71 + u31:p72 + u31:p73 + u148:p0 = 1
invariant :u56:p130 + u56:p131 + u56:p132 + u148:p0 = 1
invariant :u93:p199 + u93:p200 + u148:p0 = 1
invariant :u49:p113 + u49:p114 + u49:p115 + u148:p0 = 1
invariant :u43:p99 + u43:p100 + u43:p101 + u148:p0 = 1
invariant :u145:p593 + u145:p594 + u145:p595 + u145:p596 + u145:p597 + u145:p598 + u148:p0 = 1
invariant :u98:p207 + u148:p0 = 1
invariant :u71:p165 + u71:p166 + u71:p167 + u148:p0 = 1
invariant :u59:p137 + u59:p138 + u59:p139 + u148:p0 = 1
invariant :u124:p467 + u124:p468 + u124:p469 + u124:p470 + u124:p471 + u124:p472 + u148:p0 = 1
invariant :u68:p158 + u68:p159 + u68:p160 + u148:p0 = 1
invariant :u79:p178 + u79:p179 + u148:p0 = 1
invariant :u38:p88 + u38:p89 + u38:p90 + u148:p0 = 1
invariant :u60:p140 + u148:p0 = 1
invariant :u41:p95 + u41:p96 + u41:p97 + u148:p0 = 1
invariant :u8:p18 + u8:p19 + u8:p20 + u148:p0 = 1
invariant :u52:p120 + u52:p121 + u52:p122 + u148:p0 = 1
invariant :u129:p497 + u129:p498 + u129:p499 + u129:p500 + u129:p501 + u129:p502 + u148:p0 = 1
invariant :u24:p56 + u148:p0 = 1
invariant :u42:p98 + u148:p0 = 1
invariant :u66:p154 + u148:p0 = 1
invariant :u36:p84 + u148:p0 = 1
invariant :u12:p28 + u148:p0 = 1
invariant :u138:p551 + u138:p552 + u138:p553 + u138:p554 + u138:p555 + u138:p556 + u148:p0 = 1
invariant :u74:p171 + u148:p0 = 1
invariant :u109:p223 + u109:p224 + u148:p0 = 1
invariant :u33:p77 + u148:p0 = 1
invariant :u123:p461 + u123:p462 + u123:p463 + u123:p464 + u123:p465 + u123:p466 + u148:p0 = 1
invariant :u121:p362 + u122:p460 + u123:p466 + u124:p472 + u125:p478 + u126:p484 + u127:p490 + u128:p496 + u129:p502 + u130:p508 + u131:p514 + u132:p520 + u133:p526 + u134:p532 + u135:p538 + u136:p544 + u137:p550 + u138:p556 + u139:p562 + u140:p568 + u141:p574 + u142:p580 + u143:p586 + u144:p592 + u145:p598 + u146:p604 + u147:p606 + 26'u148:p0 = 26
invariant :u22:p50 + u22:p51 + u22:p52 + u148:p0 = 1
invariant :u46:p106 + u46:p107 + u46:p108 + u148:p0 = 1
invariant :u25:p57 + u25:p58 + u25:p59 + u148:p0 = 1
invariant :u116:p234 + u148:p0 = 1
invariant :u119:p238 + u119:p239 + u148:p0 = 1
invariant :u47:p109 + u47:p110 + u47:p111 + u148:p0 = 1
invariant :u122:p363 + u122:p364 + u122:p365 + u122:p366 + u122:p367 + u122:p368 + u122:p369 + u122:p370 + u122:p371 + u122:p372 + u122:p373 + u122:p374 + u122:p375 + u122:p376 + u122:p377 + u122:p378 + u122:p379 + u122:p380 + u122:p381 + u122:p382 + u122:p383 + u122:p384 + u122:p385 + u122:p386 + u122:p387 + u122:p388 + u122:p389 + u122:p390 + u122:p391 + u122:p392 + u122:p393 + u122:p394 + u122:p395 + u122:p396 + u122:p397 + u122:p398 + u122:p399 + u122:p400 + u122:p401 + u122:p402 + u122:p403 + u122:p404 + u122:p405 + u122:p406 + u122:p407 + u122:p408 + u122:p409 + u122:p410 + u122:p411 + u122:p412 + u122:p413 + u122:p414 + u122:p415 + u122:p416 + u122:p417 + u122:p418 + u122:p419 + u122:p420 + u122:p421 + u122:p422 + u122:p423 + u122:p424 + u122:p425 + u122:p426 + u122:p427 + u122:p428 + u122:p429 + u122:p430 + u122:p431 + u122:p432 + u122:p433 + u122:p434 + u122:p435 + u122:p436 + u122:p437 + u122:p438 + u122:p439 + u122:p440 + u122:p441 + u122:p442 + u122:p443 + u122:p444 + u122:p445 + u122:p446 + u122:p447 + u122:p448 + u122:p449 + u122:p450 + u122:p451 + u122:p452 + u122:p453 + u122:p454 + u122:p455 + u122:p456 + u122:p457 + u122:p458 + u122:p459 + u122:p460 + u148:p0 = 1
invariant :u16:p36 + u16:p37 + u16:p38 + u148:p0 = 1
invariant :u45:p105 + u148:p0 = 1
invariant :u67:p155 + u67:p156 + u67:p157 + u148:p0 = 1
invariant :u128:p491 + u128:p492 + u128:p493 + u128:p494 + u128:p495 + u128:p496 + u148:p0 = 1
invariant :u127:p485 + u127:p486 + u127:p487 + u127:p488 + u127:p489 + u127:p490 + u148:p0 = 1
invariant :u5:p11 + u5:p12 + u5:p13 + u148:p0 = 1
invariant :u58:p134 + u58:p135 + u58:p136 + u148:p0 = 1
invariant :u120:p240 + u148:p0 = 1
invariant :u94:p201 + u148:p0 = 1
invariant :u90:p195 + u148:p0 = 1
invariant :u26:p60 + u26:p61 + u26:p62 + u148:p0 = 1
invariant :u55:p127 + u55:p128 + u55:p129 + u148:p0 = 1
invariant :u107:p220 + u107:p221 + u148:p0 = 1
invariant :u82:p183 + u148:p0 = 1
invariant :u15:p35 + u148:p0 = 1
invariant :u144:p587 + u144:p588 + u144:p589 + u144:p590 + u144:p591 + u144:p592 + u148:p0 = 1
invariant :u19:p43 + u19:p44 + u19:p45 + u148:p0 = 1
invariant :u6:p14 + u148:p0 = 1
invariant :u10:p22 + u10:p23 + u10:p24 + u148:p0 = 1
invariant :u77:p175 + u77:p176 + u148:p0 = 1
invariant :u91:p196 + u91:p197 + u148:p0 = 1
invariant :u11:p25 + u11:p26 + u11:p27 + u148:p0 = 1
invariant :u30:p70 + u148:p0 = 1
invariant :u125:p473 + u125:p474 + u125:p475 + u125:p476 + u125:p477 + u125:p478 + u148:p0 = 1
invariant :u146:p599 + u146:p600 + u146:p601 + u146:p602 + u146:p603 + u146:p604 + u148:p0 = 1
invariant :u17:p39 + u17:p40 + u17:p41 + u148:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u148:p0 = 1
invariant :u35:p81 + u35:p82 + u35:p83 + u148:p0 = 1
invariant :u28:p64 + u28:p65 + u28:p66 + u148:p0 = 1
invariant :u4:p8 + u4:p9 + u4:p10 + u148:p0 = 1
invariant :u18:p42 + u148:p0 = 1
invariant :u34:p78 + u34:p79 + u34:p80 + u148:p0 = 1
invariant :u63:p147 + u148:p0 = 1
invariant :u13:p29 + u13:p30 + u13:p31 + u148:p0 = 1
invariant :u89:p193 + u89:p194 + u148:p0 = 1
invariant :u99:p208 + u99:p209 + u148:p0 = 1
invariant :u65:p151 + u65:p152 + u65:p153 + u148:p0 = 1
invariant :u81:p181 + u81:p182 + u148:p0 = 1
invariant :u84:p186 + u148:p0 = 1
invariant :u2:p4 + u2:p5 + u2:p6 + u148:p0 = 1
invariant :u143:p581 + u143:p582 + u143:p583 + u143:p584 + u143:p585 + u143:p586 + u148:p0 = 1
invariant :u112:p228 + u148:p0 = 1
invariant :u54:p126 + u148:p0 = 1
invariant :u113:p229 + u113:p230 + u148:p0 = 1
invariant :u9:p21 + u148:p0 = 1
invariant :u101:p211 + u101:p212 + u148:p0 = 1
invariant :u110:p225 + u148:p0 = 1
invariant :u61:p141 + u61:p142 + u61:p143 + u148:p0 = 1
invariant :u131:p509 + u131:p510 + u131:p511 + u131:p512 + u131:p513 + u131:p514 + u148:p0 = 1
invariant :u70:p162 + u70:p163 + u70:p164 + u148:p0 = 1
invariant :u50:p116 + u50:p117 + u50:p118 + u148:p0 = 1
invariant :u141:p569 + u141:p570 + u141:p571 + u141:p572 + u141:p573 + u141:p574 + u148:p0 = 1
invariant :u95:p202 + u95:p203 + u148:p0 = 1
invariant :u102:p213 + u148:p0 = 1
invariant :u14:p32 + u14:p33 + u14:p34 + u148:p0 = 1
invariant :u147:p605 + u147:p606 + u148:p0 = 1
invariant :u133:p521 + u133:p522 + u133:p523 + u133:p524 + u133:p525 + u133:p526 + u148:p0 = 1
invariant :u21:p49 + u148:p0 = 1
invariant :u88:p192 + u148:p0 = 1
invariant :u23:p53 + u23:p54 + u23:p55 + u148:p0 = 1
invariant :u130:p503 + u130:p504 + u130:p505 + u130:p506 + u130:p507 + u130:p508 + u148:p0 = 1
invariant :u85:p187 + u85:p188 + u148:p0 = 1
invariant :u48:p112 + u148:p0 = 1
invariant :u132:p515 + u132:p516 + u132:p517 + u132:p518 + u132:p519 + u132:p520 + u148:p0 = 1
invariant :u73:p169 + u73:p170 + u148:p0 = 1
invariant :u80:p180 + u148:p0 = 1
invariant :u111:p226 + u111:p227 + u148:p0 = 1
invariant :u78:p177 + u148:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 8171 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 78 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6131 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6753 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8602 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>(((LTLAP3==true))U((LTLAP4==true))))U(<>(<>(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4470 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8225 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9206 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6600 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]([](((LTLAP9==true))U((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33527 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7733 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7815 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8293 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X(((LTLAP14==true))U((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3683 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((<>(<>((LTLAP16==true))))U(X(<>((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3379 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7621 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((((LTLAP19==true))U((LTLAP20==true)))U(<>([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8077 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6732 ms.
FORMULA AutoFlight-PT-24a-LTLFireability-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552425879614

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 140 ms
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 607 places.
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 605 transitions.
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 12, 2019 9:17:47 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 221 ms
Mar 12, 2019 9:17:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 112 ms
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t308,t308,t308,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t306,t306,t306,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t291,t291,t291,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 50 events :t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t579,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,t553,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t290,t290,t290,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t310,t310,t310,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t297,t297,t297,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t299,t299,t299,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t304,t304,t304,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t305,t305,t305,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t294,t294,t294,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t301,t301,t301,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t300,t300,t300,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t309,t309,t309,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t302,t302,t302,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t293,t293,t293,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t311,t311,t311,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t289,t289,t289,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t307,t307,t307,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t312,t312,t312,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t295,t295,t295,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t303,t303,t303,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t296,t296,t296,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t292,t292,t292,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t298,t298,t298,
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 122 redundant transitions.
Mar 12, 2019 9:17:48 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 254 ms
Mar 12, 2019 9:17:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 30 ms
Mar 12, 2019 9:17:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 7 ms
Mar 12, 2019 9:17:49 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 120 identical transitions.
Mar 12, 2019 9:17:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 485 transitions.
Mar 12, 2019 9:17:50 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 148 place invariants in 563 ms
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 607 variables to be positive in 8870 ms
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 485 transitions.
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/485 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 52 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 485 transitions.
Mar 12, 2019 9:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 66 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 12, 2019 9:18:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 485 transitions.
Mar 12, 2019 9:18:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/485) took 3530 ms. Total solver calls (SAT/UNSAT): 484(0/484)
Mar 12, 2019 9:18:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/485) took 6624 ms. Total solver calls (SAT/UNSAT): 610(12/598)
Mar 12, 2019 9:18:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/485) took 9692 ms. Total solver calls (SAT/UNSAT): 715(22/693)
Mar 12, 2019 9:18:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/485) took 13884 ms. Total solver calls (SAT/UNSAT): 908(196/712)
Mar 12, 2019 9:18:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/485) took 18619 ms. Total solver calls (SAT/UNSAT): 1079(367/712)
Mar 12, 2019 9:18:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/485) took 21768 ms. Total solver calls (SAT/UNSAT): 1249(537/712)
Mar 12, 2019 9:18:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/485) took 25842 ms. Total solver calls (SAT/UNSAT): 1418(706/712)
Mar 12, 2019 9:18:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/485) took 29299 ms. Total solver calls (SAT/UNSAT): 1586(874/712)
Mar 12, 2019 9:18:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/485) took 35488 ms. Total solver calls (SAT/UNSAT): 1919(1207/712)
Mar 12, 2019 9:18:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/485) took 38544 ms. Total solver calls (SAT/UNSAT): 2084(1372/712)
Mar 12, 2019 9:18:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/485) took 43673 ms. Total solver calls (SAT/UNSAT): 2411(1699/712)
Mar 12, 2019 9:18:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/485) took 49044 ms. Total solver calls (SAT/UNSAT): 2734(2022/712)
Mar 12, 2019 9:19:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/485) took 54114 ms. Total solver calls (SAT/UNSAT): 2894(2182/712)
Mar 12, 2019 9:19:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/485) took 58771 ms. Total solver calls (SAT/UNSAT): 3211(2499/712)
Mar 12, 2019 9:19:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/485) took 61958 ms. Total solver calls (SAT/UNSAT): 3524(2812/712)
Mar 12, 2019 9:19:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/485) took 65104 ms. Total solver calls (SAT/UNSAT): 3833(3121/712)
Mar 12, 2019 9:19:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/485) took 69424 ms. Total solver calls (SAT/UNSAT): 3986(3274/712)
Mar 12, 2019 9:19:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/485) took 74647 ms. Total solver calls (SAT/UNSAT): 4289(3577/712)
Mar 12, 2019 9:19:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/485) took 80608 ms. Total solver calls (SAT/UNSAT): 4588(3876/712)
Mar 12, 2019 9:19:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/485) took 85283 ms. Total solver calls (SAT/UNSAT): 4883(4171/712)
Mar 12, 2019 9:19:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/485) took 88660 ms. Total solver calls (SAT/UNSAT): 5318(4606/712)
Mar 12, 2019 9:19:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/485) took 94227 ms. Total solver calls (SAT/UNSAT): 5603(4891/712)
Mar 12, 2019 9:19:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/485) took 97534 ms. Total solver calls (SAT/UNSAT): 5884(5172/712)
Mar 12, 2019 9:19:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/485) took 100960 ms. Total solver calls (SAT/UNSAT): 6023(5311/712)
Mar 12, 2019 9:19:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/485) took 104512 ms. Total solver calls (SAT/UNSAT): 6161(5449/712)
Mar 12, 2019 9:20:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/485) took 112281 ms. Total solver calls (SAT/UNSAT): 6434(5722/712)
Mar 12, 2019 9:20:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/485) took 115339 ms. Total solver calls (SAT/UNSAT): 6569(5857/712)
Mar 12, 2019 9:20:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/485) took 119495 ms. Total solver calls (SAT/UNSAT): 6836(6124/712)
Mar 12, 2019 9:20:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/485) took 123724 ms. Total solver calls (SAT/UNSAT): 6968(6256/712)
Mar 12, 2019 9:20:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/485) took 127976 ms. Total solver calls (SAT/UNSAT): 7099(6387/712)
Mar 12, 2019 9:20:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/485) took 131596 ms. Total solver calls (SAT/UNSAT): 7229(6517/712)
Mar 12, 2019 9:20:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/485) took 134604 ms. Total solver calls (SAT/UNSAT): 7358(6646/712)
Mar 12, 2019 9:20:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/485) took 138991 ms. Total solver calls (SAT/UNSAT): 7613(6901/712)
Mar 12, 2019 9:20:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/485) took 142811 ms. Total solver calls (SAT/UNSAT): 7739(7027/712)
Mar 12, 2019 9:20:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/485) took 145913 ms. Total solver calls (SAT/UNSAT): 7864(7152/712)
Mar 12, 2019 9:20:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/485) took 150256 ms. Total solver calls (SAT/UNSAT): 7988(7274/714)
Mar 12, 2019 9:20:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/485) took 154193 ms. Total solver calls (SAT/UNSAT): 8112(7395/717)
Mar 12, 2019 9:20:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/485) took 157734 ms. Total solver calls (SAT/UNSAT): 8234(7515/719)
Mar 12, 2019 9:20:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/485) took 161687 ms. Total solver calls (SAT/UNSAT): 8476(7752/724)
Mar 12, 2019 9:20:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/485) took 166396 ms. Total solver calls (SAT/UNSAT): 8714(7985/729)
Mar 12, 2019 9:21:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/485) took 171340 ms. Total solver calls (SAT/UNSAT): 8948(8214/734)
Mar 12, 2019 9:21:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/485) took 174522 ms. Total solver calls (SAT/UNSAT): 9064(8327/737)
Mar 12, 2019 9:21:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/485) took 180832 ms. Total solver calls (SAT/UNSAT): 9292(8550/742)
Mar 12, 2019 9:21:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/485) took 185232 ms. Total solver calls (SAT/UNSAT): 9516(8769/747)
Mar 12, 2019 9:21:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/485) took 189256 ms. Total solver calls (SAT/UNSAT): 9736(8984/752)
Mar 12, 2019 9:21:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/485) took 194879 ms. Total solver calls (SAT/UNSAT): 9952(9195/757)
Mar 12, 2019 9:21:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/485) took 199331 ms. Total solver calls (SAT/UNSAT): 10164(9402/762)
Mar 12, 2019 9:21:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/485) took 203480 ms. Total solver calls (SAT/UNSAT): 10474(9705/769)
Mar 12, 2019 9:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/485) took 207851 ms. Total solver calls (SAT/UNSAT): 10673(9804/869)
Mar 12, 2019 9:21:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/485) took 210995 ms. Total solver calls (SAT/UNSAT): 11413(9804/1609)
Mar 12, 2019 9:21:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/485) took 214028 ms. Total solver calls (SAT/UNSAT): 12479(9804/2675)
Mar 12, 2019 9:21:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/485) took 217838 ms. Total solver calls (SAT/UNSAT): 12773(9804/2969)
Mar 12, 2019 9:21:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/485) took 222348 ms. Total solver calls (SAT/UNSAT): 13438(9804/3634)
Mar 12, 2019 9:21:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/485) took 226532 ms. Total solver calls (SAT/UNSAT): 14054(9804/4250)
Mar 12, 2019 9:22:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(170/485) took 230085 ms. Total solver calls (SAT/UNSAT): 14206(9804/4402)
Mar 12, 2019 9:22:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/485) took 233120 ms. Total solver calls (SAT/UNSAT): 14843(9804/5039)
Mar 12, 2019 9:22:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/485) took 236366 ms. Total solver calls (SAT/UNSAT): 15134(9812/5322)
Mar 12, 2019 9:22:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(229/485) took 239525 ms. Total solver calls (SAT/UNSAT): 15242(9823/5419)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Mar 12, 2019 9:22:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 241758 ms. Total solver calls (SAT/UNSAT): 15294(9830/5464)
Mar 12, 2019 9:22:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 485 transitions.
Mar 12, 2019 9:22:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2056 ms. Total solver calls (SAT/UNSAT): 868(0/868)
Mar 12, 2019 9:22:13 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 265033ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-24a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-24a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r019-csrt-155225080000196"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-24a.tgz
mv AutoFlight-PT-24a execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;