fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r204-oct2-155274856700269
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for QuasiCertifProtocol-PT-06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6089.070 514836.00 2036214.00 128.30 FFFFFTFFTTFFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r204-oct2-155274856700269.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r204-oct2-155274856700269
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 3.8K Feb 12 10:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 12 10:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 8 12:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 8 12:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 4.7K Feb 5 00:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 5 00:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K Feb 4 22:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Feb 4 13:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 39K Feb 4 13:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 10:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 1 10:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 4 22:26 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.0K Feb 4 22:26 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 153K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-00
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-01
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-02
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-03
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-04
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-08
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-10
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-11
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-12
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-13
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-14
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1554175864075

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
P-invariant computation with GreatSPN timed out. Skipping.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 with value :(!((((((((s2_1+s2_2)+s2_0)+s2_5)+s2_6)+s2_3)+s2_4)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))||(!(((((((Cstart_5+Cstart_4)+Cstart_3)+Cstart_2)+Cstart_6)+Cstart_1)+Cstart_0)<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6)<=((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5))||(!(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=2)&&((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)<=SstopAbort)||(((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=1))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 with value :((!(((((((n3_3+n3_2)+n3_1)+n3_0)+n3_6)+n3_4)+n3_5)>=2))||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 with value :(!((!(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)))&&((CstopAbort<=((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6))||(SstopAbort>=3))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 with value :((((AstopAbort>=3)||(((((((Cstart_5+Cstart_4)+Cstart_3)+Cstart_2)+Cstart_6)+Cstart_1)+Cstart_0)<=((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)))&&((((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=((((((n6_1+n6_2)+n6_0)+n6_5)+n6_6)+n6_3)+n6_4))||(AstopOK>=2)))||((!(Astart>=3))||((((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)>=3)&&(((((((((((((((((((((((((((((((((((((((((((((((((n8_2_0+n8_1_0)+n8_0_0)+n8_6_1)+n8_0_2)+n8_4_1)+n8_5_1)+n8_3_2)+n8_4_2)+n8_1_2)+n8_2_2)+n8_5_0)+n8_6_0)+n8_3_0)+n8_4_0)+n8_2_1)+n8_3_1)+n8_0_1)+n8_1_1)+n8_4_4)+n8_3_4)+n8_6_4)+n8_5_4)+n8_0_4)+n8_6_3)+n8_2_4)+n8_1_4)+n8_3_3)+n8_2_3)+n8_5_3)+n8_4_3)+n8_6_2)+n8_5_2)+n8_1_3)+n8_0_3)+n8_5_6)+n8_6_6)+n8_1_6)+n8_2_6)+n8_3_6)+n8_4_6)+n8_4_5)+n8_5_5)+n8_6_5)+n8_0_6)+n8_0_5)+n8_1_5)+n8_2_5)+n8_3_5)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 with value :(!((!(AstopOK>=2))||(!(((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)<=CstopAbort))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 with value :((((((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)>=3)&&(a4<=((((((n5_4+n5_5)+n5_2)+n5_3)+n5_0)+n5_1)+n5_6)))||((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))&&(Astart>=3)))&&((((((((CstopOK_0+CstopOK_1)+CstopOK_6)+CstopOK_5)+CstopOK_4)+CstopOK_3)+CstopOK_2)>=1)&&(a1>=1)))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 with value :(!(SstopOK_1<=n9_4_5))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 with value :(((n7_5_6>=1)||(!(a2>=3)))||(Sstart_1<=n8_1_1))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 with value :(n9_0_4<=n8_4_5)
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 with value :(n7_2_2<=n9_3_2)
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 with value :(!(((n7_3_6<=s2_3)||(a5>=2))&&((n7_0_2>=1)&&(n1_2>=3))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 with value :((!((n7_0_5<=n9_2_2)||(c1_5>=2)))&&(((n8_3_1>=3)&&(n1_5<=n5_5))||(n1_1<=CstopOK_1)))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 with value :((((n3_5>=1)&&(n1_2>=1))&&(!(Sstart_3>=1)))||(((s4_1<=n9_5_3)&&(Cstart_1>=1))||(!(n6_4>=1))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 with value :(!(((CstopAbort<=n8_6_3)&&(s3_4>=1))||((n9_1_3>=1)&&(n3_4>=2))))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 1575 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 46 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 60276 ms.
Invariant validated
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 137523 ms.
Invariant validated
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
LTSmin run took 3610 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 2344 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 28378 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 31409 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 37219 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 4552 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 106242 ms.
Invariant validated
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
LTSmin run took 2374 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 1576 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, QuasiCertifProtocolPT06ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 699 ms.
Found Violation
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1554176378911

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Apr 02, 2019 3:31:05 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Apr 02, 2019 3:31:05 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Apr 02, 2019 3:31:05 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 85 ms
Apr 02, 2019 3:31:05 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 270 places.
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 116 transitions.
Apr 02, 2019 3:31:06 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 10 ms
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 112 ms
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 73 ms
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 72 ms
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 270 places.
Apr 02, 2019 3:31:06 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 116 transitions.
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 725 ms.
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 167 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 43 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 12 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 22 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 48 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 17 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 13 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 6 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 25 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 11 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 19 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 9 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 20 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 22 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 10 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 16 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 13 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 13 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 40 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 203 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 8 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 29 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 8 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 9 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=1 took 8 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 20 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 8 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 18 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 18 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 12 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 4 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 15 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 6 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 117 ms
Apr 02, 2019 3:31:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 134 ms
Apr 02, 2019 3:31:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 598 ms
Apr 02, 2019 3:31:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 113 ms
Apr 02, 2019 3:31:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 143 ms
Apr 02, 2019 3:31:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 147 ms
Apr 02, 2019 3:31:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 70 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=2 took 210 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 102 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 162 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 114 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 119 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 76 ms
Apr 02, 2019 3:31:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 133 ms
Apr 02, 2019 3:31:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 111 ms
Apr 02, 2019 3:31:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 92 ms
Apr 02, 2019 3:31:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 3752 ms
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 8774 ms
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 116 transitions.
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/116 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 116 transitions.
Apr 02, 2019 3:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 02, 2019 3:31:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 3463 ms
Apr 02, 2019 3:31:18 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 11544 ms
Apr 02, 2019 3:31:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 2444 ms
Apr 02, 2019 3:31:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Apr 02, 2019 3:31:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=0 took 1340 ms
Apr 02, 2019 3:31:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Apr 02, 2019 3:31:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=0 took 3882 ms
Apr 02, 2019 3:31:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Apr 02, 2019 3:31:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=0 took 435 ms
Apr 02, 2019 3:31:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 5426 ms
Apr 02, 2019 3:31:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-03
Apr 02, 2019 3:31:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(SAT) depth K=0 took 1852 ms
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-04
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(SAT) depth K=0 took 1136 ms
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(TRUE) depth K=0 took 93 ms
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Apr 02, 2019 3:31:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(FALSE) depth K=0 took 88 ms
Apr 02, 2019 3:31:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Apr 02, 2019 3:31:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Apr 02, 2019 3:31:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(FALSE) depth K=0 took 4922 ms
Apr 02, 2019 3:31:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Apr 02, 2019 3:31:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=0 took 322 ms
Apr 02, 2019 3:31:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Apr 02, 2019 3:31:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Apr 02, 2019 3:31:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(TRUE) depth K=0 took 73 ms
Apr 02, 2019 3:31:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-10
Apr 02, 2019 3:31:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(SAT) depth K=0 took 365 ms
Apr 02, 2019 3:31:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-11
Apr 02, 2019 3:31:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(SAT) depth K=0 took 659 ms
Apr 02, 2019 3:31:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Apr 02, 2019 3:31:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=0 took 496 ms
Apr 02, 2019 3:31:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Apr 02, 2019 3:31:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=0 took 1520 ms
Apr 02, 2019 3:31:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 116 transitions.
Apr 02, 2019 3:31:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 1 ms
Apr 02, 2019 3:31:36 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Apr 02, 2019 3:31:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Apr 02, 2019 3:31:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=0 took 791 ms
Apr 02, 2019 3:31:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-15
Apr 02, 2019 3:31:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(SAT) depth K=0 took 768 ms
Apr 02, 2019 3:31:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=3 took 12466 ms
Apr 02, 2019 3:31:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/116) took 2474 ms. Total solver calls (SAT/UNSAT): 98(98/0)
Apr 02, 2019 3:31:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Apr 02, 2019 3:31:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=1 took 2060 ms
Apr 02, 2019 3:31:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=3 took 2973 ms
Apr 02, 2019 3:31:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Apr 02, 2019 3:31:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=1 took 1390 ms
Apr 02, 2019 3:31:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Apr 02, 2019 3:31:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=1 took 1833 ms
Apr 02, 2019 3:31:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=3 took 2553 ms
Apr 02, 2019 3:31:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/116) took 7124 ms. Total solver calls (SAT/UNSAT): 291(291/0)
Apr 02, 2019 3:31:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=3 took 2504 ms
Apr 02, 2019 3:31:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/116) took 10322 ms. Total solver calls (SAT/UNSAT): 480(480/0)
Apr 02, 2019 3:31:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/116) took 13819 ms. Total solver calls (SAT/UNSAT): 665(665/0)
Apr 02, 2019 3:31:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=3 took 5112 ms
Apr 02, 2019 3:31:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=3 took 892 ms
Apr 02, 2019 3:31:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=3 took 1323 ms
Apr 02, 2019 3:31:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-03
Apr 02, 2019 3:31:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(SAT) depth K=1 took 11295 ms
Apr 02, 2019 3:31:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=3 took 1305 ms
Apr 02, 2019 3:31:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/116) took 18393 ms. Total solver calls (SAT/UNSAT): 911(911/0)
Apr 02, 2019 3:31:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=3 took 1447 ms
Apr 02, 2019 3:31:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/116) took 21691 ms. Total solver calls (SAT/UNSAT): 1070(1070/0)
Apr 02, 2019 3:32:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=3 took 4967 ms
Apr 02, 2019 3:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/116) took 26123 ms. Total solver calls (SAT/UNSAT): 1301(1301/0)
Apr 02, 2019 3:32:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=3 took 3499 ms
Apr 02, 2019 3:32:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-04
Apr 02, 2019 3:32:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(SAT) depth K=1 took 11954 ms
Apr 02, 2019 3:32:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/116) took 30134 ms. Total solver calls (SAT/UNSAT): 1504(1468/36)
Apr 02, 2019 3:32:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=3 took 3348 ms
Apr 02, 2019 3:32:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/116) took 34271 ms. Total solver calls (SAT/UNSAT): 1720(1684/36)
Apr 02, 2019 3:32:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Apr 02, 2019 3:32:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=1 took 5583 ms
Apr 02, 2019 3:32:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/116) took 37765 ms. Total solver calls (SAT/UNSAT): 2060(2024/36)
Apr 02, 2019 3:32:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/116) took 40928 ms. Total solver calls (SAT/UNSAT): 2435(2399/36)
Apr 02, 2019 3:32:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-10
Apr 02, 2019 3:32:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(SAT) depth K=1 took 8717 ms
Apr 02, 2019 3:32:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/116) took 44797 ms. Total solver calls (SAT/UNSAT): 2774(2738/36)
Apr 02, 2019 3:32:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-11
Apr 02, 2019 3:32:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(SAT) depth K=1 took 3601 ms
Apr 02, 2019 3:32:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/116) took 48344 ms. Total solver calls (SAT/UNSAT): 3029(2993/36)
Apr 02, 2019 3:32:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/116) took 51619 ms. Total solver calls (SAT/UNSAT): 3259(3223/36)
Apr 02, 2019 3:32:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/116) took 54729 ms. Total solver calls (SAT/UNSAT): 3457(3421/36)
Apr 02, 2019 3:32:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Apr 02, 2019 3:32:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=1 took 7744 ms
Apr 02, 2019 3:32:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/116) took 57855 ms. Total solver calls (SAT/UNSAT): 3798(3748/50)
Apr 02, 2019 3:32:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/116) took 60877 ms. Total solver calls (SAT/UNSAT): 4085(4035/50)
Apr 02, 2019 3:32:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Apr 02, 2019 3:32:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=1 took 7482 ms
Apr 02, 2019 3:32:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 63061 ms. Total solver calls (SAT/UNSAT): 4323(4273/50)
Apr 02, 2019 3:32:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 116 transitions.
Apr 02, 2019 3:32:39 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Apr 02, 2019 3:32:40 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 93778ms conformant to PINS in folder :/home/mcc/execution
Apr 02, 2019 3:32:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=4 took 32862 ms
Apr 02, 2019 3:32:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Apr 02, 2019 3:32:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=1 took 13225 ms
Apr 02, 2019 3:32:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-15
Apr 02, 2019 3:32:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(SAT) depth K=1 took 6354 ms
Apr 02, 2019 3:33:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=4 took 67773 ms
Apr 02, 2019 3:35:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Apr 02, 2019 3:35:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=2 took 128379 ms
Apr 02, 2019 3:35:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Apr 02, 2019 3:35:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=2 took 41532 ms
Apr 02, 2019 3:36:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=4 took 135341 ms
Apr 02, 2019 3:36:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=4 took 27008 ms
Apr 02, 2019 3:36:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Apr 02, 2019 3:36:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=2 took 53379 ms
Apr 02, 2019 3:38:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=4 took 96209 ms
Apr 02, 2019 3:38:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Apr 02, 2019 3:38:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=2 took 112971 ms
Apr 02, 2019 3:38:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=4 took 39050 ms
Apr 02, 2019 3:38:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Apr 02, 2019 3:38:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=2 took 16008 ms
Apr 02, 2019 3:38:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Apr 02, 2019 3:38:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=2 took 6346 ms
Apr 02, 2019 3:39:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Apr 02, 2019 3:39:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=2 took 13187 ms
Apr 02, 2019 3:39:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=4 took 35562 ms
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 K-induction depth 2
Exception in thread "Thread-6" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Apr 02, 2019 3:39:38 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 4/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r204-oct2-155274856700269"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-06.tgz
mv QuasiCertifProtocol-PT-06 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;