Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r202-oct2-155297753700457.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is Vasy2003-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r202-oct2-155297753700457
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 4.8K Feb 12 21:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 12 21:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 9 05:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 9 05:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 103 Feb 24 15:06 GlobalProperties.txt
-rw-r--r-- 1 mcc users 341 Feb 24 15:06 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 01:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 5 01:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K Feb 4 22:50 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Feb 4 22:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 4 22:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 1 23:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 12K Feb 1 23:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 5 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 0 Jan 29 09:35 model-fix.log
-rw-r--r-- 1 mcc users 207K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Vasy2003-PT-none-LTLFireability-00
FORMULA_NAME Vasy2003-PT-none-LTLFireability-01
FORMULA_NAME Vasy2003-PT-none-LTLFireability-02
FORMULA_NAME Vasy2003-PT-none-LTLFireability-03
FORMULA_NAME Vasy2003-PT-none-LTLFireability-04
FORMULA_NAME Vasy2003-PT-none-LTLFireability-05
FORMULA_NAME Vasy2003-PT-none-LTLFireability-06
FORMULA_NAME Vasy2003-PT-none-LTLFireability-07
FORMULA_NAME Vasy2003-PT-none-LTLFireability-08
FORMULA_NAME Vasy2003-PT-none-LTLFireability-09
FORMULA_NAME Vasy2003-PT-none-LTLFireability-10
FORMULA_NAME Vasy2003-PT-none-LTLFireability-11
FORMULA_NAME Vasy2003-PT-none-LTLFireability-12
FORMULA_NAME Vasy2003-PT-none-LTLFireability-13
FORMULA_NAME Vasy2003-PT-none-LTLFireability-14
FORMULA_NAME Vasy2003-PT-none-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1554532454861

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((G(X(X(("((p377>=1)&&(p480>=1))")U("((p126>=1)&&(p260>=1))"))))))
Formula 0 simplified : !GXX("((p377>=1)&&(p480>=1))" U "((p126>=1)&&(p260>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 696
// Phase 1: matrix 696 rows 485 cols
invariant :p57 + p58 + -1'p123 = 0
invariant :p77 + p78 + -1'p123 = 0
invariant :p109 + -1'p184 + -1'p431 = 0
invariant :p101 + p102 + -1'p123 = 0
invariant :p95 + p96 + -1'p123 = 0
invariant :p1 + p2 + -1'p123 = 0
invariant :p81 + p82 + -1'p123 = 0
invariant :p112 + -1'p186 + -1'p433 = 0
invariant :p15 + p16 + -1'p123 = 0
invariant :p91 + p92 + -1'p123 = 0
invariant :p107 + p108 + -1'p123 = 0
invariant :p113 + p114 + -1'p123 + p186 + p433 = 0
invariant :p27 + p28 + p29 + p30 + p31 + p32 + -1'p123 = 0
invariant :-1'p123 + p192 + p440 + p451 + p452 + p453 + p454 + p455 + p456 + p457 + p458 + p459 + p460 + p461 + p462 + p463 + p465 + -1'p479 = 0
invariant :p21 + p22 + -1'p123 = 0
invariant :p0 + p123 = 1
invariant :p62 + p63 + -1'p123 = 0
invariant :p123 + -1'p190 + -1'p245 + -1'p248 + -1'p250 + -1'p303 + -1'p306 + -1'p438 + p481 + -1'p484 = 0
invariant :p48 + p49 + p53 + p54 + p55 + p56 + -1'p123 + p446 = 0
invariant :p11 + p12 + -1'p123 = 0
invariant :p17 + p18 + -1'p123 = 0
invariant :p99 + p100 + -1'p123 = 0
invariant :p75 + p76 + -1'p123 = 0
invariant :p105 + p106 + -1'p123 = 0
invariant :p23 + p24 + -1'p123 = 0
invariant :p9 + p10 + -1'p123 = 0
invariant :p110 + p111 + -1'p123 + p184 + p431 = 0
invariant :-1'p123 + p124 + p125 = 0
invariant :p59 + p60 + p61 + -1'p123 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + -1'p123 = 0
invariant :-1'p123 + p444 + p445 = 0
invariant :p3 + p4 + -1'p123 = 0
invariant :p119 + -1'p123 = 0
invariant :p85 + p86 + -1'p123 = 0
invariant :-1'p123 + p126 + p127 = 0
invariant :-1'p123 + p128 + p129 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p156 + p157 + p158 + p159 + p160 + p161 + p162 + p163 + p164 + p165 + p166 + p167 + p168 + p169 + p170 + p171 + p172 + p173 + p174 + p175 + p176 + p177 + p178 + p179 + p180 + p181 + p182 + p183 + p184 + p185 + p186 + p187 + p188 + p189 + p190 + p191 + p192 + p193 + p194 + p195 + p196 + p197 + p198 + p199 + p200 + p201 + p202 + p203 + p204 + p205 + p206 + p207 + p208 + p209 + p210 + p211 + p212 + p213 + p214 + p215 + p216 + p217 + p218 + p219 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + p230 + p231 + p232 + p233 + p234 + p235 + p236 + p237 + p238 + p239 + p240 + p241 + p242 + p243 + p244 + p245 + p246 + p247 + p248 + p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 + p260 + p261 + p262 + p263 + p264 + p265 + p266 + p267 + p268 + p269 + p270 + p271 + p272 + p273 + p274 + p275 + p276 + p277 + p278 + p279 + p280 + p281 + p282 + p283 + p284 + p285 + p286 + p287 + p288 + p289 + p290 + p291 + p292 + p293 + p294 + p295 + p296 + p297 + p298 + p299 + p300 + p301 + p302 + p303 + p304 + p305 + p306 + p307 + p308 + p309 + p310 + p311 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + p321 + p322 + p323 + p324 + p325 + p326 + p327 + p328 + p329 + p330 + p331 + p332 + p333 + p334 + p335 + p336 + p337 + p338 + p339 + p340 + p341 + p342 + p343 + p344 + p345 + p346 + p347 + p348 + p349 + p350 + p351 + p352 + p353 + p354 + p355 + p356 + p357 + p358 + p359 + p360 + p361 + p362 + p363 + p364 + p365 + p366 + p367 + p368 + p369 + p370 + p371 + p372 + p373 + p374 + p375 + p376 + p377 + p378 + p379 + p380 + p381 + p382 + p383 + p384 + p385 + p386 + p387 + p388 + p389 + p390 + p391 + p392 + p393 + p394 + p395 + p396 + p397 + p398 + p399 + p400 + p401 + p402 + p403 + p404 + p405 + p406 + p407 + p408 + p409 + p410 + p411 + p412 + p413 + p414 + p415 + p416 + p417 + p418 + p419 + p420 + p421 + p422 + p423 + p424 + p425 + p426 + p427 + p428 + p429 + p430 + p431 + p432 + p433 + p434 + p435 + p436 + p437 + p438 + p439 + p440 + p441 = 0
invariant :p116 + p117 + -1'p123 + p188 + p435 = 0
invariant :p83 + p84 + -1'p123 = 0
invariant :p120 + -1'p123 = 0
invariant :p25 + p26 + -1'p123 = 0
invariant :p103 + p104 + -1'p123 = 0
invariant :p64 + p65 + p66 + p67 + p68 + -1'p123 = 0
invariant :p93 + p94 + -1'p123 = 0
invariant :p5 + p6 + -1'p123 = 0
invariant :-1'p123 + p466 + p467 + p468 + p469 + p470 + p471 + p472 + p473 + p474 + p475 + p476 + p477 + p478 + p479 + p480 = 0
invariant :-1'p123 + p442 + p443 = 0
invariant :p89 + p90 + -1'p123 = 0
invariant :-2'p123 + p190 + p245 + p248 + p250 + p303 + p306 + p438 + p482 + p484 = 0
invariant :p79 + p80 + -1'p123 = 0
invariant :-1'p123 + p446 + p447 + p448 = 0
invariant :p118 + -1'p123 = 0
invariant :p115 + -1'p188 + -1'p435 = 0
invariant :p19 + p20 + -1'p123 = 0
invariant :-1'p123 + p449 + p450 = 0
invariant :p69 + p70 + p71 + -1'p123 = 0
invariant :p97 + p98 + -1'p123 = 0
invariant :p33 + p34 + p35 + p36 + p37 + p38 + -1'p123 = 0
invariant :-1'p192 + -1'p440 + p464 + p479 = 0
invariant :p72 + p73 + p74 + -1'p123 = 0
invariant :p122 + -1'p123 = 0
invariant :p87 + p88 + -1'p123 = 0
invariant :p13 + p14 + -1'p123 = 0
invariant :p45 + p46 + p47 + p50 + p51 + p52 + -1'p446 = 0
invariant :-1'p123 + p483 + p484 = 0
invariant :p7 + p8 + -1'p123 = 0
invariant :p121 + -1'p123 = 0
Reverse transition relation is NOT exact ! Due to transitions t6, t7, t8, t9, t10, t11, t68, t77, t564, t565, t566, t567, t568, t569, t570, t571, t572, t573, t576, t577, t597, t598, t601, t602, t643, t644, t666, t667, t668, t669, t670, t671, t672, t673, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :24/721/31/776
5 unique states visited
5 strongly connected components in search stack
6 transitions explored
5 items max in DFS search stack
11117 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,111.284,1923664,1,0,1126,6.52293e+06,1533,549,18602,3.33292e+06,1537
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA Vasy2003-PT-none-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(F("((p94>=1)&&(p114>=1))"))))
Formula 1 simplified : !F"((p94>=1)&&(p114>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,111.285,1923664,1,0,1127,6.52293e+06,1542,551,18605,3.33293e+06,1548
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA Vasy2003-PT-none-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((G(F(F(F(G("((p476>=1)&&(p482>=1))")))))))
Formula 2 simplified : !GFG"((p476>=1)&&(p482>=1))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10710 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 115 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>(<>([]((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14976 ms.
FORMULA Vasy2003-PT-none-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3493 ms.
FORMULA Vasy2003-PT-none-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((<>((LTLAP5==true)))U(<>((LTLAP6==true))))U([]([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15617 ms.
FORMULA Vasy2003-PT-none-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(<>(X((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5399 ms.
FORMULA Vasy2003-PT-none-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14422 ms.
FORMULA Vasy2003-PT-none-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(<>(X((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12821 ms.
FORMULA Vasy2003-PT-none-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>([](X(X((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4099 ms.
FORMULA Vasy2003-PT-none-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15845 ms.
FORMULA Vasy2003-PT-none-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](((LTLAP12==true))U((LTLAP13==true))))U(<>((LTLAP14==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15934 ms.
FORMULA Vasy2003-PT-none-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X((LTLAP15==true)))U([](<>(<>((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3353 ms.
FORMULA Vasy2003-PT-none-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3796 ms.
FORMULA Vasy2003-PT-none-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15043 ms.
FORMULA Vasy2003-PT-none-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14125 ms.
FORMULA Vasy2003-PT-none-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP19==true))U((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23513 ms.
FORMULA Vasy2003-PT-none-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1554533408932

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 111 ms
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 485 places.
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 776 transitions.
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Apr 06, 2019 6:34:16 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 21 ms
Apr 06, 2019 6:34:16 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 163 ms
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 120 ms
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 485 places.
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 776 transitions.
Apr 06, 2019 6:34:17 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
Apr 06, 2019 6:34:17 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Apr 06, 2019 6:34:17 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 66 place invariants in 202 ms
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 485 variables to be positive in 1113 ms
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 776 transitions.
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/776 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 60 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 776 transitions.
Apr 06, 2019 6:34:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 37 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 06, 2019 6:34:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 776 transitions.
Apr 06, 2019 6:34:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/776) took 91 ms. Total solver calls (SAT/UNSAT): 4(0/4)
Apr 06, 2019 6:34:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/776) took 5846 ms. Total solver calls (SAT/UNSAT): 419(415/4)
Apr 06, 2019 6:35:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/776) took 23711 ms. Total solver calls (SAT/UNSAT): 1117(1113/4)
Apr 06, 2019 6:35:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/776) took 27209 ms. Total solver calls (SAT/UNSAT): 1246(1242/4)
Apr 06, 2019 6:35:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/776) took 30378 ms. Total solver calls (SAT/UNSAT): 1495(1491/4)
Apr 06, 2019 6:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/776) took 79755 ms. Total solver calls (SAT/UNSAT): 2253(2247/6)
Apr 06, 2019 6:36:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/776) took 126573 ms. Total solver calls (SAT/UNSAT): 2998(2990/8)
Apr 06, 2019 6:37:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/776) took 171261 ms. Total solver calls (SAT/UNSAT): 3742(3732/10)
Apr 06, 2019 6:37:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/776) took 175150 ms. Total solver calls (SAT/UNSAT): 3864(3854/10)
Apr 06, 2019 6:37:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/776) took 179446 ms. Total solver calls (SAT/UNSAT): 4006(3996/10)
Apr 06, 2019 6:37:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/776) took 182587 ms. Total solver calls (SAT/UNSAT): 4146(4136/10)
Apr 06, 2019 6:37:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/776) took 200409 ms. Total solver calls (SAT/UNSAT): 4727(4717/10)
Apr 06, 2019 6:38:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/776) took 218794 ms. Total solver calls (SAT/UNSAT): 5281(5271/10)
Apr 06, 2019 6:38:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/776) took 222072 ms. Total solver calls (SAT/UNSAT): 5420(5410/10)
Apr 06, 2019 6:38:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/776) took 225552 ms. Total solver calls (SAT/UNSAT): 5554(5544/10)
Apr 06, 2019 6:38:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/776) took 230767 ms. Total solver calls (SAT/UNSAT): 5819(5809/10)
Apr 06, 2019 6:38:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/776) took 234445 ms. Total solver calls (SAT/UNSAT): 5950(5940/10)
Apr 06, 2019 6:38:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/776) took 237620 ms. Total solver calls (SAT/UNSAT): 6080(6070/10)
Apr 06, 2019 6:38:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/776) took 243652 ms. Total solver calls (SAT/UNSAT): 6337(6327/10)
Apr 06, 2019 6:38:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/776) took 247184 ms. Total solver calls (SAT/UNSAT): 6464(6454/10)
Apr 06, 2019 6:38:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/776) took 251805 ms. Total solver calls (SAT/UNSAT): 6860(6850/10)
Apr 06, 2019 6:38:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/776) took 257704 ms. Total solver calls (SAT/UNSAT): 7247(7237/10)
Apr 06, 2019 6:38:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/776) took 261093 ms. Total solver calls (SAT/UNSAT): 7374(7364/10)
Apr 06, 2019 6:39:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/776) took 264546 ms. Total solver calls (SAT/UNSAT): 7500(7490/10)
Apr 06, 2019 6:39:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/776) took 267640 ms. Total solver calls (SAT/UNSAT): 7702(7692/10)
Apr 06, 2019 6:39:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/776) took 288134 ms. Total solver calls (SAT/UNSAT): 8537(8527/10)
Apr 06, 2019 6:39:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/776) took 305898 ms. Total solver calls (SAT/UNSAT): 9108(9098/10)
Apr 06, 2019 6:39:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/776) took 322483 ms. Total solver calls (SAT/UNSAT): 9678(9668/10)
Apr 06, 2019 6:40:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/776) took 338628 ms. Total solver calls (SAT/UNSAT): 10247(10237/10)
Apr 06, 2019 6:40:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/776) took 354717 ms. Total solver calls (SAT/UNSAT): 10815(10805/10)
Apr 06, 2019 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/776) took 373148 ms. Total solver calls (SAT/UNSAT): 11382(11372/10)
Apr 06, 2019 6:41:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/776) took 389150 ms. Total solver calls (SAT/UNSAT): 11948(11938/10)
Apr 06, 2019 6:41:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/776) took 406358 ms. Total solver calls (SAT/UNSAT): 12513(12503/10)
Apr 06, 2019 6:41:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/776) took 425054 ms. Total solver calls (SAT/UNSAT): 13077(13067/10)
Apr 06, 2019 6:41:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/776) took 441491 ms. Total solver calls (SAT/UNSAT): 13640(13630/10)
Apr 06, 2019 6:42:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/776) took 459341 ms. Total solver calls (SAT/UNSAT): 14202(14192/10)
Apr 06, 2019 6:42:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/776) took 475253 ms. Total solver calls (SAT/UNSAT): 14763(14753/10)
Apr 06, 2019 6:42:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/776) took 492395 ms. Total solver calls (SAT/UNSAT): 15323(15313/10)
Apr 06, 2019 6:43:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/776) took 509810 ms. Total solver calls (SAT/UNSAT): 15882(15872/10)
Apr 06, 2019 6:43:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/776) took 514379 ms. Total solver calls (SAT/UNSAT): 16440(16430/10)
Apr 06, 2019 6:43:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/776) took 520279 ms. Total solver calls (SAT/UNSAT): 16997(16987/10)
Apr 06, 2019 6:43:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/776) took 534294 ms. Total solver calls (SAT/UNSAT): 17553(17543/10)
Apr 06, 2019 6:43:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/776) took 550754 ms. Total solver calls (SAT/UNSAT): 18108(18098/10)
Apr 06, 2019 6:44:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/776) took 567488 ms. Total solver calls (SAT/UNSAT): 18662(18652/10)
Apr 06, 2019 6:44:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/776) took 583417 ms. Total solver calls (SAT/UNSAT): 19215(19205/10)
Apr 06, 2019 6:44:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/776) took 599738 ms. Total solver calls (SAT/UNSAT): 19767(19757/10)
Apr 06, 2019 6:44:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/776) took 616302 ms. Total solver calls (SAT/UNSAT): 20318(20308/10)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Apr 06, 2019 6:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/776) took 621114 ms. Total solver calls (SAT/UNSAT): 20319(20309/10)
Apr 06, 2019 6:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 621195 ms. Total solver calls (SAT/UNSAT): 20319(20309/10)
Apr 06, 2019 6:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 776 transitions.
Apr 06, 2019 6:47:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 136953 ms. Total solver calls (SAT/UNSAT): 6751(0/6751)
Apr 06, 2019 6:47:15 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 778019ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Vasy2003-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is Vasy2003-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r202-oct2-155297753700457"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Vasy2003-PT-none.tgz
mv Vasy2003-PT-none execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;