Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r197-oct2-155272230900413.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is PermAdmissibility-COL-50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r197-oct2-155272230900413
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 3.6K Feb 12 04:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 12 04:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 8 03:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 8 03:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Feb 4 07:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K Feb 4 07:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 1 02:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 1 02:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 54K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-COL-50-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553658294855

03:45:21.804 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
03:45:21.808 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :2'c15_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :4'c13_0 + -2'aux9_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_0 + -2'aux10_2 + -2'aux10_4 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_0 + -2'aux12_2 + -2'aux12_4 + 2'in1_1 + 2'in1_3 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'in2_0 + -2'in2_2 + -2'in2_4 + 2'in3_1 + 2'in3_3 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_2 + -2'in4_4 + 2'aux8_1 + 2'aux8_3 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + -2'aux7_0 + -2'aux7_2 + -2'aux7_4 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + 2'aux5_1 + 2'aux5_3 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -4'c9_0 + -2'c110_0 + -2'aux16_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_0 + -2'aux15_2 + -2'aux15_4 + -1'aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux13_0 + 3'aux13_1 + aux13_2 + 3'aux13_3 + aux13_4 + 3'aux13_5 + 3'aux13_6 + 3'aux13_7 + -2'out1_0 + -2'out1_2 + -2'out1_4 + out2_0 + 3'out2_1 + out2_2 + 3'out2_3 + out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + -2'out3_0 + -2'out3_2 + -2'out3_4 + out4_0 + 3'out4_1 + out4_2 + 3'out4_3 + out4_4 + 3'out4_5 + 3'out4_6 + 3'out4_7 + -2'out5_0 + -2'out5_2 + -2'out5_4 + -1'out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_0 + -2'out7_2 + -2'out7_4 + -1'out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 100
invariant :c18_0 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 0
invariant :in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c20_0 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'c16_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_2 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :-2'c5_0 + c8_0 + in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'aux5_0 + -1'aux5_1 + -1'aux5_2 + -1'aux5_3 + -1'aux5_4 + -1'aux5_5 + -1'aux5_6 + -1'aux5_7 + 2'c9_0 + c110_0 = 0
invariant :-4'c13_0 + 2'aux12_0 + 2'aux12_1 + 2'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -2'aux13_0 + -2'aux13_1 + -2'aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + -2'aux13_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_2 + 2'aux10_4 + -2'aux11_1 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_2 + 2'aux12_4 + -2'in1_1 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 4'c5_0 + 2'in2_0 + 2'in2_2 + 2'in2_4 + -2'in3_1 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + 2'in4_0 + 2'in4_2 + 2'in4_4 + 2'aux8_0 + 2'aux8_2 + 2'aux8_4 + 2'aux7_0 + 2'aux7_2 + 2'aux7_4 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 2'aux5_0 + 2'aux5_2 + 2'aux5_4 + 2'c12_0 + 2'aux16_0 + 2'aux16_2 + 2'aux16_4 + 2'aux15_0 + 2'aux15_2 + 2'aux15_4 + aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'out1_0 + 2'out1_2 + 2'out1_4 + out2_0 + -1'out2_1 + out2_2 + -1'out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + 2'out3_0 + 2'out3_2 + 2'out3_4 + out4_0 + -1'out4_1 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + 2'out5_0 + 2'out5_2 + 2'out5_4 + out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + 2'out7_0 + 2'out7_2 + 2'out7_4 + out8_0 + -1'out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 100
invariant :2'c5_0 + c6_0 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c19_0 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c13_0 + -2'c5_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + aux6_0 + aux6_1 + aux6_2 + aux6_3 + aux6_4 + aux6_5 + aux6_6 + aux6_7 + c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 100
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_7 + -2'aux10_5 + -2'aux10_6 + -2'aux11_5 + -2'aux11_6 + -2'aux12_5 + -2'aux12_6 + -2'in1_5 + -2'in1_6 + 4'c5_0 + -2'in2_5 + -2'in2_6 + -2'in3_5 + -2'in3_6 + -2'in4_5 + -2'in4_6 + -2'aux8_5 + -2'aux8_6 + -2'aux7_5 + -2'aux7_6 + -2'aux6_5 + -2'aux6_6 + 2'aux5_0 + 2'aux5_1 + 2'aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_7 + -2'c110_0 + -2'aux16_5 + -2'aux16_6 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + aux14_7 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + aux13_7 + -2'out1_5 + -2'out1_6 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + out2_7 + -2'out3_5 + -2'out3_6 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + out4_7 + -2'out5_5 + -2'out5_6 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + out6_7 + -2'out7_5 + -2'out7_6 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + out8_7 = 0
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in2_5 + in3_5 + in4_5 + aux8_5 + aux7_5 + aux6_5 + aux5_5 + aux16_5 + aux15_5 + aux14_5 + aux13_5 + out1_5 + out2_5 + out3_5 + out4_5 + out5_5 + out6_5 + out7_5 + out8_5 = 50
invariant :aux9_6 + aux10_6 + aux11_6 + aux12_6 + in1_6 + in2_6 + in3_6 + in4_6 + aux8_6 + aux7_6 + aux6_6 + aux5_6 + aux16_6 + aux15_6 + aux14_6 + aux13_6 + out1_6 + out2_6 + out3_6 + out4_6 + out5_6 + out6_6 + out7_6 + out8_6 = 50
invariant :in2_0 + in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -1'in4_0 + -1'in4_1 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 = 0
invariant :2'c13_0 + 2'c5_0 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + c110_0 + 2'c11_0 + 2'c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 100
invariant :2'c14_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_4 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + -2'aux12_7 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 8'c5_0 + 2'in2_0 + 2'in2_1 + 2'in2_2 + 2'in2_4 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -4'in4_3 + -2'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -2'aux8_3 + -2'aux8_5 + -2'aux8_6 + -2'aux8_7 + -2'aux7_3 + -2'aux7_5 + -2'aux7_6 + -2'aux7_7 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 4'aux5_0 + 4'aux5_1 + 4'aux5_2 + 2'aux5_3 + 4'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -2'aux16_3 + -2'aux16_5 + -2'aux16_6 + -2'aux16_7 + aux15_0 + aux15_1 + aux15_2 + -1'aux15_3 + aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'c17_0 + 2'out1_0 + 2'out1_1 + 2'out1_2 + 2'out1_4 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_4 + -2'out3_3 + -2'out3_5 + -2'out3_6 + -2'out3_7 + 2'out4_0 + 2'out4_1 + 2'out4_2 + 2'out4_4 + -2'out5_3 + -2'out5_5 + -2'out5_6 + -2'out5_7 + out6_0 + out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -2'out7_3 + -2'out7_5 + -2'out7_6 + -2'out7_7 + out8_0 + out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + in3_3 + in4_0 + in4_1 + in4_2 + 2'in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + aux8_3 + aux7_3 + aux6_3 + aux5_3 + aux16_3 + aux15_3 + aux14_3 + aux13_3 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out2_0 + out2_1 + out2_2 + 2'out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out3_3 + out4_3 + out5_3 + out6_3 + out7_3 + out8_3 = 50
invariant :-4'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_2 + -2'aux10_4 + 2'aux11_0 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_2 + -2'aux12_4 + -2'in1_2 + -2'in1_4 + -2'in2_2 + -2'in2_4 + -2'in3_2 + -2'in3_4 + -2'in4_2 + -2'in4_4 + -2'aux8_2 + -2'aux8_4 + -2'aux7_2 + -2'aux7_4 + -2'aux6_2 + -2'aux6_4 + -2'aux5_2 + -2'aux5_4 + -4'c12_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_2 + -2'aux15_4 + aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -3'aux13_2 + -1'aux13_3 + -3'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -2'out1_2 + -2'out1_4 + -1'out2_0 + -1'out2_1 + -3'out2_2 + -1'out2_3 + -3'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -2'out3_2 + -2'out3_4 + -1'out4_0 + -1'out4_1 + -3'out4_2 + -1'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + -2'out5_2 + -2'out5_4 + out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_2 + -2'out7_4 + out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = -200
invariant :aux9_4 + aux10_4 + aux11_4 + aux12_4 + in1_4 + in2_4 + in3_4 + in4_4 + aux8_4 + aux7_4 + aux6_4 + aux5_4 + aux16_4 + aux15_4 + aux14_4 + aux13_4 + out1_4 + out2_4 + out3_4 + out4_4 + out5_4 + out6_4 + out7_4 + out8_4 = 50
invariant :aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in2_2 + in3_2 + in4_2 + aux8_2 + aux7_2 + aux6_2 + aux5_2 + aux16_2 + aux15_2 + aux14_2 + aux13_2 + out1_2 + out2_2 + out3_2 + out4_2 + out5_2 + out6_2 + out7_2 + out8_2 = 50
invariant :2'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_5 + -2'in4_6 + -2'in4_7 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + -2'c9_0 + -1'c110_0 = 0
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -4'c5_0 + 2'in2_5 + 2'in2_6 + 2'in2_7 + 2'in3_5 + 2'in3_6 + 2'in3_7 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + 2'c110_0 + 2'aux16_5 + 2'aux16_6 + 2'aux16_7 + 2'aux15_5 + 2'aux15_6 + 2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + aux13_5 + aux13_6 + aux13_7 + 2'out1_5 + 2'out1_6 + 2'out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + out2_5 + out2_6 + out2_7 + 2'out3_5 + 2'out3_6 + 2'out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + out4_5 + out4_6 + out4_7 + 2'out5_5 + 2'out5_6 + 2'out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + 2'out7_5 + 2'out7_6 + 2'out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 100
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :-4'c5_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + aux7_0 + aux7_1 + aux7_2 + aux7_3 + aux7_4 + aux7_5 + aux7_6 + aux7_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + -2'aux5_5 + -2'aux5_6 + -2'aux5_7 + 2'c9_0 + c110_0 = 0
invariant :2'c15_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :4'c13_0 + -2'aux9_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_0 + -2'aux10_2 + -2'aux10_4 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_0 + -2'aux12_2 + -2'aux12_4 + 2'in1_1 + 2'in1_3 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'in2_0 + -2'in2_2 + -2'in2_4 + 2'in3_1 + 2'in3_3 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_2 + -2'in4_4 + 2'aux8_1 + 2'aux8_3 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + -2'aux7_0 + -2'aux7_2 + -2'aux7_4 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + 2'aux5_1 + 2'aux5_3 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -4'c9_0 + -2'c110_0 + -2'aux16_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_0 + -2'aux15_2 + -2'aux15_4 + -1'aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux13_0 + 3'aux13_1 + aux13_2 + 3'aux13_3 + aux13_4 + 3'aux13_5 + 3'aux13_6 + 3'aux13_7 + -2'out1_0 + -2'out1_2 + -2'out1_4 + out2_0 + 3'out2_1 + out2_2 + 3'out2_3 + out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + -2'out3_0 + -2'out3_2 + -2'out3_4 + out4_0 + 3'out4_1 + out4_2 + 3'out4_3 + out4_4 + 3'out4_5 + 3'out4_6 + 3'out4_7 + -2'out5_0 + -2'out5_2 + -2'out5_4 + -1'out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_0 + -2'out7_2 + -2'out7_4 + -1'out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 100
invariant :c18_0 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 0
invariant :in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c20_0 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'c16_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_2 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :-2'c5_0 + c8_0 + in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'aux5_0 + -1'aux5_1 + -1'aux5_2 + -1'aux5_3 + -1'aux5_4 + -1'aux5_5 + -1'aux5_6 + -1'aux5_7 + 2'c9_0 + c110_0 = 0
invariant :-4'c13_0 + 2'aux12_0 + 2'aux12_1 + 2'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -2'aux13_0 + -2'aux13_1 + -2'aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + -2'aux13_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_2 + 2'aux10_4 + -2'aux11_1 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_2 + 2'aux12_4 + -2'in1_1 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 4'c5_0 + 2'in2_0 + 2'in2_2 + 2'in2_4 + -2'in3_1 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + 2'in4_0 + 2'in4_2 + 2'in4_4 + 2'aux8_0 + 2'aux8_2 + 2'aux8_4 + 2'aux7_0 + 2'aux7_2 + 2'aux7_4 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 2'aux5_0 + 2'aux5_2 + 2'aux5_4 + 2'c12_0 + 2'aux16_0 + 2'aux16_2 + 2'aux16_4 + 2'aux15_0 + 2'aux15_2 + 2'aux15_4 + aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'out1_0 + 2'out1_2 + 2'out1_4 + out2_0 + -1'out2_1 + out2_2 + -1'out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + 2'out3_0 + 2'out3_2 + 2'out3_4 + out4_0 + -1'out4_1 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + 2'out5_0 + 2'out5_2 + 2'out5_4 + out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + 2'out7_0 + 2'out7_2 + 2'out7_4 + out8_0 + -1'out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 100
invariant :2'c5_0 + c6_0 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c19_0 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c13_0 + -2'c5_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + aux6_0 + aux6_1 + aux6_2 + aux6_3 + aux6_4 + aux6_5 + aux6_6 + aux6_7 + c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 100
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_7 + -2'aux10_5 + -2'aux10_6 + -2'aux11_5 + -2'aux11_6 + -2'aux12_5 + -2'aux12_6 + -2'in1_5 + -2'in1_6 + 4'c5_0 + -2'in2_5 + -2'in2_6 + -2'in3_5 + -2'in3_6 + -2'in4_5 + -2'in4_6 + -2'aux8_5 + -2'aux8_6 + -2'aux7_5 + -2'aux7_6 + -2'aux6_5 + -2'aux6_6 + 2'aux5_0 + 2'aux5_1 + 2'aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_7 + -2'c110_0 + -2'aux16_5 + -2'aux16_6 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + aux14_7 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + aux13_7 + -2'out1_5 + -2'out1_6 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + out2_7 + -2'out3_5 + -2'out3_6 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + out4_7 + -2'out5_5 + -2'out5_6 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + out6_7 + -2'out7_5 + -2'out7_6 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + out8_7 = 0
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in2_5 + in3_5 + in4_5 + aux8_5 + aux7_5 + aux6_5 + aux5_5 + aux16_5 + aux15_5 + aux14_5 + aux13_5 + out1_5 + out2_5 + out3_5 + out4_5 + out5_5 + out6_5 + out7_5 + out8_5 = 50
invariant :aux9_6 + aux10_6 + aux11_6 + aux12_6 + in1_6 + in2_6 + in3_6 + in4_6 + aux8_6 + aux7_6 + aux6_6 + aux5_6 + aux16_6 + aux15_6 + aux14_6 + aux13_6 + out1_6 + out2_6 + out3_6 + out4_6 + out5_6 + out6_6 + out7_6 + out8_6 = 50
invariant :in2_0 + in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -1'in4_0 + -1'in4_1 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 = 0
invariant :2'c13_0 + 2'c5_0 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + c110_0 + 2'c11_0 + 2'c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 100
invariant :2'c14_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_4 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + -2'aux12_7 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 8'c5_0 + 2'in2_0 + 2'in2_1 + 2'in2_2 + 2'in2_4 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -4'in4_3 + -2'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -2'aux8_3 + -2'aux8_5 + -2'aux8_6 + -2'aux8_7 + -2'aux7_3 + -2'aux7_5 + -2'aux7_6 + -2'aux7_7 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 4'aux5_0 + 4'aux5_1 + 4'aux5_2 + 2'aux5_3 + 4'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -2'aux16_3 + -2'aux16_5 + -2'aux16_6 + -2'aux16_7 + aux15_0 + aux15_1 + aux15_2 + -1'aux15_3 + aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'c17_0 + 2'out1_0 + 2'out1_1 + 2'out1_2 + 2'out1_4 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_4 + -2'out3_3 + -2'out3_5 + -2'out3_6 + -2'out3_7 + 2'out4_0 + 2'out4_1 + 2'out4_2 + 2'out4_4 + -2'out5_3 + -2'out5_5 + -2'out5_6 + -2'out5_7 + out6_0 + out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -2'out7_3 + -2'out7_5 + -2'out7_6 + -2'out7_7 + out8_0 + out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + in3_3 + in4_0 + in4_1 + in4_2 + 2'in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + aux8_3 + aux7_3 + aux6_3 + aux5_3 + aux16_3 + aux15_3 + aux14_3 + aux13_3 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out2_0 + out2_1 + out2_2 + 2'out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out3_3 + out4_3 + out5_3 + out6_3 + out7_3 + out8_3 = 50
invariant :-4'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_2 + -2'aux10_4 + 2'aux11_0 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_2 + -2'aux12_4 + -2'in1_2 + -2'in1_4 + -2'in2_2 + -2'in2_4 + -2'in3_2 + -2'in3_4 + -2'in4_2 + -2'in4_4 + -2'aux8_2 + -2'aux8_4 + -2'aux7_2 + -2'aux7_4 + -2'aux6_2 + -2'aux6_4 + -2'aux5_2 + -2'aux5_4 + -4'c12_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_2 + -2'aux15_4 + aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -3'aux13_2 + -1'aux13_3 + -3'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -2'out1_2 + -2'out1_4 + -1'out2_0 + -1'out2_1 + -3'out2_2 + -1'out2_3 + -3'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -2'out3_2 + -2'out3_4 + -1'out4_0 + -1'out4_1 + -3'out4_2 + -1'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + -2'out5_2 + -2'out5_4 + out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_2 + -2'out7_4 + out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = -200
invariant :aux9_4 + aux10_4 + aux11_4 + aux12_4 + in1_4 + in2_4 + in3_4 + in4_4 + aux8_4 + aux7_4 + aux6_4 + aux5_4 + aux16_4 + aux15_4 + aux14_4 + aux13_4 + out1_4 + out2_4 + out3_4 + out4_4 + out5_4 + out6_4 + out7_4 + out8_4 = 50
invariant :aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in2_2 + in3_2 + in4_2 + aux8_2 + aux7_2 + aux6_2 + aux5_2 + aux16_2 + aux15_2 + aux14_2 + aux13_2 + out1_2 + out2_2 + out3_2 + out4_2 + out5_2 + out6_2 + out7_2 + out8_2 = 50
invariant :2'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_5 + -2'in4_6 + -2'in4_7 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + -2'c9_0 + -1'c110_0 = 0
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -4'c5_0 + 2'in2_5 + 2'in2_6 + 2'in2_7 + 2'in3_5 + 2'in3_6 + 2'in3_7 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + 2'c110_0 + 2'aux16_5 + 2'aux16_6 + 2'aux16_7 + 2'aux15_5 + 2'aux15_6 + 2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + aux13_5 + aux13_6 + aux13_7 + 2'out1_5 + 2'out1_6 + 2'out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + out2_5 + out2_6 + out2_7 + 2'out3_5 + 2'out3_6 + 2'out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + out4_5 + out4_6 + out4_7 + 2'out5_5 + 2'out5_6 + 2'out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + 2'out7_5 + 2'out7_6 + 2'out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 100
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :-4'c5_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + aux7_0 + aux7_1 + aux7_2 + aux7_3 + aux7_4 + aux7_5 + aux7_6 + aux7_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + -2'aux5_5 + -2'aux5_6 + -2'aux5_7 + 2'c9_0 + c110_0 = 0
P-invariant computation with GreatSPN timed out. Skipping.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-00 with value :((!(c15_0<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)))&&((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=2))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-01 with value :(c16_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-02 with value :(c13_0>=3)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-03 with value :(!((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-04 with value :((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-05 with value :((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=c12_0)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-06 with value :((!(((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)<=c11_0)||((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)))&&(!(((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7))&&(c5_0>=2))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-07 with value :((c12_0<=c18_0)||((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=(((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-08 with value :(((((((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7))&&((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=c12_0))&&(((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=3)&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=3)))&&((((((((((aux5_0+aux5_1)+aux5_2)+aux5_3)+aux5_4)+aux5_5)+aux5_6)+aux5_7)<=c7_0)&&(c6_0>=3))&&(!(c13_0<=(((((((aux7_0+aux7_1)+aux7_2)+aux7_3)+aux7_4)+aux7_5)+aux7_6)+aux7_7)))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-09 with value :(c13_0>=1)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-10 with value :(((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=2)&&((c15_0>=1)&&(((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=c6_0)||((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-11 with value :((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-12 with value :(!((c7_0>=3)||(((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=c13_0)&&(c12_0>=1))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-13 with value :((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-14 with value :(!((((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=3)&&(c8_0<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))&&((c20_0>=1)||((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-15 with value :((((c19_0<=c5_0)&&((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))||(((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1)||(c9_0>=1)))&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c5_0))
FORMULA PermAdmissibility-COL-50-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA PermAdmissibility-COL-50-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-00 with value :((!(c15_0<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)))&&((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=2))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-01 with value :(c16_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-02 with value :(c13_0>=3)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-03 with value :(!((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-04 with value :((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-05 with value :((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=c12_0)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-06 with value :((!(((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)<=c11_0)||((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)))&&(!(((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7))&&(c5_0>=2))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-09 with value :(c13_0>=1)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-10 with value :(((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=2)&&((c15_0>=1)&&(((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=c6_0)||((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-11 with value :((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-12 with value :(!((c7_0>=3)||(((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=c13_0)&&(c12_0>=1))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-13 with value :((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-14 with value :(!((((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=3)&&(c8_0<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))&&((c20_0>=1)||((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-15 with value :((((c19_0<=c5_0)&&((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))||(((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1)||(c9_0>=1)))&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c5_0))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 34762 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 256 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-00 with value :((!(c15_0<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)))&&((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=2))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-01 with value :(c16_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-02 with value :(c13_0>=3)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-03 with value :(!((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-04 with value :((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-05 with value :((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=c12_0)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-06 with value :((!(((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)<=c11_0)||((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)))&&(!(((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7))&&(c5_0>=2))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-09 with value :(c13_0>=1)
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-10 with value :(((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=2)&&((c15_0>=1)&&(((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=c6_0)||((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-11 with value :((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-12 with value :(!((c7_0>=3)||(((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=c13_0)&&(c12_0>=1))))
Read [reachable] property : PermAdmissibility-COL-50-ReachabilityCardinality-13 with value :((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=1)
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-14 with value :(!((((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=3)&&(c8_0<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))&&((c20_0>=1)||((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))))
Read [invariant] property : PermAdmissibility-COL-50-ReachabilityCardinality-15 with value :((((c19_0<=c5_0)&&((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)))||(((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1)||(c9_0>=1)))&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c5_0))
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
LTSmin run took 117804 ms.
Found Violation
FORMULA PermAdmissibility-COL-50-ReachabilityCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 25494 ms.
Found Violation
FORMULA PermAdmissibility-COL-50-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PermAdmissibilityCOL50ReachabilityCardinality13==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 3:44:57 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 3:44:57 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 3:44:57 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 24818 ms
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in2,in3,in4,aux8,aux7,aux6,aux5,aux16,aux15,aux14,aux13,out1,out2,out3,out4,out5,out6,out7,out8,
Dot->c16,c15,c14,c13,c5,c6,c7,c8,c9,c110,c11,c12,c17,c18,c19,c20,

Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 27, 2019 3:45:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 5 ms
Mar 27, 2019 3:45:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 189 ms
Mar 27, 2019 3:45:24 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 273 ms
Mar 27, 2019 3:45:24 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 347 ms
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 57 ms.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 5 ms.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 208 places.
Mar 27, 2019 3:45:25 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 1024 transitions.
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1269 ms.
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(UNSAT) depth K=0 took 33 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(UNSAT) depth K=0 took 9 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(UNSAT) depth K=0 took 9 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(UNSAT) depth K=0 took 9 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(UNSAT) depth K=0 took 10 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(UNSAT) depth K=0 took 14 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(UNSAT) depth K=0 took 10 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(UNSAT) depth K=0 took 22 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(UNSAT) depth K=0 took 16 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(UNSAT) depth K=0 took 12 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(UNSAT) depth K=0 took 21 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(UNSAT) depth K=0 took 14 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(UNSAT) depth K=0 took 16 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(UNSAT) depth K=0 took 26 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(UNSAT) depth K=1 took 14 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(UNSAT) depth K=1 took 14 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(UNSAT) depth K=1 took 14 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(UNSAT) depth K=1 took 2 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(UNSAT) depth K=1 took 2 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(UNSAT) depth K=1 took 10 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(UNSAT) depth K=1 took 11 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(UNSAT) depth K=1 took 2 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(UNSAT) depth K=1 took 3 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(UNSAT) depth K=1 took 3 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(UNSAT) depth K=1 took 19 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(UNSAT) depth K=1 took 10 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(UNSAT) depth K=1 took 58 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(UNSAT) depth K=2 took 117 ms
Mar 27, 2019 3:45:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(UNSAT) depth K=2 took 211 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 299 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 401 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(UNSAT) depth K=2 took 239 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(UNSAT) depth K=2 took 57 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(UNSAT) depth K=2 took 59 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(UNSAT) depth K=2 took 67 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(UNSAT) depth K=2 took 80 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(UNSAT) depth K=2 took 82 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(UNSAT) depth K=2 took 111 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(UNSAT) depth K=2 took 111 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(UNSAT) depth K=2 took 56 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(UNSAT) depth K=2 took 78 ms
Mar 27, 2019 3:45:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(UNSAT) depth K=2 took 105 ms
Mar 27, 2019 3:45:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(UNSAT) depth K=2 took 78 ms
Mar 27, 2019 3:45:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(UNSAT) depth K=2 took 50 ms
Mar 27, 2019 3:45:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(UNSAT) depth K=2 took 151 ms
Mar 27, 2019 3:45:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(UNSAT) depth K=3 took 2669 ms
Mar 27, 2019 3:45:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(UNSAT) depth K=3 took 1985 ms
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 7486 ms
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 7432 ms
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 319 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
Mar 27, 2019 3:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 116 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 3:45:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(UNSAT) depth K=3 took 5988 ms
Mar 27, 2019 3:45:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(UNSAT) depth K=3 took 1020 ms
Mar 27, 2019 3:45:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(UNSAT) depth K=3 took 840 ms
Mar 27, 2019 3:45:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-00
Mar 27, 2019 3:45:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(SAT) depth K=0 took 14536 ms
Mar 27, 2019 3:45:55 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 10 ms
Mar 27, 2019 3:45:55 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 3:46:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(UNSAT) depth K=3 took 19422 ms
Mar 27, 2019 3:46:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(UNSAT) depth K=3 took 2156 ms
Mar 27, 2019 3:46:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(UNSAT) depth K=3 took 8150 ms
Mar 27, 2019 3:46:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-01
Mar 27, 2019 3:46:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(SAT) depth K=0 took 30631 ms
Mar 27, 2019 3:46:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(UNSAT) depth K=3 took 12329 ms
Mar 27, 2019 3:46:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(UNSAT) depth K=3 took 1143 ms
Mar 27, 2019 3:46:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(UNSAT) depth K=3 took 3899 ms
Mar 27, 2019 3:46:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(UNSAT) depth K=3 took 977 ms
Mar 27, 2019 3:46:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(UNSAT) depth K=3 took 7091 ms
Mar 27, 2019 3:46:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(UNSAT) depth K=3 took 917 ms
Mar 27, 2019 3:46:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-02
Mar 27, 2019 3:46:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(SAT) depth K=0 took 21782 ms
Mar 27, 2019 3:46:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(UNSAT) depth K=3 took 6047 ms
Mar 27, 2019 3:46:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(UNSAT) depth K=3 took 9335 ms
Mar 27, 2019 3:46:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-03
Mar 27, 2019 3:46:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(SAT) depth K=0 took 13824 ms
Mar 27, 2019 3:47:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-04
Mar 27, 2019 3:47:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(SAT) depth K=0 took 13477 ms
Mar 27, 2019 3:47:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-05
Mar 27, 2019 3:47:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(SAT) depth K=0 took 14322 ms
Mar 27, 2019 3:47:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-06
Mar 27, 2019 3:47:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(SAT) depth K=0 took 19356 ms
Mar 27, 2019 3:49:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant PermAdmissibility-COL-50-ReachabilityCardinality-07
Mar 27, 2019 3:49:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-50-ReachabilityCardinality-07
Mar 27, 2019 3:49:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(TRUE) depth K=0 took 80143 ms
Mar 27, 2019 3:49:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-50-ReachabilityCardinality-08
Mar 27, 2019 3:49:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-50-ReachabilityCardinality-08
Mar 27, 2019 3:49:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(FALSE) depth K=0 took 48855 ms
Mar 27, 2019 3:49:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-09
Mar 27, 2019 3:49:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(SAT) depth K=0 took 7695 ms
Mar 27, 2019 3:50:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-10
Mar 27, 2019 3:50:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(SAT) depth K=0 took 3858 ms
Mar 27, 2019 3:50:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-11
Mar 27, 2019 3:50:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(SAT) depth K=0 took 6530 ms
Mar 27, 2019 3:50:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
Mar 27, 2019 3:50:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-12
Mar 27, 2019 3:50:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(SAT) depth K=0 took 18288 ms
Mar 27, 2019 3:50:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 24495 ms. Total solver calls (SAT/UNSAT): 1002(1002/0)
Mar 27, 2019 3:50:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(UNSAT) depth K=4 took 232239 ms
Mar 27, 2019 3:50:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-13
Mar 27, 2019 3:50:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(SAT) depth K=0 took 17204 ms
Mar 27, 2019 3:51:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/1024) took 52877 ms. Total solver calls (SAT/UNSAT): 2003(2003/0)
Mar 27, 2019 3:51:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1024) took 69890 ms. Total solver calls (SAT/UNSAT): 3019(3019/0)
Mar 27, 2019 3:51:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/1024) took 96030 ms. Total solver calls (SAT/UNSAT): 4018(4018/0)
Mar 27, 2019 3:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1024) took 121702 ms. Total solver calls (SAT/UNSAT): 5032(5032/0)
Mar 27, 2019 3:52:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/1024) took 134214 ms. Total solver calls (SAT/UNSAT): 6030(6030/0)
Mar 27, 2019 3:52:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-14
Mar 27, 2019 3:52:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(SAT) depth K=0 took 104187 ms
Mar 27, 2019 3:52:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/1024) took 150856 ms. Total solver calls (SAT/UNSAT): 7027(7027/0)
Mar 27, 2019 3:53:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/1024) took 177131 ms. Total solver calls (SAT/UNSAT): 8017(8017/0)
Mar 27, 2019 3:53:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-15
Mar 27, 2019 3:53:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(SAT) depth K=0 took 52179 ms
Mar 27, 2019 3:53:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/1024) took 207388 ms. Total solver calls (SAT/UNSAT): 9011(9011/0)
Mar 27, 2019 3:54:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/1024) took 237414 ms. Total solver calls (SAT/UNSAT): 9961(9961/0)
Mar 27, 2019 3:54:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/1024) took 263582 ms. Total solver calls (SAT/UNSAT): 10969(10969/0)
Mar 27, 2019 3:54:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/1024) took 278581 ms. Total solver calls (SAT/UNSAT): 11540(11540/0)
Mar 27, 2019 3:55:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(UNSAT) depth K=4 took 273054 ms
Mar 27, 2019 3:55:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/1024) took 305459 ms. Total solver calls (SAT/UNSAT): 12546(12546/0)
Mar 27, 2019 3:55:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/1024) took 330095 ms. Total solver calls (SAT/UNSAT): 13421(13421/0)
Mar 27, 2019 3:56:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/1024) took 357115 ms. Total solver calls (SAT/UNSAT): 14295(14295/0)
Mar 27, 2019 3:56:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/1024) took 376532 ms. Total solver calls (SAT/UNSAT): 15148(15148/0)
Mar 27, 2019 3:56:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(UNSAT) depth K=4 took 80609 ms
Mar 27, 2019 3:56:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/1024) took 394372 ms. Total solver calls (SAT/UNSAT): 16150(16150/0)
Mar 27, 2019 3:57:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/1024) took 410160 ms. Total solver calls (SAT/UNSAT): 17151(17151/0)
Mar 27, 2019 3:57:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(UNSAT) depth K=4 took 35757 ms
Mar 27, 2019 3:57:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-00
Mar 27, 2019 3:57:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-00(SAT) depth K=1 took 234762 ms
Mar 27, 2019 3:57:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/1024) took 429442 ms. Total solver calls (SAT/UNSAT): 18151(18151/0)
Mar 27, 2019 3:57:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/1024) took 445172 ms. Total solver calls (SAT/UNSAT): 19150(19150/0)
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 3:58:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/1024) took 473397 ms. Total solver calls (SAT/UNSAT): 20152(20152/0)
Mar 27, 2019 3:58:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(UNSAT) depth K=4 took 65386 ms
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 3:58:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/1024) took 497252 ms. Total solver calls (SAT/UNSAT): 21144(21144/0)
Mar 27, 2019 3:58:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-01
Mar 27, 2019 3:58:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-01(SAT) depth K=1 took 97129 ms
Mar 27, 2019 3:58:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/1024) took 519917 ms. Total solver calls (SAT/UNSAT): 22135(22135/0)
Mar 27, 2019 3:59:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/1024) took 539585 ms. Total solver calls (SAT/UNSAT): 23123(23123/0)
Mar 27, 2019 3:59:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/1024) took 562260 ms. Total solver calls (SAT/UNSAT): 24104(24104/0)
Mar 27, 2019 3:59:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-02
Mar 27, 2019 3:59:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-02(SAT) depth K=1 took 49384 ms
Mar 27, 2019 3:59:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/1024) took 582507 ms. Total solver calls (SAT/UNSAT): 25042(25042/0)
Mar 27, 2019 4:00:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(UNSAT) depth K=4 took 102965 ms
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 4:00:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/1024) took 601217 ms. Total solver calls (SAT/UNSAT): 26035(26035/0)
Mar 27, 2019 4:00:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/1024) took 619066 ms. Total solver calls (SAT/UNSAT): 26971(26971/0)
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 4:00:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/1024) took 638710 ms. Total solver calls (SAT/UNSAT): 27962(27962/0)
Mar 27, 2019 4:01:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/1024) took 657857 ms. Total solver calls (SAT/UNSAT): 28904(28904/0)
Mar 27, 2019 4:01:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/1024) took 669314 ms. Total solver calls (SAT/UNSAT): 29845(29845/0)
Mar 27, 2019 4:01:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/1024) took 677797 ms. Total solver calls (SAT/UNSAT): 30777(30777/0)
Mar 27, 2019 4:01:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/1024) took 690152 ms. Total solver calls (SAT/UNSAT): 31763(31763/0)
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 4:01:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/1024) took 702645 ms. Total solver calls (SAT/UNSAT): 32748(32748/0)
Mar 27, 2019 4:02:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(UNSAT) depth K=4 took 119286 ms
Mar 27, 2019 4:02:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/1024) took 717545 ms. Total solver calls (SAT/UNSAT): 33736(33736/0)
Mar 27, 2019 4:02:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/1024) took 728928 ms. Total solver calls (SAT/UNSAT): 34719(34719/0)
Mar 27, 2019 4:02:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-07(UNSAT) depth K=4 took 24247 ms
Mar 27, 2019 4:02:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/1024) took 737358 ms. Total solver calls (SAT/UNSAT): 35701(35701/0)
SMT solver raised 'unknown', retrying with same input.
Mar 27, 2019 4:02:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/1024) took 749885 ms. Total solver calls (SAT/UNSAT): 36677(36677/0)
Mar 27, 2019 4:02:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/1024) took 764352 ms. Total solver calls (SAT/UNSAT): 37652(37652/0)
Mar 27, 2019 4:03:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/1024) took 773675 ms. Total solver calls (SAT/UNSAT): 38624(38624/0)
Mar 27, 2019 4:03:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/1024) took 783930 ms. Total solver calls (SAT/UNSAT): 39595(39595/0)
Mar 27, 2019 4:03:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/1024) took 795019 ms. Total solver calls (SAT/UNSAT): 40525(40525/0)
Mar 27, 2019 4:03:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-03
Mar 27, 2019 4:03:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-03(SAT) depth K=1 took 248894 ms
Mar 27, 2019 4:03:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/1024) took 820684 ms. Total solver calls (SAT/UNSAT): 41504(41504/0)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Mar 27, 2019 4:04:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/1024) took 839444 ms. Total solver calls (SAT/UNSAT): 42411(42411/0)
Mar 27, 2019 4:04:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 839517 ms. Total solver calls (SAT/UNSAT): 42411(42411/0)
Mar 27, 2019 4:04:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1024 transitions.
Mar 27, 2019 4:04:14 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:14 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:15 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:16 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:22 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:23 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:25 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:26 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:27 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:27 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:04:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-08(UNSAT) depth K=4 took 128985 ms
Mar 27, 2019 4:05:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:05:56 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 340 ms
Mar 27, 2019 4:05:57 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 31 ms
Mar 27, 2019 4:05:57 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 4:05:57 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:05:58 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:05:58 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:05:59 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:00 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:00 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:02 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:02 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:06:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(UNSAT) depth K=4 took 142104 ms
Mar 27, 2019 4:07:35 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:46 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:47 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:47 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:48 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:49 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:50 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:51 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:52 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:58 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:07:58 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:00 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:01 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:02 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:02 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:08:05 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 4:08:06 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1361897ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 4:08:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(UNSAT) depth K=4 took 81358 ms
Mar 27, 2019 4:09:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-11(UNSAT) depth K=4 took 72957 ms
Mar 27, 2019 4:15:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-04
Mar 27, 2019 4:15:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-04(SAT) depth K=1 took 689529 ms
Mar 27, 2019 4:17:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-05
Mar 27, 2019 4:17:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-05(SAT) depth K=1 took 120968 ms
Mar 27, 2019 4:17:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-12(UNSAT) depth K=4 took 503234 ms
Mar 27, 2019 4:23:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-13(UNSAT) depth K=4 took 319209 ms
Mar 27, 2019 4:25:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-06
Mar 27, 2019 4:25:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-06(SAT) depth K=1 took 477062 ms
Mar 27, 2019 4:25:58 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 330 ms
Mar 27, 2019 4:25:58 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 4 ms
Mar 27, 2019 4:25:58 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 0 ms
Mar 27, 2019 4:27:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-09
Mar 27, 2019 4:27:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-09(SAT) depth K=1 took 120633 ms
Mar 27, 2019 4:32:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-50-ReachabilityCardinality-10
Mar 27, 2019 4:32:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-50-ReachabilityCardinality-10(SAT) depth K=1 took 314665 ms
Mar 27, 2019 4:33:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-14(UNSAT) depth K=4 took 640315 ms
Mar 27, 2019 4:43:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-50-ReachabilityCardinality-15(UNSAT) depth K=4 took 547292 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is PermAdmissibility-COL-50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r197-oct2-155272230900413"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-50.tgz
mv PermAdmissibility-COL-50 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;