Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r196-smll-155246587300224.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is LamportFastMutEx-PT-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r196-smll-155246587300224
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 9.5K Feb 11 22:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 44K Feb 11 22:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Feb 7 23:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 7 23:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 108 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 346 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 4.8K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 5 00:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 24K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 42K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Jan 31 23:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Jan 31 23:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.0K Feb 4 22:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 200K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553692734048

Working with output stream class java.io.PrintStream
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-01 with value :((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=2)&&((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))||(((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-02 with value :((!((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)||(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))&&((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-03 with value :((!(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)))&&(((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-05 with value :(((!(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)>=3))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)))||(!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)||(((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)>=3))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-06 with value :(((!(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2))&&((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6))))&&(((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)>=3))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-08 with value :(!(((P_setbi_24_5<=P_b_2_false)&&(P_wait_0_3<=P_CS_21_3))&&(P_start_1_3>=3)))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-09 with value :(((P_ifyi_15_6<=P_wait_6_3)&&(!(P_done_2_5>=3)))&&((P_done_2_2>=3)||((P_done_3_3>=3)&&(P_wait_3_4<=P_done_4_2))))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-10 with value :(P_wait_2_2<=P_wait_0_3)
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-11 with value :(P_wait_0_1<=P_sety_9_2)
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-12 with value :((((P_setx_3_3>=3)||(P_setbi_5_0<=P_done_2_5))||((P_sety_9_5<=P_wait_4_6)||(P_fordo_12_6>=3)))||(!((P_wait_6_2<=P_setx_3_6)&&(P_setx_3_2<=P_done_2_4))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-13 with value :(!(P_CS_21_0<=P_setbi_24_6))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-14 with value :((P_wait_4_3>=3)&&(((P_done_4_1>=2)&&(P_b_2_true<=P_fordo_12_1))||(P_b_4_false<=x_3)))
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-15 with value :(((!(P_setbi_5_4>=3))&&((P_wait_6_6<=P_ifxi_10_3)||(P_done_1_2>=1)))&&(!((P_wait_0_0>=2)&&(P_b_1_false<=P_done_5_6))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-08 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-11 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-12 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7506 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 67 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 12302 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 1502 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 1732 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 3242 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 2921 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1920 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-PT-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-PT-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
WARNING : LTSmin timed out (>1920 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExPT6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 30339 ms.
Found Violation
FORMULA LamportFastMutEx-PT-6-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 1:18:56 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 1:18:56 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 1:18:56 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 105 ms
Mar 27, 2019 1:18:56 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 217 places.
Mar 27, 2019 1:18:56 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 420 transitions.
Mar 27, 2019 1:18:56 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 32 ms
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 199 ms
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 128 ms
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 317 ms
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 217 places.
Mar 27, 2019 1:18:57 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 420 transitions.
Mar 27, 2019 1:18:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 29 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 850 ms.
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 166 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 25 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 8 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 14 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 14 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 19 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 19 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 14 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 8 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 21 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 13 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 23 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 7 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 19 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 8 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 10 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 17 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 18 ms
Mar 27, 2019 1:18:58 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 56 ms
Mar 27, 2019 1:18:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 354 ms
Mar 27, 2019 1:18:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 125 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 830 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 121 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 276 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 249 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2651 ms
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
Mar 27, 2019 1:19:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 73 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2213 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 260 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 113 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 103 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 226 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 107 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 213 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=0 took 826 ms
Mar 27, 2019 1:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 97 ms
Mar 27, 2019 1:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 183 ms
Mar 27, 2019 1:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 397 ms
Mar 27, 2019 1:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
Mar 27, 2019 1:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=0 took 927 ms
Mar 27, 2019 1:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 1360 ms
Mar 27, 2019 1:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-02
Mar 27, 2019 1:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-02
Mar 27, 2019 1:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(FALSE) depth K=0 took 1709 ms
Mar 27, 2019 1:19:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-03
Mar 27, 2019 1:19:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-03
Mar 27, 2019 1:19:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(FALSE) depth K=0 took 719 ms
Mar 27, 2019 1:19:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 1607 ms
Mar 27, 2019 1:19:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
Mar 27, 2019 1:19:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=0 took 1792 ms
Mar 27, 2019 1:19:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-05
Mar 27, 2019 1:19:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(SAT) depth K=0 took 2725 ms
Mar 27, 2019 1:19:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-02(UNSAT) depth K=3 took 9271 ms
Mar 27, 2019 1:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
Mar 27, 2019 1:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=0 took 5636 ms
Mar 27, 2019 1:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-6-ReachabilityCardinality-08
Mar 27, 2019 1:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-08
Mar 27, 2019 1:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(TRUE) depth K=0 took 311 ms
Mar 27, 2019 1:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-09
Mar 27, 2019 1:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-09
Mar 27, 2019 1:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(FALSE) depth K=0 took 560 ms
Mar 27, 2019 1:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 2153 ms
Mar 27, 2019 1:19:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 3440 ms
Mar 27, 2019 1:19:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-10
Mar 27, 2019 1:19:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(SAT) depth K=0 took 6455 ms
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-6-ReachabilityCardinality-11
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-11
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(TRUE) depth K=0 took 340 ms
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-6-ReachabilityCardinality-12
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-12
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(TRUE) depth K=0 took 397 ms
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-13
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-13
Mar 27, 2019 1:19:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(FALSE) depth K=0 took 331 ms
Mar 27, 2019 1:19:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-6-ReachabilityCardinality-14
Mar 27, 2019 1:19:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-6-ReachabilityCardinality-14
Mar 27, 2019 1:19:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(FALSE) depth K=0 took 278 ms
Mar 27, 2019 1:19:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-15
Mar 27, 2019 1:19:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(SAT) depth K=0 took 680 ms
Mar 27, 2019 1:19:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 7941 ms
Mar 27, 2019 1:19:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
Mar 27, 2019 1:19:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=1 took 4410 ms
Mar 27, 2019 1:19:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 8574 ms
Mar 27, 2019 1:19:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
Mar 27, 2019 1:19:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 614 ms. Total solver calls (SAT/UNSAT): 65(0/65)
Mar 27, 2019 1:19:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 3327 ms
Mar 27, 2019 1:19:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/420) took 4208 ms. Total solver calls (SAT/UNSAT): 387(12/375)
Mar 27, 2019 1:19:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 3531 ms
Mar 27, 2019 1:19:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 1169 ms
Mar 27, 2019 1:19:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/420) took 7431 ms. Total solver calls (SAT/UNSAT): 710(30/680)
Mar 27, 2019 1:19:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/420) took 10558 ms. Total solver calls (SAT/UNSAT): 1044(36/1008)
Mar 27, 2019 1:19:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
Mar 27, 2019 1:19:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=1 took 21303 ms
Mar 27, 2019 1:19:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 5991 ms
Mar 27, 2019 1:19:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
Mar 27, 2019 1:19:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=1 took 2041 ms
Mar 27, 2019 1:19:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/420) took 14410 ms. Total solver calls (SAT/UNSAT): 1461(36/1425)
Mar 27, 2019 1:19:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 4555 ms
Mar 27, 2019 1:19:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/420) took 17996 ms. Total solver calls (SAT/UNSAT): 1869(36/1833)
Mar 27, 2019 1:19:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-05
Mar 27, 2019 1:19:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(SAT) depth K=1 took 6522 ms
Mar 27, 2019 1:19:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/420) took 21582 ms. Total solver calls (SAT/UNSAT): 2268(69/2199)
Mar 27, 2019 1:20:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 6157 ms
Mar 27, 2019 1:20:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/420) took 25102 ms. Total solver calls (SAT/UNSAT): 2658(102/2556)
Mar 27, 2019 1:20:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 4273 ms
Mar 27, 2019 1:20:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/420) took 28564 ms. Total solver calls (SAT/UNSAT): 3039(133/2906)
Mar 27, 2019 1:20:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
Mar 27, 2019 1:20:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=1 took 8970 ms
Mar 27, 2019 1:20:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/420) took 31872 ms. Total solver calls (SAT/UNSAT): 3411(163/3248)
Mar 27, 2019 1:20:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/420) took 35098 ms. Total solver calls (SAT/UNSAT): 3774(192/3582)
Mar 27, 2019 1:20:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 8081 ms
Mar 27, 2019 1:20:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/420) took 38332 ms. Total solver calls (SAT/UNSAT): 4128(219/3909)
Mar 27, 2019 1:20:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/420) took 41540 ms. Total solver calls (SAT/UNSAT): 4473(246/4227)
Mar 27, 2019 1:20:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-10
Mar 27, 2019 1:20:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(SAT) depth K=1 took 12263 ms
Mar 27, 2019 1:20:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/420) took 44618 ms. Total solver calls (SAT/UNSAT): 4809(270/4539)
Mar 27, 2019 1:20:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/420) took 48584 ms. Total solver calls (SAT/UNSAT): 5243(302/4941)
Mar 27, 2019 1:20:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-15
Mar 27, 2019 1:20:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(SAT) depth K=1 took 9251 ms
Mar 27, 2019 1:20:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/420) took 52380 ms. Total solver calls (SAT/UNSAT): 5661(330/5331)
Mar 27, 2019 1:20:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/420) took 56104 ms. Total solver calls (SAT/UNSAT): 6063(357/5706)
Mar 27, 2019 1:20:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/420) took 59530 ms. Total solver calls (SAT/UNSAT): 6449(381/6068)
Mar 27, 2019 1:20:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/420) took 63314 ms. Total solver calls (SAT/UNSAT): 6860(393/6467)
Mar 27, 2019 1:20:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/420) took 67390 ms. Total solver calls (SAT/UNSAT): 7305(393/6912)
Mar 27, 2019 1:20:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 71482 ms. Total solver calls (SAT/UNSAT): 7746(393/7353)
Mar 27, 2019 1:20:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/420) took 75510 ms. Total solver calls (SAT/UNSAT): 8183(416/7767)
Mar 27, 2019 1:20:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 79638 ms. Total solver calls (SAT/UNSAT): 8616(462/8154)
Mar 27, 2019 1:21:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/420) took 83552 ms. Total solver calls (SAT/UNSAT): 9045(508/8537)
Mar 27, 2019 1:21:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/420) took 87462 ms. Total solver calls (SAT/UNSAT): 9470(553/8917)
Mar 27, 2019 1:21:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/420) took 91368 ms. Total solver calls (SAT/UNSAT): 9891(597/9294)
Mar 27, 2019 1:21:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/420) took 95256 ms. Total solver calls (SAT/UNSAT): 10308(641/9667)
Mar 27, 2019 1:21:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 62360 ms
Mar 27, 2019 1:21:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/420) took 99032 ms. Total solver calls (SAT/UNSAT): 10721(684/10037)
Mar 27, 2019 1:21:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/420) took 102718 ms. Total solver calls (SAT/UNSAT): 11130(726/10404)
Mar 27, 2019 1:21:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
Mar 27, 2019 1:21:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=2 took 53738 ms
Mar 27, 2019 1:21:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/420) took 106415 ms. Total solver calls (SAT/UNSAT): 11535(768/10767)
Mar 27, 2019 1:21:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 109934 ms. Total solver calls (SAT/UNSAT): 11936(809/11127)
Mar 27, 2019 1:21:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/420) took 113508 ms. Total solver calls (SAT/UNSAT): 12333(849/11484)
Mar 27, 2019 1:21:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 117070 ms. Total solver calls (SAT/UNSAT): 12726(889/11837)
Mar 27, 2019 1:21:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/420) took 120728 ms. Total solver calls (SAT/UNSAT): 13115(928/12187)
Mar 27, 2019 1:21:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 124282 ms. Total solver calls (SAT/UNSAT): 13500(966/12534)
Mar 27, 2019 1:21:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 127752 ms. Total solver calls (SAT/UNSAT): 13881(1004/12877)
Mar 27, 2019 1:21:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/420) took 131150 ms. Total solver calls (SAT/UNSAT): 14258(1041/13217)
Mar 27, 2019 1:21:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/420) took 134661 ms. Total solver calls (SAT/UNSAT): 14631(1077/13554)
Mar 27, 2019 1:21:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/420) took 138092 ms. Total solver calls (SAT/UNSAT): 15000(1113/13887)
Mar 27, 2019 1:21:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 40458 ms
Mar 27, 2019 1:21:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/420) took 141192 ms. Total solver calls (SAT/UNSAT): 15332(1137/14195)
Mar 27, 2019 1:22:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/420) took 144932 ms. Total solver calls (SAT/UNSAT): 15678(1155/14523)
Mar 27, 2019 1:22:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/420) took 148788 ms. Total solver calls (SAT/UNSAT): 16056(1167/14889)
Mar 27, 2019 1:22:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/420) took 152128 ms. Total solver calls (SAT/UNSAT): 16413(1224/15189)
Mar 27, 2019 1:22:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/420) took 155428 ms. Total solver calls (SAT/UNSAT): 16766(1277/15489)
Mar 27, 2019 1:22:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/420) took 159124 ms. Total solver calls (SAT/UNSAT): 17115(1326/15789)
Mar 27, 2019 1:22:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 162336 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
Mar 27, 2019 1:22:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/420) took 165508 ms. Total solver calls (SAT/UNSAT): 17801(1392/16409)
Mar 27, 2019 1:22:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/420) took 168568 ms. Total solver calls (SAT/UNSAT): 18138(1431/16707)
Mar 27, 2019 1:22:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 171652 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
Mar 27, 2019 1:22:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/420) took 175188 ms. Total solver calls (SAT/UNSAT): 18800(1449/17351)
Mar 27, 2019 1:22:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/420) took 179604 ms. Total solver calls (SAT/UNSAT): 19286(1449/17837)
Mar 27, 2019 1:22:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/420) took 183910 ms. Total solver calls (SAT/UNSAT): 19763(1483/18280)
Mar 27, 2019 1:22:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-01
Mar 27, 2019 1:22:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(SAT) depth K=2 took 80094 ms
Mar 27, 2019 1:22:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/420) took 188296 ms. Total solver calls (SAT/UNSAT): 20231(1534/18697)
Mar 27, 2019 1:22:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 52144 ms
Mar 27, 2019 1:22:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 192488 ms. Total solver calls (SAT/UNSAT): 20690(1584/19106)
Mar 27, 2019 1:22:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/420) took 196598 ms. Total solver calls (SAT/UNSAT): 21140(1632/19508)
Mar 27, 2019 1:22:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 200638 ms. Total solver calls (SAT/UNSAT): 21581(1680/19901)
Mar 27, 2019 1:23:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/420) took 204570 ms. Total solver calls (SAT/UNSAT): 22013(1725/20288)
Mar 27, 2019 1:23:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/420) took 208424 ms. Total solver calls (SAT/UNSAT): 22436(1770/20666)
Mar 27, 2019 1:23:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/420) took 212251 ms. Total solver calls (SAT/UNSAT): 22850(1813/21037)
Mar 27, 2019 1:23:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/420) took 216086 ms. Total solver calls (SAT/UNSAT): 23255(1855/21400)
Mar 27, 2019 1:23:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/420) took 219871 ms. Total solver calls (SAT/UNSAT): 23651(1896/21755)
Mar 27, 2019 1:23:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(171/420) took 223464 ms. Total solver calls (SAT/UNSAT): 24038(1935/22103)
Mar 27, 2019 1:23:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/420) took 227068 ms. Total solver calls (SAT/UNSAT): 24416(1974/22442)
Mar 27, 2019 1:23:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/420) took 230536 ms. Total solver calls (SAT/UNSAT): 24785(2010/22775)
Mar 27, 2019 1:23:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
Mar 27, 2019 1:23:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=2 took 48034 ms
Mar 27, 2019 1:23:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/420) took 233814 ms. Total solver calls (SAT/UNSAT): 25145(2046/23099)
Mar 27, 2019 1:23:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/420) took 236923 ms. Total solver calls (SAT/UNSAT): 25485(2058/23427)
Mar 27, 2019 1:23:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/420) took 240068 ms. Total solver calls (SAT/UNSAT): 25835(2069/23766)
Mar 27, 2019 1:23:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(195/420) took 243500 ms. Total solver calls (SAT/UNSAT): 26222(2099/24123)
Mar 27, 2019 1:23:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(201/420) took 246584 ms. Total solver calls (SAT/UNSAT): 26573(2123/24450)
Mar 27, 2019 1:23:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/420) took 249882 ms. Total solver calls (SAT/UNSAT): 26937(2145/24792)
Mar 27, 2019 1:23:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/420) took 253146 ms. Total solver calls (SAT/UNSAT): 27293(2162/25131)
Mar 27, 2019 1:23:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/420) took 256321 ms. Total solver calls (SAT/UNSAT): 27617(2169/25448)
Mar 27, 2019 1:23:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/420) took 259352 ms. Total solver calls (SAT/UNSAT): 27942(2199/25743)
Mar 27, 2019 1:24:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(247/420) took 262516 ms. Total solver calls (SAT/UNSAT): 28273(2205/26068)
Mar 27, 2019 1:24:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=4 took 73829 ms
Mar 27, 2019 1:24:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(259/420) took 265642 ms. Total solver calls (SAT/UNSAT): 28607(2255/26352)
Mar 27, 2019 1:24:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/420) took 268668 ms. Total solver calls (SAT/UNSAT): 28921(2333/26588)
Mar 27, 2019 1:24:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/420) took 271832 ms. Total solver calls (SAT/UNSAT): 29242(2391/26851)
Mar 27, 2019 1:24:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(300/420) took 274870 ms. Total solver calls (SAT/UNSAT): 29561(2415/27146)
Mar 27, 2019 1:24:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/420) took 278406 ms. Total solver calls (SAT/UNSAT): 29955(2415/27540)
Mar 27, 2019 1:24:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/420) took 281854 ms. Total solver calls (SAT/UNSAT): 30333(2438/27895)
Mar 27, 2019 1:24:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(312/420) took 285142 ms. Total solver calls (SAT/UNSAT): 30695(2482/28213)
Mar 27, 2019 1:24:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(316/420) took 288487 ms. Total solver calls (SAT/UNSAT): 31041(2524/28517)
Mar 27, 2019 1:24:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 25282 ms
Mar 27, 2019 1:24:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(320/420) took 291674 ms. Total solver calls (SAT/UNSAT): 31371(2564/28807)
Mar 27, 2019 1:24:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/420) took 295284 ms. Total solver calls (SAT/UNSAT): 31761(2610/29151)
Mar 27, 2019 1:24:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(330/420) took 298670 ms. Total solver calls (SAT/UNSAT): 32126(2653/29473)
Mar 27, 2019 1:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(335/420) took 301908 ms. Total solver calls (SAT/UNSAT): 32466(2693/29773)
Mar 27, 2019 1:24:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(341/420) took 305432 ms. Total solver calls (SAT/UNSAT): 32841(2735/30106)
Mar 27, 2019 1:24:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(347/420) took 308616 ms. Total solver calls (SAT/UNSAT): 33180(2766/30414)
Mar 27, 2019 1:24:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=4 took 20920 ms
Mar 27, 2019 1:24:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(359/420) took 311728 ms. Total solver calls (SAT/UNSAT): 33516(2778/30738)
Mar 27, 2019 1:24:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(367/420) took 314864 ms. Total solver calls (SAT/UNSAT): 33864(2798/31066)
Mar 27, 2019 1:24:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(376/420) took 317904 ms. Total solver calls (SAT/UNSAT): 34179(2837/31342)
Mar 27, 2019 1:24:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(390/420) took 321054 ms. Total solver calls (SAT/UNSAT): 34508(2874/31634)
Mar 27, 2019 1:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 322691 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
Mar 27, 2019 1:25:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
Mar 27, 2019 1:25:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 64 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:25:01 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 363793ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 1:25:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=4 took 64194 ms
Mar 27, 2019 1:26:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-05
Mar 27, 2019 1:26:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(SAT) depth K=2 took 206280 ms
Mar 27, 2019 1:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-06
Mar 27, 2019 1:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(SAT) depth K=2 took 284377 ms
Mar 27, 2019 1:32:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-10
Mar 27, 2019 1:32:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(SAT) depth K=2 took 45298 ms
Mar 27, 2019 1:32:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-15
Mar 27, 2019 1:32:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(SAT) depth K=2 took 14235 ms
Mar 27, 2019 1:37:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
Mar 27, 2019 1:37:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=3 took 275740 ms
Mar 27, 2019 1:38:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 237 ms
Mar 27, 2019 1:38:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 4 ms
Mar 27, 2019 1:38:59 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 18 ms
Mar 27, 2019 1:41:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 932094 ms
Mar 27, 2019 1:45:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-01(UNSAT) depth K=5 took 255573 ms
Mar 27, 2019 1:48:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
Mar 27, 2019 1:48:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=3 took 653603 ms
Mar 27, 2019 1:50:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(UNSAT) depth K=5 took 302178 ms
Mar 27, 2019 1:56:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-00
Mar 27, 2019 1:56:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-00(SAT) depth K=4 took 522959 ms
Mar 27, 2019 1:59:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 203 ms
Mar 27, 2019 1:59:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 19 ms
Mar 27, 2019 1:59:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 0 ms
Mar 27, 2019 2:08:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-6-ReachabilityCardinality-04
Mar 27, 2019 2:08:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-04(SAT) depth K=4 took 681794 ms
Mar 27, 2019 2:09:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-05(UNSAT) depth K=5 took 1113473 ms
Mar 27, 2019 2:11:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-06(UNSAT) depth K=5 took 160337 ms
Mar 27, 2019 2:13:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-10(UNSAT) depth K=5 took 63456 ms
Mar 27, 2019 2:14:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-6-ReachabilityCardinality-15(UNSAT) depth K=5 took 101178 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is LamportFastMutEx-PT-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r196-smll-155246587300224"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;