Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r196-smll-155246587200161.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r196-smll-155246587200161
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.6K Feb 11 22:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 11 22:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 7 23:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 7 23:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.6K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.8K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Jan 31 23:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 31 23:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 42K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553649295456

01:14:58.090 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
01:14:58.093 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-01 with value :((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=2)&&((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-02 with value :((!((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)||(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))&&((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-03 with value :((!(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)))&&(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-05 with value :(((!(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)>=3))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))||(!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)||(((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-06 with value :(((!(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2))&&((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6))))&&(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=3))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-07 with value :(true)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-08 with value :(((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)&&(!(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=1)))||(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-09 with value :(!((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-10 with value :(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-12 with value :((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))||(!(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-13 with value :((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))||(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=2))&&((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)>=1)&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-15 with value :(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7246 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 60 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 25804 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 5645 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 1391 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 1281 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 194421 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-12 with value :((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))||(!(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=2))&&((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)>=1)&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-15 with value :(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 1272 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 1535 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=2))&&((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)>=1)&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 195374 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 1:14:57 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 1:14:57 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 1:14:57 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1013 ms
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 27, 2019 1:14:58 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 10 ms
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 15.0 instantiations of transitions. Total transitions/syncs built is 403
Mar 27, 2019 1:14:58 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 167 ms
Mar 27, 2019 1:14:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Mar 27, 2019 1:14:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 114 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 75 transitions. Expanding to a total of 494 deterministic transitions.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 6 ms.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 75 transitions. Expanding to a total of 494 deterministic transitions.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 75 transitions. Expanding to a total of 494 deterministic transitions.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 1 ms.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 217 places.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 420 transitions.
Mar 27, 2019 1:15:00 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 17 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 128 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 899 ms.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 45 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 22 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 75 transitions. Expanding to a total of 494 deterministic transitions.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 24 ms
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
Mar 27, 2019 1:15:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 19 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 35 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 3 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 26 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 1 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 1 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 5 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 26 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 20 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 24 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 24 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 20 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 112 ms
Mar 27, 2019 1:15:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 460 ms
Mar 27, 2019 1:15:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 181 ms
Mar 27, 2019 1:15:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 307 ms
Mar 27, 2019 1:15:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 147 ms
Mar 27, 2019 1:15:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 147 ms
Mar 27, 2019 1:15:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 213 ms
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2410 ms
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 70 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2236 ms
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 785 ms
Mar 27, 2019 1:15:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 148 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 210 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 110 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=0 took 683 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 195 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 87 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 239 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 97 ms
Mar 27, 2019 1:15:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 167 ms
Mar 27, 2019 1:15:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 27, 2019 1:15:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=0 took 1237 ms
Mar 27, 2019 1:15:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-02
Mar 27, 2019 1:15:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-02
Mar 27, 2019 1:15:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(FALSE) depth K=0 took 1614 ms
Mar 27, 2019 1:15:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-03
Mar 27, 2019 1:15:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-03
Mar 27, 2019 1:15:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(FALSE) depth K=0 took 871 ms
Mar 27, 2019 1:15:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 3836 ms
Mar 27, 2019 1:15:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 27, 2019 1:15:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=0 took 1600 ms
Mar 27, 2019 1:15:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 1062 ms
Mar 27, 2019 1:15:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 27, 2019 1:15:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=0 took 857 ms
Mar 27, 2019 1:15:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 27, 2019 1:15:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=0 took 1415 ms
Mar 27, 2019 1:15:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 27, 2019 1:15:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=0 took 696 ms
Mar 27, 2019 1:15:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=3 took 3250 ms
Mar 27, 2019 1:15:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-09
Mar 27, 2019 1:15:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-09
Mar 27, 2019 1:15:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(FALSE) depth K=0 took 2764 ms
Mar 27, 2019 1:15:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 27, 2019 1:15:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=0 took 1129 ms
Mar 27, 2019 1:15:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 27, 2019 1:15:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=0 took 528 ms
Mar 27, 2019 1:15:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 4770 ms
Mar 27, 2019 1:15:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 27, 2019 1:15:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=0 took 880 ms
Mar 27, 2019 1:15:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 1591 ms
Mar 27, 2019 1:15:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-6-ReachabilityCardinality-13
Mar 27, 2019 1:15:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-13
Mar 27, 2019 1:15:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(TRUE) depth K=0 took 8546 ms
Mar 27, 2019 1:15:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 27, 2019 1:15:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=0 took 1077 ms
Mar 27, 2019 1:15:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 27, 2019 1:15:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=0 took 526 ms
Mar 27, 2019 1:15:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 13530 ms
Mar 27, 2019 1:15:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 27, 2019 1:15:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=1 took 6219 ms
Mar 27, 2019 1:15:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 5804 ms
Mar 27, 2019 1:15:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 778 ms
Mar 27, 2019 1:15:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 27, 2019 1:15:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=1 took 7002 ms
Mar 27, 2019 1:15:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 9351 ms
Mar 27, 2019 1:15:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 27, 2019 1:15:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=1 took 11485 ms
Mar 27, 2019 1:15:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
Mar 27, 2019 1:15:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 573 ms. Total solver calls (SAT/UNSAT): 65(0/65)
Mar 27, 2019 1:15:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 7297 ms
Mar 27, 2019 1:15:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 2116 ms
Mar 27, 2019 1:15:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/420) took 3945 ms. Total solver calls (SAT/UNSAT): 455(36/419)
Mar 27, 2019 1:16:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/420) took 7303 ms. Total solver calls (SAT/UNSAT): 839(36/803)
Mar 27, 2019 1:16:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/420) took 10323 ms. Total solver calls (SAT/UNSAT): 1184(47/1137)
Mar 27, 2019 1:16:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 7896 ms
Mar 27, 2019 1:16:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/420) took 13845 ms. Total solver calls (SAT/UNSAT): 1598(74/1524)
Mar 27, 2019 1:16:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 4289 ms
Mar 27, 2019 1:16:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/420) took 17285 ms. Total solver calls (SAT/UNSAT): 2003(87/1916)
Mar 27, 2019 1:16:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 3169 ms
Mar 27, 2019 1:16:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 1884 ms
Mar 27, 2019 1:16:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/420) took 20727 ms. Total solver calls (SAT/UNSAT): 2399(117/2282)
Mar 27, 2019 1:16:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/420) took 24037 ms. Total solver calls (SAT/UNSAT): 2786(138/2648)
Mar 27, 2019 1:16:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 27, 2019 1:16:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=1 took 27190 ms
Mar 27, 2019 1:16:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/420) took 27267 ms. Total solver calls (SAT/UNSAT): 3164(159/3005)
Mar 27, 2019 1:16:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/420) took 30439 ms. Total solver calls (SAT/UNSAT): 3533(183/3350)
Mar 27, 2019 1:16:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/420) took 33455 ms. Total solver calls (SAT/UNSAT): 3893(200/3693)
Mar 27, 2019 1:16:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/420) took 36553 ms. Total solver calls (SAT/UNSAT): 4244(227/4017)
Mar 27, 2019 1:16:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/420) took 40511 ms. Total solver calls (SAT/UNSAT): 4698(251/4447)
Mar 27, 2019 1:16:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 27, 2019 1:16:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=1 took 17621 ms
Mar 27, 2019 1:16:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/420) took 44281 ms. Total solver calls (SAT/UNSAT): 5136(285/4851)
Mar 27, 2019 1:16:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 25472 ms
Mar 27, 2019 1:16:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/420) took 47899 ms. Total solver calls (SAT/UNSAT): 5558(312/5246)
Mar 27, 2019 1:16:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/420) took 51399 ms. Total solver calls (SAT/UNSAT): 5964(342/5622)
Mar 27, 2019 1:16:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/420) took 54729 ms. Total solver calls (SAT/UNSAT): 6354(372/5982)
Mar 27, 2019 1:16:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 27, 2019 1:16:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=1 took 15655 ms
Mar 27, 2019 1:16:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/420) took 59083 ms. Total solver calls (SAT/UNSAT): 6860(393/6467)
Mar 27, 2019 1:16:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 27, 2019 1:16:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=1 took 1355 ms
Mar 27, 2019 1:16:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/420) took 62969 ms. Total solver calls (SAT/UNSAT): 7305(438/6867)
Mar 27, 2019 1:17:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 66785 ms. Total solver calls (SAT/UNSAT): 7746(479/7267)
Mar 27, 2019 1:17:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 27, 2019 1:17:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=1 took 7639 ms
Mar 27, 2019 1:17:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 27, 2019 1:17:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=1 took 2349 ms
Mar 27, 2019 1:17:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/420) took 70471 ms. Total solver calls (SAT/UNSAT): 8183(516/7667)
Mar 27, 2019 1:17:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 74103 ms. Total solver calls (SAT/UNSAT): 8616(539/8077)
Mar 27, 2019 1:17:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 27, 2019 1:17:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=1 took 8130 ms
Mar 27, 2019 1:17:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/420) took 77669 ms. Total solver calls (SAT/UNSAT): 9045(582/8463)
Mar 27, 2019 1:17:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 32108 ms
Mar 27, 2019 1:17:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 27, 2019 1:17:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=1 took 2234 ms
Mar 27, 2019 1:17:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/420) took 81181 ms. Total solver calls (SAT/UNSAT): 9470(621/8849)
Mar 27, 2019 1:17:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/420) took 84731 ms. Total solver calls (SAT/UNSAT): 9891(639/9252)
Mar 27, 2019 1:17:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/420) took 88357 ms. Total solver calls (SAT/UNSAT): 10308(684/9624)
Mar 27, 2019 1:17:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/420) took 91833 ms. Total solver calls (SAT/UNSAT): 10721(725/9996)
Mar 27, 2019 1:17:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/420) took 95279 ms. Total solver calls (SAT/UNSAT): 11130(762/10368)
Mar 27, 2019 1:17:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/420) took 98653 ms. Total solver calls (SAT/UNSAT): 11535(785/10750)
Mar 27, 2019 1:17:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 102021 ms. Total solver calls (SAT/UNSAT): 11936(828/11108)
Mar 27, 2019 1:17:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/420) took 105337 ms. Total solver calls (SAT/UNSAT): 12333(867/11466)
Mar 27, 2019 1:17:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 108679 ms. Total solver calls (SAT/UNSAT): 12726(885/11841)
Mar 27, 2019 1:17:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/420) took 111977 ms. Total solver calls (SAT/UNSAT): 13115(930/12185)
Mar 27, 2019 1:17:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 115235 ms. Total solver calls (SAT/UNSAT): 13500(971/12529)
Mar 27, 2019 1:17:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 118489 ms. Total solver calls (SAT/UNSAT): 13881(1008/12873)
Mar 27, 2019 1:17:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/420) took 121661 ms. Total solver calls (SAT/UNSAT): 14258(1031/13227)
Mar 27, 2019 1:18:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/420) took 124793 ms. Total solver calls (SAT/UNSAT): 14631(1074/13557)
Mar 27, 2019 1:18:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/420) took 127949 ms. Total solver calls (SAT/UNSAT): 15000(1113/13887)
Mar 27, 2019 1:18:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 50164 ms
Mar 27, 2019 1:18:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/420) took 131091 ms. Total solver calls (SAT/UNSAT): 15383(1149/14234)
Mar 27, 2019 1:18:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/420) took 134587 ms. Total solver calls (SAT/UNSAT): 15729(1167/14562)
Mar 27, 2019 1:18:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/420) took 138869 ms. Total solver calls (SAT/UNSAT): 16235(1196/15039)
Mar 27, 2019 1:18:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 27, 2019 1:18:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=2 took 61781 ms
Mar 27, 2019 1:18:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/420) took 141887 ms. Total solver calls (SAT/UNSAT): 16590(1251/15339)
Mar 27, 2019 1:18:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 145303 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
Mar 27, 2019 1:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 27, 2019 1:18:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=2 took 7711 ms
Mar 27, 2019 1:18:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 149675 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
Mar 27, 2019 1:18:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 153971 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
Mar 27, 2019 1:18:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=4 took 28255 ms
Mar 27, 2019 1:18:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 158181 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
Mar 27, 2019 1:18:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/420) took 161457 ms. Total solver calls (SAT/UNSAT): 18800(1482/17318)
Mar 27, 2019 1:18:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/420) took 165617 ms. Total solver calls (SAT/UNSAT): 19286(1524/17762)
Mar 27, 2019 1:18:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/420) took 169709 ms. Total solver calls (SAT/UNSAT): 19763(1553/18210)
Mar 27, 2019 1:18:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/420) took 173651 ms. Total solver calls (SAT/UNSAT): 20231(1598/18633)
Mar 27, 2019 1:18:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 177653 ms. Total solver calls (SAT/UNSAT): 20690(1623/19067)
Mar 27, 2019 1:18:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/420) took 181539 ms. Total solver calls (SAT/UNSAT): 21140(1671/19469)
Mar 27, 2019 1:19:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 29130 ms
Mar 27, 2019 1:19:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 185431 ms. Total solver calls (SAT/UNSAT): 21581(1710/19871)
Mar 27, 2019 1:19:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/420) took 189197 ms. Total solver calls (SAT/UNSAT): 22013(1743/20270)
Mar 27, 2019 1:19:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/420) took 192749 ms. Total solver calls (SAT/UNSAT): 22436(1785/20651)
Mar 27, 2019 1:19:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/420) took 196269 ms. Total solver calls (SAT/UNSAT): 22850(1814/21036)
Mar 27, 2019 1:19:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/420) took 199757 ms. Total solver calls (SAT/UNSAT): 23255(1859/21396)
Mar 27, 2019 1:19:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/420) took 203147 ms. Total solver calls (SAT/UNSAT): 23651(1884/21767)
Mar 27, 2019 1:19:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(171/420) took 206399 ms. Total solver calls (SAT/UNSAT): 24038(1932/22106)
Mar 27, 2019 1:19:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=4 took 23337 ms
Mar 27, 2019 1:19:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/420) took 209667 ms. Total solver calls (SAT/UNSAT): 24416(1971/22445)
Mar 27, 2019 1:19:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/420) took 212829 ms. Total solver calls (SAT/UNSAT): 24785(2004/22781)
Mar 27, 2019 1:19:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/420) took 216029 ms. Total solver calls (SAT/UNSAT): 25145(2046/23099)
Mar 27, 2019 1:19:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/420) took 219513 ms. Total solver calls (SAT/UNSAT): 25557(2076/23481)
Mar 27, 2019 1:19:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 27, 2019 1:19:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=2 took 70856 ms
Mar 27, 2019 1:19:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(191/420) took 223011 ms. Total solver calls (SAT/UNSAT): 25968(2091/23877)
Mar 27, 2019 1:19:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/420) took 226259 ms. Total solver calls (SAT/UNSAT): 26343(2106/24237)
Mar 27, 2019 1:19:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/420) took 229645 ms. Total solver calls (SAT/UNSAT): 26735(2123/24612)
Mar 27, 2019 1:19:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/420) took 232651 ms. Total solver calls (SAT/UNSAT): 27078(2139/24939)
Mar 27, 2019 1:19:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(220/420) took 235979 ms. Total solver calls (SAT/UNSAT): 27447(2163/25284)
Mar 27, 2019 1:19:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/420) took 239205 ms. Total solver calls (SAT/UNSAT): 27815(2205/25610)
Mar 27, 2019 1:19:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/420) took 242389 ms. Total solver calls (SAT/UNSAT): 28182(2205/25977)
Mar 27, 2019 1:20:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(256/420) took 245453 ms. Total solver calls (SAT/UNSAT): 28526(2242/26284)
Mar 27, 2019 1:20:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(269/420) took 248557 ms. Total solver calls (SAT/UNSAT): 28872(2322/26550)
Mar 27, 2019 1:20:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/420) took 251667 ms. Total solver calls (SAT/UNSAT): 29219(2387/26832)
Mar 27, 2019 1:20:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(300/420) took 254721 ms. Total solver calls (SAT/UNSAT): 29561(2415/27146)
Mar 27, 2019 1:20:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/420) took 258111 ms. Total solver calls (SAT/UNSAT): 29955(2457/27498)
Mar 27, 2019 1:20:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=4 took 51871 ms
Mar 27, 2019 1:20:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/420) took 261317 ms. Total solver calls (SAT/UNSAT): 30333(2483/27850)
Mar 27, 2019 1:20:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(312/420) took 264399 ms. Total solver calls (SAT/UNSAT): 30695(2517/28178)
Mar 27, 2019 1:20:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 27, 2019 1:20:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=2 took 47479 ms
Mar 27, 2019 1:20:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/420) took 267985 ms. Total solver calls (SAT/UNSAT): 31125(2555/28570)
Mar 27, 2019 1:20:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(322/420) took 271399 ms. Total solver calls (SAT/UNSAT): 31530(2592/28938)
Mar 27, 2019 1:20:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(327/420) took 274639 ms. Total solver calls (SAT/UNSAT): 31910(2628/29282)
Mar 27, 2019 1:20:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/420) took 278209 ms. Total solver calls (SAT/UNSAT): 32333(2673/29660)
Mar 27, 2019 1:20:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(339/420) took 281575 ms. Total solver calls (SAT/UNSAT): 32720(2718/30002)
Mar 27, 2019 1:20:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(345/420) took 284981 ms. Total solver calls (SAT/UNSAT): 33071(2754/30317)
Mar 27, 2019 1:20:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(357/420) took 288351 ms. Total solver calls (SAT/UNSAT): 33419(2778/30641)
Mar 27, 2019 1:20:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(365/420) took 291519 ms. Total solver calls (SAT/UNSAT): 33783(2798/30985)
Mar 27, 2019 1:20:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(375/420) took 294737 ms. Total solver calls (SAT/UNSAT): 34148(2822/31326)
Mar 27, 2019 1:20:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(389/420) took 297799 ms. Total solver calls (SAT/UNSAT): 34491(2852/31639)
Mar 27, 2019 1:20:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 299434 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
Mar 27, 2019 1:20:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
Mar 27, 2019 1:20:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=4 took 40255 ms
Mar 27, 2019 1:21:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 7227 ms. Total solver calls (SAT/UNSAT): 339(0/339)
Mar 27, 2019 1:21:02 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 362214ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 1:21:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 27, 2019 1:21:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=2 took 41823 ms
Mar 27, 2019 1:21:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=4 took 38929 ms
Mar 27, 2019 1:23:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=4 took 103541 ms
Mar 27, 2019 1:23:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 27, 2019 1:23:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=2 took 136361 ms
Mar 27, 2019 1:24:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=4 took 79566 ms
Mar 27, 2019 1:25:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 27, 2019 1:25:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=2 took 118076 ms
Mar 27, 2019 1:27:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 27, 2019 1:27:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=2 took 110046 ms
Mar 27, 2019 1:28:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 27, 2019 1:28:36 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=2 took 87502 ms
Mar 27, 2019 1:32:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 27, 2019 1:32:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=2 took 223944 ms
Mar 27, 2019 1:35:02 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 196 ms
Mar 27, 2019 1:35:02 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 5 ms
Mar 27, 2019 1:35:02 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 12 ms
Mar 27, 2019 1:35:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 27, 2019 1:35:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=2 took 176239 ms
Mar 27, 2019 1:35:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 655644 ms
Mar 27, 2019 1:38:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=5 took 161332 ms
Mar 27, 2019 1:42:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=5 took 243195 ms
Mar 27, 2019 1:42:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 27, 2019 1:42:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=3 took 423124 ms
Mar 27, 2019 1:51:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=5 took 529336 ms
Mar 27, 2019 1:55:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 27, 2019 1:55:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=3 took 760640 ms
Mar 27, 2019 1:55:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 239 ms
Mar 27, 2019 1:55:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 29 ms
Mar 27, 2019 1:55:03 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 1:58:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 27, 2019 1:58:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=3 took 210987 ms
Mar 27, 2019 2:06:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 27, 2019 2:06:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=3 took 459691 ms
Mar 27, 2019 2:13:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=5 took 1355200 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r196-smll-155246587200161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;