fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r196-smll-155246587200151
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for LamportFastMutEx-COL-5

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7575.040 3600000.00 9747200.00 5809.50 TFTFFFFFFFFFFFF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r196-smll-155246587200151.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is LamportFastMutEx-COL-5, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r196-smll-155246587200151
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 4.0K Feb 11 22:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 11 22:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 7 23:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 7 23:34 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.6K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 5 00:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Jan 31 23:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Jan 31 23:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 41K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553637734604

22:02:17.385 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
22:02:17.388 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((("(((((((P_awaity_0>=1)&&(y_0>=1))||((P_awaity_1>=1)&&(y_0>=1)))||((P_awaity_2>=1)&&(y_0>=1)))||((P_awaity_3>=1)&&(y_0>=1)))||((P_awaity_4>=1)&&(y_0>=1)))||((P_awaity_5>=1)&&(y_0>=1)))")U(F(F(X("(((((((((((((b_0>=1)&&(P_start_1_0>=1))||((b_2>=1)&&(P_start_1_1>=1)))||((b_4>=1)&&(P_start_1_2>=1)))||((b_6>=1)&&(P_start_1_3>=1)))||((b_8>=1)&&(P_start_1_4>=1)))||((b_10>=1)&&(P_start_1_5>=1)))||((b_1>=1)&&(P_start_1_0>=1)))||((b_3>=1)&&(P_start_1_1>=1)))||((b_5>=1)&&(P_start_1_2>=1)))||((b_7>=1)&&(P_start_1_3>=1)))||((b_9>=1)&&(P_start_1_4>=1)))||((b_11>=1)&&(P_start_1_5>=1)))"))))))
Formula 0 simplified : !("(((((((P_awaity_0>=1)&&(y_0>=1))||((P_awaity_1>=1)&&(y_0>=1)))||((P_awaity_2>=1)&&(y_0>=1)))||((P_awaity_3>=1)&&(y_0>=1)))||((P_awaity_4>=1)&&(y_0>=1)))||((P_awaity_5>=1)&&(y_0>=1)))" U FX"(((((((((((((b_0>=1)&&(P_start_1_0>=1))||((b_2>=1)&&(P_start_1_1>=1)))||((b_4>=1)&&(P_start_1_2>=1)))||((b_6>=1)&&(P_start_1_3>=1)))||((b_8>=1)&&(P_start_1_4>=1)))||((b_10>=1)&&(P_start_1_5>=1)))||((b_1>=1)&&(P_start_1_0>=1)))||((b_3>=1)&&(P_start_1_1>=1)))||((b_5>=1)&&(P_start_1_2>=1)))||((b_7>=1)&&(P_start_1_3>=1)))||((b_9>=1)&&(P_start_1_4>=1)))||((b_11>=1)&&(P_start_1_5>=1)))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 246
// Phase 1: matrix 246 rows 174 cols
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :wait_6 + done_6 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_13 + -1'P_await_13_2 + done_13 = 0
invariant :wait_35 + -1'P_await_13_5 + done_35 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_25 + -1'P_await_13_4 + done_25 = 0
invariant :wait_31 + -1'P_await_13_5 + done_31 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 = 1
invariant :b_2 + b_3 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_20 + -1'P_await_13_3 + done_20 = 0
invariant :wait_26 + -1'P_await_13_4 + done_26 = 0
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_30 + done_30 = 0
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_27 + -1'P_await_13_4 + done_27 = 0
invariant :wait_21 + -1'P_await_13_3 + done_21 = 0
invariant :wait_33 + -1'P_await_13_5 + done_33 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :wait_18 + done_18 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :b_4 + b_5 = 1
invariant :wait_0 + done_0 = 0
invariant :b_10 + b_11 = 1
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :wait_7 + -1'P_await_13_1 + done_7 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_28 + -1'P_await_13_4 + done_28 = 0
invariant :wait_34 + -1'P_await_13_5 + done_34 = 0
invariant :b_8 + b_9 = 1
invariant :wait_19 + -1'P_await_13_3 + done_19 = 0
invariant :wait_14 + -1'P_await_13_2 + done_14 = 0
invariant :wait_24 + done_24 = 0
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_32 + -1'P_await_13_5 + done_32 = 0
invariant :wait_12 + done_12 = 0
invariant :b_6 + b_7 = 1
invariant :b_0 + b_1 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5630 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 60 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((LTLAP0==true))U(<>(<>(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 458 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>(X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 117 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((X((LTLAP3==true)))U([]((LTLAP4==true))))U(([]((LTLAP5==true)))U(X((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 264 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]([]([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 330 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([]([]((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 406 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 761 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X([]([](X((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 315 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(((LTLAP8==true))U(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 493 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 550 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(((LTLAP10==true))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 276 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP11==true))U(([]((LTLAP12==true)))U(<>((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 466 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 800 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 255 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 563 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 794 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>(((LTLAP9==true))U((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>(((LTLAP9==true))U((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>(((LTLAP9==true))U((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t13, t14, t15, t16, t17, t19, t20, t21, t22, t23, t25, t26, t27, t28, t29, t31, t32, t33, t34, t35, t37, t38, t39, t40, t41, t43, t44, t45, t46, t47, t81, t83, t85, t87, t89, t91, t92, t93, t94, t95, t103, t104, t105, t106, t107, t110, t111, t112, t113, t115, t117, t118, t119, t121, t122, t124, t125, t127, t128, t129, t131, t133, t134, t135, t136, t171, t173, t175, t177, t179, t228, t229, t230, t231, t232, t234, t235, t236, t237, t239, t240, t241, t242, t244, t245, t246, t247, t249, t250, t251, t252, t254, t255, t256, t257, t259, t260, t261, t262, t263, t277, t278, t279, t280, t281, t283, t284, t285, t286, t287, t289, t290, t291, t292, t293, t295, t296, t297, t298, t299, t301, t302, t303, t304, t305, t308, t309, t310, t311, t312, t313, t314, t315, t316, t317, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :93/90/135/318
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
42227 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,422.355,4865192,1,0,596,1.69101e+07,569,228,6324,1.41884e+07,556
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA LamportFastMutEx-COL-5-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((X(X(F(X("(((((((((((((((((((((((((((((((x_1>=1)&&(P_ifxi_10_0>=1))||((x_2>=1)&&(P_ifxi_10_0>=1)))||((x_3>=1)&&(P_ifxi_10_0>=1)))||((x_4>=1)&&(P_ifxi_10_0>=1)))||((x_5>=1)&&(P_ifxi_10_0>=1)))||((x_0>=1)&&(P_ifxi_10_1>=1)))||((x_2>=1)&&(P_ifxi_10_1>=1)))||((x_3>=1)&&(P_ifxi_10_1>=1)))||((x_4>=1)&&(P_ifxi_10_1>=1)))||((x_5>=1)&&(P_ifxi_10_1>=1)))||((x_0>=1)&&(P_ifxi_10_2>=1)))||((x_1>=1)&&(P_ifxi_10_2>=1)))||((x_3>=1)&&(P_ifxi_10_2>=1)))||((x_4>=1)&&(P_ifxi_10_2>=1)))||((x_5>=1)&&(P_ifxi_10_2>=1)))||((x_0>=1)&&(P_ifxi_10_3>=1)))||((x_1>=1)&&(P_ifxi_10_3>=1)))||((x_2>=1)&&(P_ifxi_10_3>=1)))||((x_4>=1)&&(P_ifxi_10_3>=1)))||((x_5>=1)&&(P_ifxi_10_3>=1)))||((x_0>=1)&&(P_ifxi_10_4>=1)))||((x_1>=1)&&(P_ifxi_10_4>=1)))||((x_2>=1)&&(P_ifxi_10_4>=1)))||((x_3>=1)&&(P_ifxi_10_4>=1)))||((x_5>=1)&&(P_ifxi_10_4>=1)))||((x_0>=1)&&(P_ifxi_10_5>=1)))||((x_1>=1)&&(P_ifxi_10_5>=1)))||((x_2>=1)&&(P_ifxi_10_5>=1)))||((x_3>=1)&&(P_ifxi_10_5>=1)))||((x_4>=1)&&(P_ifxi_10_5>=1)))"))))))
Formula 1 simplified : !XXFX"(((((((((((((((((((((((((((((((x_1>=1)&&(P_ifxi_10_0>=1))||((x_2>=1)&&(P_ifxi_10_0>=1)))||((x_3>=1)&&(P_ifxi_10_0>=1)))||((x_4>=1)&&(P_ifxi_10_0>=1)))||((x_5>=1)&&(P_ifxi_10_0>=1)))||((x_0>=1)&&(P_ifxi_10_1>=1)))||((x_2>=1)&&(P_ifxi_10_1>=1)))||((x_3>=1)&&(P_ifxi_10_1>=1)))||((x_4>=1)&&(P_ifxi_10_1>=1)))||((x_5>=1)&&(P_ifxi_10_1>=1)))||((x_0>=1)&&(P_ifxi_10_2>=1)))||((x_1>=1)&&(P_ifxi_10_2>=1)))||((x_3>=1)&&(P_ifxi_10_2>=1)))||((x_4>=1)&&(P_ifxi_10_2>=1)))||((x_5>=1)&&(P_ifxi_10_2>=1)))||((x_0>=1)&&(P_ifxi_10_3>=1)))||((x_1>=1)&&(P_ifxi_10_3>=1)))||((x_2>=1)&&(P_ifxi_10_3>=1)))||((x_4>=1)&&(P_ifxi_10_3>=1)))||((x_5>=1)&&(P_ifxi_10_3>=1)))||((x_0>=1)&&(P_ifxi_10_4>=1)))||((x_1>=1)&&(P_ifxi_10_4>=1)))||((x_2>=1)&&(P_ifxi_10_4>=1)))||((x_3>=1)&&(P_ifxi_10_4>=1)))||((x_5>=1)&&(P_ifxi_10_4>=1)))||((x_0>=1)&&(P_ifxi_10_5>=1)))||((x_1>=1)&&(P_ifxi_10_5>=1)))||((x_2>=1)&&(P_ifxi_10_5>=1)))||((x_3>=1)&&(P_ifxi_10_5>=1)))||((x_4>=1)&&(P_ifxi_10_5>=1)))"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
4904 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,471.385,4876352,1,0,682,1.82914e+07,578,256,6375,1.78785e+07,723
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA LamportFastMutEx-COL-5-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((((X("(((((((((((((((((((((((((((((((((((((P_sety_9_0>=1)&&(y_0>=1))||((P_sety_9_0>=1)&&(y_1>=1)))||((P_sety_9_0>=1)&&(y_2>=1)))||((P_sety_9_0>=1)&&(y_3>=1)))||((P_sety_9_0>=1)&&(y_4>=1)))||((P_sety_9_0>=1)&&(y_5>=1)))||((P_sety_9_1>=1)&&(y_0>=1)))||((P_sety_9_1>=1)&&(y_1>=1)))||((P_sety_9_1>=1)&&(y_2>=1)))||((P_sety_9_1>=1)&&(y_3>=1)))||((P_sety_9_1>=1)&&(y_4>=1)))||((P_sety_9_1>=1)&&(y_5>=1)))||((P_sety_9_2>=1)&&(y_0>=1)))||((P_sety_9_2>=1)&&(y_1>=1)))||((P_sety_9_2>=1)&&(y_2>=1)))||((P_sety_9_2>=1)&&(y_3>=1)))||((P_sety_9_2>=1)&&(y_4>=1)))||((P_sety_9_2>=1)&&(y_5>=1)))||((P_sety_9_3>=1)&&(y_0>=1)))||((P_sety_9_3>=1)&&(y_1>=1)))||((P_sety_9_3>=1)&&(y_2>=1)))||((P_sety_9_3>=1)&&(y_3>=1)))||((P_sety_9_3>=1)&&(y_4>=1)))||((P_sety_9_3>=1)&&(y_5>=1)))||((P_sety_9_4>=1)&&(y_0>=1)))||((P_sety_9_4>=1)&&(y_1>=1)))||((P_sety_9_4>=1)&&(y_2>=1)))||((P_sety_9_4>=1)&&(y_3>=1)))||((P_sety_9_4>=1)&&(y_4>=1)))||((P_sety_9_4>=1)&&(y_5>=1)))||((P_sety_9_5>=1)&&(y_0>=1)))||((P_sety_9_5>=1)&&(y_1>=1)))||((P_sety_9_5>=1)&&(y_2>=1)))||((P_sety_9_5>=1)&&(y_3>=1)))||((P_sety_9_5>=1)&&(y_4>=1)))||((P_sety_9_5>=1)&&(y_5>=1)))"))U(G("((((((((((((((((((((((((((((((((((((((b_0>=1)&&(P_await_13_0>=1))&&(wait_0>=1))||(((b_0>=1)&&(P_await_13_1>=1))&&(wait_6>=1)))||(((b_0>=1)&&(P_await_13_2>=1))&&(wait_12>=1)))||(((b_0>=1)&&(P_await_13_3>=1))&&(wait_18>=1)))||(((b_0>=1)&&(P_await_13_4>=1))&&(wait_24>=1)))||(((b_0>=1)&&(P_await_13_5>=1))&&(wait_30>=1)))||(((b_2>=1)&&(P_await_13_0>=1))&&(wait_1>=1)))||(((b_2>=1)&&(P_await_13_1>=1))&&(wait_7>=1)))||(((b_2>=1)&&(P_await_13_2>=1))&&(wait_13>=1)))||(((b_2>=1)&&(P_await_13_3>=1))&&(wait_19>=1)))||(((b_2>=1)&&(P_await_13_4>=1))&&(wait_25>=1)))||(((b_2>=1)&&(P_await_13_5>=1))&&(wait_31>=1)))||(((b_4>=1)&&(P_await_13_0>=1))&&(wait_2>=1)))||(((b_4>=1)&&(P_await_13_1>=1))&&(wait_8>=1)))||(((b_4>=1)&&(P_await_13_2>=1))&&(wait_14>=1)))||(((b_4>=1)&&(P_await_13_3>=1))&&(wait_20>=1)))||(((b_4>=1)&&(P_await_13_4>=1))&&(wait_26>=1)))||(((b_4>=1)&&(P_await_13_5>=1))&&(wait_32>=1)))||(((b_6>=1)&&(P_await_13_0>=1))&&(wait_3>=1)))||(((b_6>=1)&&(P_await_13_1>=1))&&(wait_9>=1)))||(((b_6>=1)&&(P_await_13_2>=1))&&(wait_15>=1)))||(((b_6>=1)&&(P_await_13_3>=1))&&(wait_21>=1)))||(((b_6>=1)&&(P_await_13_4>=1))&&(wait_27>=1)))||(((b_6>=1)&&(P_await_13_5>=1))&&(wait_33>=1)))||(((b_8>=1)&&(P_await_13_0>=1))&&(wait_4>=1)))||(((b_8>=1)&&(P_await_13_1>=1))&&(wait_10>=1)))||(((b_8>=1)&&(P_await_13_2>=1))&&(wait_16>=1)))||(((b_8>=1)&&(P_await_13_3>=1))&&(wait_22>=1)))||(((b_8>=1)&&(P_await_13_4>=1))&&(wait_28>=1)))||(((b_8>=1)&&(P_await_13_5>=1))&&(wait_34>=1)))||(((b_10>=1)&&(P_await_13_0>=1))&&(wait_5>=1)))||(((b_10>=1)&&(P_await_13_1>=1))&&(wait_11>=1)))||(((b_10>=1)&&(P_await_13_2>=1))&&(wait_17>=1)))||(((b_10>=1)&&(P_await_13_3>=1))&&(wait_23>=1)))||(((b_10>=1)&&(P_await_13_4>=1))&&(wait_29>=1)))||(((b_10>=1)&&(P_await_13_5>=1))&&(wait_35>=1)))")))U((G("(((((((((((((b_0>=1)&&(P_setbi_11_0>=1))||((b_2>=1)&&(P_setbi_11_1>=1)))||((b_4>=1)&&(P_setbi_11_2>=1)))||((b_6>=1)&&(P_setbi_11_3>=1)))||((b_8>=1)&&(P_setbi_11_4>=1)))||((b_10>=1)&&(P_setbi_11_5>=1)))||((b_1>=1)&&(P_setbi_11_0>=1)))||((b_3>=1)&&(P_setbi_11_1>=1)))||((b_5>=1)&&(P_setbi_11_2>=1)))||((b_7>=1)&&(P_setbi_11_3>=1)))||((b_9>=1)&&(P_setbi_11_4>=1)))||((b_11>=1)&&(P_setbi_11_5>=1)))"))U(X("(((((((((((((((((((((((((((((((((((((x_0>=1)&&(P_setx_3_0>=1))||((x_1>=1)&&(P_setx_3_0>=1)))||((x_2>=1)&&(P_setx_3_0>=1)))||((x_3>=1)&&(P_setx_3_0>=1)))||((x_4>=1)&&(P_setx_3_0>=1)))||((x_5>=1)&&(P_setx_3_0>=1)))||((x_0>=1)&&(P_setx_3_1>=1)))||((x_1>=1)&&(P_setx_3_1>=1)))||((x_2>=1)&&(P_setx_3_1>=1)))||((x_3>=1)&&(P_setx_3_1>=1)))||((x_4>=1)&&(P_setx_3_1>=1)))||((x_5>=1)&&(P_setx_3_1>=1)))||((x_0>=1)&&(P_setx_3_2>=1)))||((x_1>=1)&&(P_setx_3_2>=1)))||((x_2>=1)&&(P_setx_3_2>=1)))||((x_3>=1)&&(P_setx_3_2>=1)))||((x_4>=1)&&(P_setx_3_2>=1)))||((x_5>=1)&&(P_setx_3_2>=1)))||((x_0>=1)&&(P_setx_3_3>=1)))||((x_1>=1)&&(P_setx_3_3>=1)))||((x_2>=1)&&(P_setx_3_3>=1)))||((x_3>=1)&&(P_setx_3_3>=1)))||((x_4>=1)&&(P_setx_3_3>=1)))||((x_5>=1)&&(P_setx_3_3>=1)))||((x_0>=1)&&(P_setx_3_4>=1)))||((x_1>=1)&&(P_setx_3_4>=1)))||((x_2>=1)&&(P_setx_3_4>=1)))||((x_3>=1)&&(P_setx_3_4>=1)))||((x_4>=1)&&(P_setx_3_4>=1)))||((x_5>=1)&&(P_setx_3_4>=1)))||((x_0>=1)&&(P_setx_3_5>=1)))||((x_1>=1)&&(P_setx_3_5>=1)))||((x_2>=1)&&(P_setx_3_5>=1)))||((x_3>=1)&&(P_setx_3_5>=1)))||((x_4>=1)&&(P_setx_3_5>=1)))||((x_5>=1)&&(P_setx_3_5>=1)))")))))
Formula 2 simplified : !((X"(((((((((((((((((((((((((((((((((((((P_sety_9_0>=1)&&(y_0>=1))||((P_sety_9_0>=1)&&(y_1>=1)))||((P_sety_9_0>=1)&&(y_2>=1)))||((P_sety_9_0>=1)&&(y_3>=1)))||((P_sety_9_0>=1)&&(y_4>=1)))||((P_sety_9_0>=1)&&(y_5>=1)))||((P_sety_9_1>=1)&&(y_0>=1)))||((P_sety_9_1>=1)&&(y_1>=1)))||((P_sety_9_1>=1)&&(y_2>=1)))||((P_sety_9_1>=1)&&(y_3>=1)))||((P_sety_9_1>=1)&&(y_4>=1)))||((P_sety_9_1>=1)&&(y_5>=1)))||((P_sety_9_2>=1)&&(y_0>=1)))||((P_sety_9_2>=1)&&(y_1>=1)))||((P_sety_9_2>=1)&&(y_2>=1)))||((P_sety_9_2>=1)&&(y_3>=1)))||((P_sety_9_2>=1)&&(y_4>=1)))||((P_sety_9_2>=1)&&(y_5>=1)))||((P_sety_9_3>=1)&&(y_0>=1)))||((P_sety_9_3>=1)&&(y_1>=1)))||((P_sety_9_3>=1)&&(y_2>=1)))||((P_sety_9_3>=1)&&(y_3>=1)))||((P_sety_9_3>=1)&&(y_4>=1)))||((P_sety_9_3>=1)&&(y_5>=1)))||((P_sety_9_4>=1)&&(y_0>=1)))||((P_sety_9_4>=1)&&(y_1>=1)))||((P_sety_9_4>=1)&&(y_2>=1)))||((P_sety_9_4>=1)&&(y_3>=1)))||((P_sety_9_4>=1)&&(y_4>=1)))||((P_sety_9_4>=1)&&(y_5>=1)))||((P_sety_9_5>=1)&&(y_0>=1)))||((P_sety_9_5>=1)&&(y_1>=1)))||((P_sety_9_5>=1)&&(y_2>=1)))||((P_sety_9_5>=1)&&(y_3>=1)))||((P_sety_9_5>=1)&&(y_4>=1)))||((P_sety_9_5>=1)&&(y_5>=1)))" U G"((((((((((((((((((((((((((((((((((((((b_0>=1)&&(P_await_13_0>=1))&&(wait_0>=1))||(((b_0>=1)&&(P_await_13_1>=1))&&(wait_6>=1)))||(((b_0>=1)&&(P_await_13_2>=1))&&(wait_12>=1)))||(((b_0>=1)&&(P_await_13_3>=1))&&(wait_18>=1)))||(((b_0>=1)&&(P_await_13_4>=1))&&(wait_24>=1)))||(((b_0>=1)&&(P_await_13_5>=1))&&(wait_30>=1)))||(((b_2>=1)&&(P_await_13_0>=1))&&(wait_1>=1)))||(((b_2>=1)&&(P_await_13_1>=1))&&(wait_7>=1)))||(((b_2>=1)&&(P_await_13_2>=1))&&(wait_13>=1)))||(((b_2>=1)&&(P_await_13_3>=1))&&(wait_19>=1)))||(((b_2>=1)&&(P_await_13_4>=1))&&(wait_25>=1)))||(((b_2>=1)&&(P_await_13_5>=1))&&(wait_31>=1)))||(((b_4>=1)&&(P_await_13_0>=1))&&(wait_2>=1)))||(((b_4>=1)&&(P_await_13_1>=1))&&(wait_8>=1)))||(((b_4>=1)&&(P_await_13_2>=1))&&(wait_14>=1)))||(((b_4>=1)&&(P_await_13_3>=1))&&(wait_20>=1)))||(((b_4>=1)&&(P_await_13_4>=1))&&(wait_26>=1)))||(((b_4>=1)&&(P_await_13_5>=1))&&(wait_32>=1)))||(((b_6>=1)&&(P_await_13_0>=1))&&(wait_3>=1)))||(((b_6>=1)&&(P_await_13_1>=1))&&(wait_9>=1)))||(((b_6>=1)&&(P_await_13_2>=1))&&(wait_15>=1)))||(((b_6>=1)&&(P_await_13_3>=1))&&(wait_21>=1)))||(((b_6>=1)&&(P_await_13_4>=1))&&(wait_27>=1)))||(((b_6>=1)&&(P_await_13_5>=1))&&(wait_33>=1)))||(((b_8>=1)&&(P_await_13_0>=1))&&(wait_4>=1)))||(((b_8>=1)&&(P_await_13_1>=1))&&(wait_10>=1)))||(((b_8>=1)&&(P_await_13_2>=1))&&(wait_16>=1)))||(((b_8>=1)&&(P_await_13_3>=1))&&(wait_22>=1)))||(((b_8>=1)&&(P_await_13_4>=1))&&(wait_28>=1)))||(((b_8>=1)&&(P_await_13_5>=1))&&(wait_34>=1)))||(((b_10>=1)&&(P_await_13_0>=1))&&(wait_5>=1)))||(((b_10>=1)&&(P_await_13_1>=1))&&(wait_11>=1)))||(((b_10>=1)&&(P_await_13_2>=1))&&(wait_17>=1)))||(((b_10>=1)&&(P_await_13_3>=1))&&(wait_23>=1)))||(((b_10>=1)&&(P_await_13_4>=1))&&(wait_29>=1)))||(((b_10>=1)&&(P_await_13_5>=1))&&(wait_35>=1)))") U (G"(((((((((((((b_0>=1)&&(P_setbi_11_0>=1))||((b_2>=1)&&(P_setbi_11_1>=1)))||((b_4>=1)&&(P_setbi_11_2>=1)))||((b_6>=1)&&(P_setbi_11_3>=1)))||((b_8>=1)&&(P_setbi_11_4>=1)))||((b_10>=1)&&(P_setbi_11_5>=1)))||((b_1>=1)&&(P_setbi_11_0>=1)))||((b_3>=1)&&(P_setbi_11_1>=1)))||((b_5>=1)&&(P_setbi_11_2>=1)))||((b_7>=1)&&(P_setbi_11_3>=1)))||((b_9>=1)&&(P_setbi_11_4>=1)))||((b_11>=1)&&(P_setbi_11_5>=1)))" U X"(((((((((((((((((((((((((((((((((((((x_0>=1)&&(P_setx_3_0>=1))||((x_1>=1)&&(P_setx_3_0>=1)))||((x_2>=1)&&(P_setx_3_0>=1)))||((x_3>=1)&&(P_setx_3_0>=1)))||((x_4>=1)&&(P_setx_3_0>=1)))||((x_5>=1)&&(P_setx_3_0>=1)))||((x_0>=1)&&(P_setx_3_1>=1)))||((x_1>=1)&&(P_setx_3_1>=1)))||((x_2>=1)&&(P_setx_3_1>=1)))||((x_3>=1)&&(P_setx_3_1>=1)))||((x_4>=1)&&(P_setx_3_1>=1)))||((x_5>=1)&&(P_setx_3_1>=1)))||((x_0>=1)&&(P_setx_3_2>=1)))||((x_1>=1)&&(P_setx_3_2>=1)))||((x_2>=1)&&(P_setx_3_2>=1)))||((x_3>=1)&&(P_setx_3_2>=1)))||((x_4>=1)&&(P_setx_3_2>=1)))||((x_5>=1)&&(P_setx_3_2>=1)))||((x_0>=1)&&(P_setx_3_3>=1)))||((x_1>=1)&&(P_setx_3_3>=1)))||((x_2>=1)&&(P_setx_3_3>=1)))||((x_3>=1)&&(P_setx_3_3>=1)))||((x_4>=1)&&(P_setx_3_3>=1)))||((x_5>=1)&&(P_setx_3_3>=1)))||((x_0>=1)&&(P_setx_3_4>=1)))||((x_1>=1)&&(P_setx_3_4>=1)))||((x_2>=1)&&(P_setx_3_4>=1)))||((x_3>=1)&&(P_setx_3_4>=1)))||((x_4>=1)&&(P_setx_3_4>=1)))||((x_5>=1)&&(P_setx_3_4>=1)))||((x_0>=1)&&(P_setx_3_5>=1)))||((x_1>=1)&&(P_setx_3_5>=1)))||((x_2>=1)&&(P_setx_3_5>=1)))||((x_3>=1)&&(P_setx_3_5>=1)))||((x_4>=1)&&(P_setx_3_5>=1)))||((x_5>=1)&&(P_setx_3_5>=1)))"))
4 unique states visited
0 strongly connected components in search stack
3 transitions explored
2 items max in DFS search stack
20 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,471.601,4878360,1,0,682,1.82914e+07,628,256,6770,1.78786e+07,755
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA LamportFastMutEx-COL-5-LTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X(G(G(G("(((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1)))"))))))
Formula 3 simplified : !XG"(((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1)))"
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G(F(F(("(((((((((((((((((((((((((((((((pid0.P_ify0_4_0>=1)&&(pid1.y_1>=1))||((pid0.P_ify0_4_0>=1)&&(pid2.y_2>=1)))||((pid0.P_ify0_4_0>=1)&&(pid3.y_3>=1)))||((pid0.P_ify0_4_0>=1)&&(pid4.y_4>=1)))||((pid0.P_ify0_4_0>=1)&&(pid5.y_5>=1)))||((pid1.P_ify0_4_1>=1)&&(pid1.y_1>=1)))||((pid1.P_ify0_4_1>=1)&&(pid2.y_2>=1)))||((pid1.P_ify0_4_1>=1)&&(pid3.y_3>=1)))||((pid1.P_ify0_4_1>=1)&&(pid4.y_4>=1)))||((pid1.P_ify0_4_1>=1)&&(pid5.y_5>=1)))||((pid2.P_ify0_4_2>=1)&&(pid1.y_1>=1)))||((pid2.P_ify0_4_2>=1)&&(pid2.y_2>=1)))||((pid2.P_ify0_4_2>=1)&&(pid3.y_3>=1)))||((pid2.P_ify0_4_2>=1)&&(pid4.y_4>=1)))||((pid2.P_ify0_4_2>=1)&&(pid5.y_5>=1)))||((pid3.P_ify0_4_3>=1)&&(pid1.y_1>=1)))||((pid3.P_ify0_4_3>=1)&&(pid2.y_2>=1)))||((pid3.P_ify0_4_3>=1)&&(pid3.y_3>=1)))||((pid3.P_ify0_4_3>=1)&&(pid4.y_4>=1)))||((pid3.P_ify0_4_3>=1)&&(pid5.y_5>=1)))||((pid4.P_ify0_4_4>=1)&&(pid1.y_1>=1)))||((pid4.P_ify0_4_4>=1)&&(pid2.y_2>=1)))||((pid4.P_ify0_4_4>=1)&&(pid3.y_3>=1)))||((pid4.P_ify0_4_4>=1)&&(pid4.y_4>=1)))||((pid4.P_ify0_4_4>=1)&&(pid5.y_5>=1)))||((pid5.P_ify0_4_5>=1)&&(pid1.y_1>=1)))||((pid5.P_ify0_4_5>=1)&&(pid2.y_2>=1)))||((pid5.P_ify0_4_5>=1)&&(pid3.y_3>=1)))||((pid5.P_ify0_4_5>=1)&&(pid4.y_4>=1)))||((pid5.P_ify0_4_5>=1)&&(pid5.y_5>=1)))")U("(((((((((((((pid0.P_setbi_24_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_24_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool11.b_11>=1)))"))))))
Formula 0 simplified : !GF("(((((((((((((((((((((((((((((((pid0.P_ify0_4_0>=1)&&(pid1.y_1>=1))||((pid0.P_ify0_4_0>=1)&&(pid2.y_2>=1)))||((pid0.P_ify0_4_0>=1)&&(pid3.y_3>=1)))||((pid0.P_ify0_4_0>=1)&&(pid4.y_4>=1)))||((pid0.P_ify0_4_0>=1)&&(pid5.y_5>=1)))||((pid1.P_ify0_4_1>=1)&&(pid1.y_1>=1)))||((pid1.P_ify0_4_1>=1)&&(pid2.y_2>=1)))||((pid1.P_ify0_4_1>=1)&&(pid3.y_3>=1)))||((pid1.P_ify0_4_1>=1)&&(pid4.y_4>=1)))||((pid1.P_ify0_4_1>=1)&&(pid5.y_5>=1)))||((pid2.P_ify0_4_2>=1)&&(pid1.y_1>=1)))||((pid2.P_ify0_4_2>=1)&&(pid2.y_2>=1)))||((pid2.P_ify0_4_2>=1)&&(pid3.y_3>=1)))||((pid2.P_ify0_4_2>=1)&&(pid4.y_4>=1)))||((pid2.P_ify0_4_2>=1)&&(pid5.y_5>=1)))||((pid3.P_ify0_4_3>=1)&&(pid1.y_1>=1)))||((pid3.P_ify0_4_3>=1)&&(pid2.y_2>=1)))||((pid3.P_ify0_4_3>=1)&&(pid3.y_3>=1)))||((pid3.P_ify0_4_3>=1)&&(pid4.y_4>=1)))||((pid3.P_ify0_4_3>=1)&&(pid5.y_5>=1)))||((pid4.P_ify0_4_4>=1)&&(pid1.y_1>=1)))||((pid4.P_ify0_4_4>=1)&&(pid2.y_2>=1)))||((pid4.P_ify0_4_4>=1)&&(pid3.y_3>=1)))||((pid4.P_ify0_4_4>=1)&&(pid4.y_4>=1)))||((pid4.P_ify0_4_4>=1)&&(pid5.y_5>=1)))||((pid5.P_ify0_4_5>=1)&&(pid1.y_1>=1)))||((pid5.P_ify0_4_5>=1)&&(pid2.y_2>=1)))||((pid5.P_ify0_4_5>=1)&&(pid3.y_3>=1)))||((pid5.P_ify0_4_5>=1)&&(pid4.y_4>=1)))||((pid5.P_ify0_4_5>=1)&&(pid5.y_5>=1)))" U "(((((((((((((pid0.P_setbi_24_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_24_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool11.b_11>=1)))")
built 82 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions T_setbi_2_1, T_setbi_2_2, T_setbi_2_3, T_setbi_2_4, T_setbi_2_5, T_setx_3_0, T_setx_3_1, T_setx_3_2, T_setx_3_3, T_setx_3_4, T_setx_3_5, T_setbi_5_1, T_setbi_5_2, T_setbi_5_3, T_setbi_5_4, T_setbi_5_5, T_awaity, T_sety_9_0, T_sety_9_1, T_sety_9_2, T_sety_9_3, T_sety_9_4, T_sety_9_5, T_setbi_11_1, T_setbi_11_2, T_setbi_11_3, T_setbi_11_4, T_setbi_11_5, T_ynei_15_0, T_ynei_15_1, T_ynei_15_2, T_ynei_15_3, T_ynei_15_4, T_ynei_15_5, T_sety0_23, T_setbi_24_1, T_setbi_24_2, T_setbi_24_3, T_setbi_24_4, T_setbi_24_5, pid1.T_yeqi_15_1, pid2.T_yeqi_15_2, pid3.T_yeqi_15_3, pid4.T_yeqi_15_4, pid5.T_yeqi_15_5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :10/27/45/82
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>(((LTLAP9==true))U((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G(F(F(("(((((((((((((((((((((((((((((((pid0.P_ify0_4_0>=1)&&(pid1.y_1>=1))||((pid0.P_ify0_4_0>=1)&&(pid2.y_2>=1)))||((pid0.P_ify0_4_0>=1)&&(pid3.y_3>=1)))||((pid0.P_ify0_4_0>=1)&&(pid4.y_4>=1)))||((pid0.P_ify0_4_0>=1)&&(pid5.y_5>=1)))||((pid1.P_ify0_4_1>=1)&&(pid1.y_1>=1)))||((pid1.P_ify0_4_1>=1)&&(pid2.y_2>=1)))||((pid1.P_ify0_4_1>=1)&&(pid3.y_3>=1)))||((pid1.P_ify0_4_1>=1)&&(pid4.y_4>=1)))||((pid1.P_ify0_4_1>=1)&&(pid5.y_5>=1)))||((pid2.P_ify0_4_2>=1)&&(pid1.y_1>=1)))||((pid2.P_ify0_4_2>=1)&&(pid2.y_2>=1)))||((pid2.P_ify0_4_2>=1)&&(pid3.y_3>=1)))||((pid2.P_ify0_4_2>=1)&&(pid4.y_4>=1)))||((pid2.P_ify0_4_2>=1)&&(pid5.y_5>=1)))||((pid3.P_ify0_4_3>=1)&&(pid1.y_1>=1)))||((pid3.P_ify0_4_3>=1)&&(pid2.y_2>=1)))||((pid3.P_ify0_4_3>=1)&&(pid3.y_3>=1)))||((pid3.P_ify0_4_3>=1)&&(pid4.y_4>=1)))||((pid3.P_ify0_4_3>=1)&&(pid5.y_5>=1)))||((pid4.P_ify0_4_4>=1)&&(pid1.y_1>=1)))||((pid4.P_ify0_4_4>=1)&&(pid2.y_2>=1)))||((pid4.P_ify0_4_4>=1)&&(pid3.y_3>=1)))||((pid4.P_ify0_4_4>=1)&&(pid4.y_4>=1)))||((pid4.P_ify0_4_4>=1)&&(pid5.y_5>=1)))||((pid5.P_ify0_4_5>=1)&&(pid1.y_1>=1)))||((pid5.P_ify0_4_5>=1)&&(pid2.y_2>=1)))||((pid5.P_ify0_4_5>=1)&&(pid3.y_3>=1)))||((pid5.P_ify0_4_5>=1)&&(pid4.y_4>=1)))||((pid5.P_ify0_4_5>=1)&&(pid5.y_5>=1)))")U("(((((((((((((pid0.P_setbi_24_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_24_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool11.b_11>=1)))"))))))
Formula 0 simplified : !GF("(((((((((((((((((((((((((((((((pid0.P_ify0_4_0>=1)&&(pid1.y_1>=1))||((pid0.P_ify0_4_0>=1)&&(pid2.y_2>=1)))||((pid0.P_ify0_4_0>=1)&&(pid3.y_3>=1)))||((pid0.P_ify0_4_0>=1)&&(pid4.y_4>=1)))||((pid0.P_ify0_4_0>=1)&&(pid5.y_5>=1)))||((pid1.P_ify0_4_1>=1)&&(pid1.y_1>=1)))||((pid1.P_ify0_4_1>=1)&&(pid2.y_2>=1)))||((pid1.P_ify0_4_1>=1)&&(pid3.y_3>=1)))||((pid1.P_ify0_4_1>=1)&&(pid4.y_4>=1)))||((pid1.P_ify0_4_1>=1)&&(pid5.y_5>=1)))||((pid2.P_ify0_4_2>=1)&&(pid1.y_1>=1)))||((pid2.P_ify0_4_2>=1)&&(pid2.y_2>=1)))||((pid2.P_ify0_4_2>=1)&&(pid3.y_3>=1)))||((pid2.P_ify0_4_2>=1)&&(pid4.y_4>=1)))||((pid2.P_ify0_4_2>=1)&&(pid5.y_5>=1)))||((pid3.P_ify0_4_3>=1)&&(pid1.y_1>=1)))||((pid3.P_ify0_4_3>=1)&&(pid2.y_2>=1)))||((pid3.P_ify0_4_3>=1)&&(pid3.y_3>=1)))||((pid3.P_ify0_4_3>=1)&&(pid4.y_4>=1)))||((pid3.P_ify0_4_3>=1)&&(pid5.y_5>=1)))||((pid4.P_ify0_4_4>=1)&&(pid1.y_1>=1)))||((pid4.P_ify0_4_4>=1)&&(pid2.y_2>=1)))||((pid4.P_ify0_4_4>=1)&&(pid3.y_3>=1)))||((pid4.P_ify0_4_4>=1)&&(pid4.y_4>=1)))||((pid4.P_ify0_4_4>=1)&&(pid5.y_5>=1)))||((pid5.P_ify0_4_5>=1)&&(pid1.y_1>=1)))||((pid5.P_ify0_4_5>=1)&&(pid2.y_2>=1)))||((pid5.P_ify0_4_5>=1)&&(pid3.y_3>=1)))||((pid5.P_ify0_4_5>=1)&&(pid4.y_4>=1)))||((pid5.P_ify0_4_5>=1)&&(pid5.y_5>=1)))" U "(((((((((((((pid0.P_setbi_24_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_24_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_24_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_24_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_24_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_24_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_24_5>=1)&&(pid_x_bool11.b_11>=1)))")
built 82 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions T_setbi_2_1, T_setbi_2_2, T_setbi_2_3, T_setbi_2_4, T_setbi_2_5, T_setx_3_0, T_setx_3_1, T_setx_3_2, T_setx_3_3, T_setx_3_4, T_setx_3_5, T_setbi_5_1, T_setbi_5_2, T_setbi_5_3, T_setbi_5_4, T_setbi_5_5, T_awaity, T_sety_9_0, T_sety_9_1, T_sety_9_2, T_sety_9_3, T_sety_9_4, T_sety_9_5, T_setbi_11_1, T_setbi_11_2, T_setbi_11_3, T_setbi_11_4, T_setbi_11_5, T_ynei_15_0, T_ynei_15_1, T_ynei_15_2, T_ynei_15_3, T_ynei_15_4, T_ynei_15_5, T_sety0_23, T_setbi_24_1, T_setbi_24_2, T_setbi_24_3, T_setbi_24_4, T_setbi_24_5, pid1.T_yeqi_15_1, pid2.T_yeqi_15_2, pid3.T_yeqi_15_3, pid4.T_yeqi_15_4, pid5.T_yeqi_15_5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :10/27/45/82

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 10:02:16 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 10:02:16 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 10:02:16 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 968 ms
Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 26, 2019 10:02:17 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 26, 2019 10:02:17 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
Mar 26, 2019 10:02:18 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 26, 2019 10:02:18 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 26, 2019 10:02:18 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 13.0 instantiations of transitions. Total transitions/syncs built is 333
Mar 26, 2019 10:02:18 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 124 ms
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 55 ms
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 82 transitions. Expanding to a total of 399 deterministic transitions.
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 174 places.
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 318 transitions.
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 82 transitions. Expanding to a total of 399 deterministic transitions.
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Mar 26, 2019 10:02:19 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
Mar 26, 2019 10:02:19 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 11 ms
Mar 26, 2019 10:02:19 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 77 ms
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 663 ms
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 318 transitions.
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/318 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 46 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 318 transitions.
Mar 26, 2019 10:02:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:02:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 318 transitions.
Mar 26, 2019 10:02:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/318) took 36 ms. Total solver calls (SAT/UNSAT): 57(0/57)
Mar 26, 2019 10:02:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/318) took 3046 ms. Total solver calls (SAT/UNSAT): 3933(230/3703)
Mar 26, 2019 10:02:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/318) took 6048 ms. Total solver calls (SAT/UNSAT): 8077(594/7483)
Mar 26, 2019 10:02:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/318) took 9092 ms. Total solver calls (SAT/UNSAT): 11948(979/10969)
Mar 26, 2019 10:02:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/318) took 12114 ms. Total solver calls (SAT/UNSAT): 15788(1295/14493)
Mar 26, 2019 10:02:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/318) took 15164 ms. Total solver calls (SAT/UNSAT): 18777(1597/17180)
Mar 26, 2019 10:02:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 16902 ms. Total solver calls (SAT/UNSAT): 20133(1725/18408)
Mar 26, 2019 10:02:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 318 transitions.
Mar 26, 2019 10:02:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 3183 ms. Total solver calls (SAT/UNSAT): 235(0/235)
Mar 26, 2019 10:02:47 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 27990ms conformant to PINS in folder :/home/mcc/execution
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 155 ms
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 150 ms
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_1_0,T_setbi_5bi_0_0,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_xnei_10i_3_0,T_xnei_10i_3_0,T_xnei_10i_3_0,T_xnei_10i_3_0,T_sety_9i_0_3,T_sety_9i_0_3,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_0_3,T_sety_9i_0_3,T_ynei_15_3,T_setx_3i_0_3,T_setx_3i_0_3,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_0_3,T_setx_3i_0_3,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_xnei_10i_1_0,T_xnei_10i_1_0,T_xnei_10i_1_0,T_xnei_10i_1_0,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_ynei_15_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_0,T_setbi_5bi_1_0,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_4,T_setbi_5bi_1_4,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_2,T_setbi_5bi_1_2,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_1,T_setbi_5bi_1_1,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 31 events :T_sety0_23y_1,T_sety0_23y_1,T_sety0_23y_1,T_sety0_23y_1,T_awaity,T_ynei_15i_1_0,T_ynei_15i_1_0,T_ynei_15i_1_0,T_ynei_15i_1_0,T_xnei_10i_0_1,T_xnei_10i_0_1,T_xnei_10i_0_1,T_xnei_10i_0_1,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_awaity,T_awaity,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_xnei_10i_2_0,T_xnei_10i_2_0,T_xnei_10i_2_0,T_xnei_10i_2_0,T_sety_9i_0_2,T_sety_9i_0_2,T_sety_9i_0_2,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_0_2,T_ynei_15_2,T_setx_3i_0_2,T_setx_3i_0_2,T_setx_3i_0_2,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_0_2,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_1_3,T_setbi_5bi_0_3,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_1_2,T_setbi_5bi_0_2,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_xnei_10i_5_0,T_xnei_10i_5_0,T_xnei_10i_5_0,T_xnei_10i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_0_5,T_sety_9i_0_5,T_sety_9i_0_5,T_sety_9i_0_5,T_ynei_15_5,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_0_5,T_setx_3i_0_5,T_setx_3i_0_5,T_setx_3i_0_5,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_xnei_10i_4_0,T_xnei_10i_4_0,T_xnei_10i_4_0,T_xnei_10i_4_0,T_sety_9i_0_4,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_0_4,T_sety_9i_0_4,T_sety_9i_0_4,T_ynei_15_4,T_setx_3i_0_4,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_0_4,T_setx_3i_0_4,T_setx_3i_0_4,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_1_4,T_setbi_5bi_0_4,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_1_1,T_setbi_5bi_0_1,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_1_5,T_setbi_5bi_0_5,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_3,T_setbi_5bi_1_3,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_5,T_setbi_5bi_1_5,
Mar 26, 2019 10:22:20 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 233 redundant transitions.
Mar 26, 2019 10:22:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 332 ms
Mar 26, 2019 10:22:21 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 22 ms
Mar 26, 2019 10:22:21 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 62 ms
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36 ms
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_0_2,T_setbi_5bi_1_2,T_setbi_5bi_0_2,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_0_0,T_setbi_5bi_1_0,T_setbi_5bi_0_0,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_0_1,T_setbi_5bi_1_1,T_setbi_5bi_0_1,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_4,T_setbi_5bi_1_4,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_ynei_15i_0_3,T_xnei_10i_3_0,T_xnei_10i_3_0,T_xnei_10i_3_0,T_xnei_10i_3_0,T_sety_9i_0_3,T_sety_9i_0_3,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_3_0,T_sety_9i_0_3,T_sety_9i_0_3,T_ynei_15_3,T_setx_3i_0_3,T_setx_3i_0_3,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_3_0,T_setx_3i_0_3,T_setx_3i_0_3,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_0_4,T_setbi_5bi_1_4,T_setbi_5bi_0_4,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 31 events :T_sety0_23y_1,T_sety0_23y_1,T_sety0_23y_1,T_sety0_23y_1,T_awaity,T_ynei_15i_1_0,T_ynei_15i_1_0,T_ynei_15i_1_0,T_ynei_15i_1_0,T_xnei_10i_0_1,T_xnei_10i_0_1,T_xnei_10i_0_1,T_xnei_10i_0_1,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_awaity,T_awaity,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_ynei_15i_0_2,T_xnei_10i_2_0,T_xnei_10i_2_0,T_xnei_10i_2_0,T_xnei_10i_2_0,T_sety_9i_0_2,T_sety_9i_0_2,T_sety_9i_0_2,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_2_0,T_sety_9i_0_2,T_ynei_15_2,T_setx_3i_0_2,T_setx_3i_0_2,T_setx_3i_0_2,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_2_0,T_setx_3i_0_2,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_2,T_setbi_5bi_1_2,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_0,T_setbi_5bi_1_0,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_3,T_setbi_5bi_1_3,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_ynei_15i_0_1,T_xnei_10i_1_0,T_xnei_10i_1_0,T_xnei_10i_1_0,T_xnei_10i_1_0,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_0_1,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_sety_9i_1_0,T_ynei_15_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_0_1,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,T_setx_3i_1_0,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_0_3,T_setbi_5bi_1_3,T_setbi_5bi_0_3,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_ynei_15i_0_4,T_xnei_10i_4_0,T_xnei_10i_4_0,T_xnei_10i_4_0,T_xnei_10i_4_0,T_sety_9i_0_4,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_4_0,T_sety_9i_0_4,T_sety_9i_0_4,T_sety_9i_0_4,T_ynei_15_4,T_setx_3i_0_4,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_4_0,T_setx_3i_0_4,T_setx_3i_0_4,T_setx_3i_0_4,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :T_setbi_5bi_1_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_0_5,T_setbi_5bi_1_5,T_setbi_5bi_0_5,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :T_sety_9i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_ynei_15i_0_5,T_xnei_10i_5_0,T_xnei_10i_5_0,T_xnei_10i_5_0,T_xnei_10i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_5_0,T_sety_9i_0_5,T_sety_9i_0_5,T_sety_9i_0_5,T_sety_9i_0_5,T_ynei_15_5,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_5_0,T_setx_3i_0_5,T_setx_3i_0_5,T_setx_3i_0_5,T_setx_3i_0_5,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_5,T_setbi_5bi_1_5,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :T_setbi_5bi_1_1,T_setbi_5bi_1_1,
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 233 redundant transitions.
Mar 26, 2019 10:42:21 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 92 ms
Mar 26, 2019 10:42:21 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
Mar 26, 2019 10:42:21 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-5"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is LamportFastMutEx-COL-5, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r196-smll-155246587200151"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-5.tgz
mv LamportFastMutEx-COL-5 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;