fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r195-csrt-155246553900061
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for FMS-PT-00200

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4546.110 2013980.00 3744442.00 249.90 FFFFFFTFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r195-csrt-155246553900061.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is FMS-PT-00200, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r195-csrt-155246553900061
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 188K
-rw-r--r-- 1 mcc users 3.3K Feb 10 23:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 10 23:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 6 20:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 6 20:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 99 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 337 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.3K Feb 4 23:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K Feb 4 22:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 3 08:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 3 08:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Jan 31 01:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Jan 31 01:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 4 22:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:20 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 0 Jan 29 09:34 model-fix.log
-rw-r--r-- 1 mcc users 17K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00200-LTLFireability-00
FORMULA_NAME FMS-PT-00200-LTLFireability-01
FORMULA_NAME FMS-PT-00200-LTLFireability-02
FORMULA_NAME FMS-PT-00200-LTLFireability-03
FORMULA_NAME FMS-PT-00200-LTLFireability-04
FORMULA_NAME FMS-PT-00200-LTLFireability-05
FORMULA_NAME FMS-PT-00200-LTLFireability-06
FORMULA_NAME FMS-PT-00200-LTLFireability-07
FORMULA_NAME FMS-PT-00200-LTLFireability-08
FORMULA_NAME FMS-PT-00200-LTLFireability-09
FORMULA_NAME FMS-PT-00200-LTLFireability-10
FORMULA_NAME FMS-PT-00200-LTLFireability-11
FORMULA_NAME FMS-PT-00200-LTLFireability-12
FORMULA_NAME FMS-PT-00200-LTLFireability-13
FORMULA_NAME FMS-PT-00200-LTLFireability-14
FORMULA_NAME FMS-PT-00200-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553711329493

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((X("(P2M2>=1)")))
Formula 0 simplified : !X"(P2M2>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 20 rows 22 cols
invariant :P12M3 + M3 = 2
invariant :P12 + P2wM2 + P2 + P2M2 + P12wM3 + P12s + -1'M3 + P2wP1 + P2d + P2s = 198
invariant :P1d + P1s + P1wP2 + P12 + P1 + P1wM1 + -1'M1 + P12wM3 + P12s + -1'M3 = 195
invariant :P3s + P3M2 + P3 = 200
invariant :M2 + P2M2 = 1
invariant :P1M1 + M1 = 3
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 485 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 56 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 562 ms.
FORMULA FMS-PT-00200-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 89 ms.
FORMULA FMS-PT-00200-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(((LTLAP1==true))U(<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 182 ms.
FORMULA FMS-PT-00200-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(<>([]([]((LTLAP5==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 153 ms.
FORMULA FMS-PT-00200-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 382 ms.
FORMULA FMS-PT-00200-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 156 ms.
FORMULA FMS-PT-00200-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X(<>((LTLAP6==true))))U(((LTLAP7==true))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 198 ms.
FORMULA FMS-PT-00200-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([]([](<>((LTLAP0==true)))))U(X((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 127 ms.
FORMULA FMS-PT-00200-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 310 ms.
FORMULA FMS-PT-00200-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>(<>((LTLAP0==true))))U(((LTLAP7==true))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 193 ms.
FORMULA FMS-PT-00200-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP9==true))U(<>(<>([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 704 ms.
FORMULA FMS-PT-00200-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>(<>(<>((LTLAP3==true)))))U([]([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 509 ms.
FORMULA FMS-PT-00200-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([]((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 320 ms.
FORMULA FMS-PT-00200-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP12==true))U((LTLAP13==true))))U(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 758 ms.
FORMULA FMS-PT-00200-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 296 ms.
FORMULA FMS-PT-00200-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
23168 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,231.713,1680728,1,0,7,1.19265e+07,20,0,3681,1.1149e+07,20
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((false))
Formula 1 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,231.715,1680728,1,0,7,1.19265e+07,20,0,3681,1.1149e+07,22
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F(("(P2d>=1)")U(F(F("((P2wM2>=1)&&(M2>=1))"))))))
Formula 2 simplified : !F("(P2d>=1)" U F"((P2wM2>=1)&&(M2>=1))")
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G((G(X("(P3s>=1)")))U(X(F("(P1>=1)"))))))
Formula 0 simplified : !G(GX"(P3s>=1)" U XF"(P1>=1)")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
75790 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,757.912,4215696,1,0,7,3.0514e+07,20,1,3532,3.07656e+07,20
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL

BK_STOP 1553713343473

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 29 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 22 places.
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 20 transitions.
Mar 27, 2019 6:28:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 38 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 10 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 20 transitions.
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 22 places.
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 20 transitions.
Mar 27, 2019 6:28:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 27, 2019 6:28:51 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 20 transitions.
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 6 ms
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 22 variables to be positive in 115 ms
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 20 transitions.
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/20 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 20 transitions.
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 20 transitions.
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 331 ms. Total solver calls (SAT/UNSAT): 82(80/2)
Mar 27, 2019 6:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 20 transitions.
Mar 27, 2019 6:28:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 95 ms. Total solver calls (SAT/UNSAT): 24(0/24)
Mar 27, 2019 6:28:53 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1087ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 0/ 8), 0.002: Loading model from ./gal.so
pins2lts-mc( 0/ 8), 0.008: library has no initializer
pins2lts-mc( 4/ 8), 0.006: library has no initializer
pins2lts-mc( 4/ 8), 0.006: loading model GAL
pins2lts-mc( 0/ 8), 0.008: loading model GAL
pins2lts-mc( 0/ 8), 0.008: completed loading model GAL
pins2lts-mc( 0/ 8), 0.008: LTL layer: formula: [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true)))))
pins2lts-mc( 3/ 8), 0.006: library has no initializer
pins2lts-mc( 3/ 8), 0.006: loading model GAL
pins2lts-mc( 0/ 8), 0.008: "[](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true)))))" is not a file, parsing as formula...
pins2lts-mc( 3/ 8), 0.006: completed loading model GAL
pins2lts-mc( 1/ 8), 0.006: library has no initializer
pins2lts-mc( 1/ 8), 0.006: loading model GAL
pins2lts-mc( 0/ 8), 0.008: Using Spin LTL semantics
pins2lts-mc( 1/ 8), 0.006: completed loading model GAL
pins2lts-mc( 2/ 8), 0.007: library has no initializer
pins2lts-mc( 2/ 8), 0.007: loading model GAL
pins2lts-mc( 2/ 8), 0.007: completed loading model GAL
pins2lts-mc( 5/ 8), 0.006: library has no initializer
pins2lts-mc( 5/ 8), 0.006: loading model GAL
pins2lts-mc( 5/ 8), 0.006: completed loading model GAL
pins2lts-mc( 4/ 8), 0.006: completed loading model GAL
pins2lts-mc( 6/ 8), 0.006: library has no initializer
pins2lts-mc( 6/ 8), 0.006: loading model GAL
pins2lts-mc( 6/ 8), 0.006: completed loading model GAL
pins2lts-mc( 7/ 8), 0.006: library has no initializer
pins2lts-mc( 7/ 8), 0.006: loading model GAL
pins2lts-mc( 7/ 8), 0.007: completed loading model GAL
pins2lts-mc( 0/ 8), 0.018: buchi has 2 states
pins2lts-mc( 0/ 8), 0.019: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc( 0/ 8), 0.053: DFS-FIFO for weak LTL, using special progress label 35
pins2lts-mc( 0/ 8), 0.053: There are 36 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 0.053: State length is 23, there are 23 groups
pins2lts-mc( 0/ 8), 0.053: Running dfsfifo using 8 cores
pins2lts-mc( 0/ 8), 0.053: Using a tree table with 2^27 elements
pins2lts-mc( 0/ 8), 0.053: Successor permutation: rr
pins2lts-mc( 0/ 8), 0.053: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc( 3/ 8), 0.366: ~1 levels ~960 states ~5640 transitions
pins2lts-mc( 3/ 8), 0.388: ~1 levels ~1920 states ~11592 transitions
pins2lts-mc( 3/ 8), 0.415: ~1 levels ~3840 states ~24088 transitions
pins2lts-mc( 3/ 8), 0.468: ~1 levels ~7680 states ~49680 transitions
pins2lts-mc( 3/ 8), 0.642: ~1 levels ~15360 states ~102160 transitions
pins2lts-mc( 0/ 8), 0.964: ~1 levels ~30720 states ~208800 transitions
pins2lts-mc( 0/ 8), 1.373: ~1 levels ~61440 states ~432976 transitions
pins2lts-mc( 0/ 8), 2.194: ~1 levels ~122880 states ~892584 transitions
pins2lts-mc( 0/ 8), 3.713: ~1 levels ~245760 states ~1845744 transitions
pins2lts-mc( 5/ 8), 5.423: ~1 levels ~491520 states ~4015624 transitions
pins2lts-mc( 5/ 8), 9.968: ~1 levels ~983040 states ~8230576 transitions
pins2lts-mc( 0/ 8), 13.860: ~1 levels ~1966080 states ~16293216 transitions
pins2lts-mc( 5/ 8), 17.584: ~1 levels ~3932160 states ~34864432 transitions
pins2lts-mc( 5/ 8), 26.755: ~1 levels ~7864320 states ~70908552 transitions
pins2lts-mc( 5/ 8), 47.068: ~1 levels ~15728640 states ~145491608 transitions
pins2lts-mc( 5/ 8), 90.809: ~1 levels ~31457280 states ~299302304 transitions
pins2lts-mc( 0/ 8), 178.975: ~1 levels ~62914560 states ~600563032 transitions
pins2lts-mc( 1/ 8), 347.181: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 347.215:
pins2lts-mc( 0/ 8), 347.215: mean standard work distribution: 3.3% (states) 3.6% (transitions)
pins2lts-mc( 0/ 8), 347.215:
pins2lts-mc( 0/ 8), 347.215: Explored 105728439 states 1029478966 transitions, fanout: 9.737
pins2lts-mc( 0/ 8), 347.215: Total exploration time 347.150 sec (347.070 sec minimum, 347.109 sec on average)
pins2lts-mc( 0/ 8), 347.215: States per second: 304561, Transitions per second: 2965516
pins2lts-mc( 0/ 8), 347.215:
pins2lts-mc( 0/ 8), 347.215: Progress states detected: 134217084
pins2lts-mc( 0/ 8), 347.215: Redundant explorations: -21.2259
pins2lts-mc( 0/ 8), 347.215:
pins2lts-mc( 0/ 8), 347.215: Queue width: 8B, total height: 54327284, memory: 414.48MB
pins2lts-mc( 0/ 8), 347.215: Tree memory: 1033.4MB, 8.1 B/state, compr.: 8.6%
pins2lts-mc( 0/ 8), 347.215: Tree fill ratio (roots/leafs): 99.0%/3.0%
pins2lts-mc( 0/ 8), 347.215: Stored 21 string chucks using 0MB
pins2lts-mc( 0/ 8), 347.215: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 347.215: Est. total memory use: 1447.9MB (~1438.5MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP3==true))))U(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:168)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 6:48:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 5 ms
Mar 27, 2019 6:48:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 0 ms
Mar 27, 2019 6:48:52 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00200"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is FMS-PT-00200, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r195-csrt-155246553900061"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00200.tgz
mv FMS-PT-00200 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;