Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r190-smll-155225126800197.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is CircularTrains-PT-096, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r190-smll-155225126800197
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 232K
-rw-r--r-- 1 mcc users 3.7K Feb 9 08:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 9 08:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 07:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 5 07:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 108 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 346 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.5K Feb 4 23:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 2 01:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 2 01:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Jan 29 15:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Jan 29 15:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 73K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-00
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-01
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-02
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-03
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-04
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-05
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-06
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-07
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-08
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-09
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-10
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-11
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-12
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-13
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-14
FORMULA_NAME CircularTrains-PT-096-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553643146338

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 96 rows 192 cols
invariant :Section_51 + -1'Section_49 + -1'F49 + F50 = 1
invariant :Section_18 + Section_17 + F17 = 2
invariant :F2 + -1'F1 + Section_3 + -1'Section_1 = 1
invariant :Section_54 + Section_53 + F53 = 2
invariant :Section_67 + F66 + -1'F65 + -1'Section_65 = -1
invariant :F59 + Section_60 + Section_59 = 2
invariant :Section_85 + F84 + Section_84 = 1
invariant :Section_81 + F80 + Section_80 = 2
invariant :F58 + Section_58 + Section_59 = 1
invariant :Section_28 + -1'Section_26 + F27 + -1'F26 = -1
invariant :Section_94 + F93 + -1'Section_92 + -1'F92 = -1
invariant :Section_89 + F88 + Section_88 = 1
invariant :F74 + -1'Section_76 + -1'F75 + Section_74 = 1
invariant :F46 + Section_47 + Section_46 = 1
invariant :F42 + -1'F43 + F40 + Section_40 + -1'Section_44 + -1'F41 = -1
invariant :F16 + -1'Section_15 + Section_17 + -1'F15 = 0
invariant :F37 + F39 + Section_40 + -1'F36 + Section_35 + -1'F38 + F35 = 1
invariant :Section_73 + Section_72 + F72 = 1
invariant :Section_82 + F81 + -1'F80 + -1'Section_80 = -1
invariant :F62 + Section_63 + Section_62 = 2
invariant :Section_14 + F13 + Section_13 = 1
invariant :Section_21 + Section_20 + F20 = 2
invariant :F33 + -1'F34 + Section_33 + -1'Section_35 = 0
invariant :Section_71 + Section_72 + F71 = 2
invariant :F23 + Section_24 + -1'F22 + -1'Section_22 = 1
invariant :F44 + Section_45 + Section_44 = 2
invariant :F89 + Section_90 + -1'F88 + -1'Section_88 = 1
invariant :F85 + -1'F84 + -1'Section_84 + Section_86 = 0
invariant :Section_37 + F36 + -1'Section_35 + -1'F35 = -1
invariant :F82 + -1'F81 + F80 + Section_83 + Section_80 = 2
invariant :Section_25 + Section_24 + F24 = 1
invariant :F14 + Section_15 + -1'F13 + -1'Section_13 = 1
invariant :F87 + Section_87 + Section_88 = 1
invariant :Section_69 + F68 + Section_68 = 2
invariant :F60 + Section_60 + Section_61 = 1
invariant :Section_4 + Section_5 + F4 = 1
invariant :F83 + Section_84 + Section_83 = 2
invariant :Section_95 + Section_60 + -1'F96 + -1'F43 + -1'F34 + Section_33 + Section_87 + -1'F91 + Section_90 + Section_79 + -1'F29 + -1'F1 + Section_45 + -1'F15 + -1'F68 + -1'F77 + -1'F54 + Section_3 + Section_26 + Section_10 + -1'F84 + -1'F47 + -1'F63 + -1'F8 + -1'F31 + -1'F75 + Section_49 + -1'F24 + -1'Section_72 + -1'F72 + -1'F27 + -1'F88 + -1'Section_5 + Section_70 + -1'F13 + Section_19 + -1'F66 + Section_40 + -1'F36 + Section_61 + -1'F93 + Section_74 + Section_58 + -1'F22 + -1'F81 + Section_7 + Section_83 + Section_53 + -1'F5 + Section_59 + -1'F11 + -1'F71 + -1'F4 + -1'Section_1 + -1'F41 + -1'F56 + Section_86 + Section_52 + Section_62 + -1'F20 + -1'F17 + Section_65 + -1'F38 + -1'F50 + Section_46 + Section_80 = -18
invariant :F32 + Section_33 + -1'F31 + -1'Section_31 = 1
invariant :F90 + -1'F91 + Section_90 + -1'Section_92 = 0
invariant :Section_91 + F91 + Section_92 = 1
invariant :F51 + Section_49 + F49 + Section_52 + -1'F50 = 0
invariant :F6 + -1'Section_5 + Section_7 + -1'F5 = -1
invariant :F28 + Section_26 + -1'F27 + F26 + Section_29 = 2
invariant :F94 + -1'Section_60 + F96 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + Section_92 + Section_1 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F92 + F38 + F50 + -1'Section_46 + -1'Section_80 = 20
invariant :Section_75 + Section_76 + F75 = 1
invariant :F19 + Section_19 + Section_20 = 1
invariant :F45 + Section_45 + Section_46 = 1
invariant :F25 + -1'Section_24 + Section_26 + -1'F24 = 0
invariant :Section_41 + F40 + Section_40 = 1
invariant :F73 + -1'Section_72 + -1'F72 + Section_74 = 0
invariant :F21 + -1'Section_20 + Section_22 + -1'F20 = -1
invariant :Section_55 + F54 + -1'Section_53 + -1'F53 = -1
invariant :F48 + -1'F47 + Section_49 + -1'Section_47 = -1
invariant :Section_36 + Section_35 + F35 = 2
invariant :Section_66 + F65 + Section_65 = 2
invariant :Section_2 + F1 + Section_1 = 1
invariant :Section_96 + F96 + Section_1 = 1
invariant :F18 + -1'Section_17 + Section_19 + -1'F17 = -1
invariant :F79 + Section_79 + Section_80 = 1
invariant :F76 + Section_76 + Section_77 = 1
invariant :Section_16 + Section_15 + F15 = 1
invariant :F30 + -1'F29 + Section_31 + -1'Section_29 = -1
invariant :Section_27 + Section_26 + F26 = 2
invariant :F70 + -1'Section_72 + Section_70 + -1'F71 = -1
invariant :F78 + Section_79 + -1'F77 + -1'Section_77 = -1
invariant :F7 + Section_8 + Section_7 = 1
invariant :F9 + Section_10 + -1'F8 + -1'Section_8 = -1
invariant :F57 + -1'Section_56 + Section_58 + -1'F56 = -1
invariant :Section_43 + F43 + Section_44 = 1
invariant :F67 + -1'F66 + F65 + Section_68 + Section_65 = 2
invariant :F86 + Section_87 + Section_86 = 2
invariant :Section_12 + -1'Section_10 + -1'F10 + F11 = 1
invariant :F95 + -1'Section_60 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + F93 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F38 + F50 + -1'Section_46 + -1'Section_80 = 19
invariant :Section_34 + F34 + Section_35 = 1
invariant :Section_93 + Section_92 + F92 = 2
invariant :F52 + Section_53 + Section_52 = 1
invariant :Section_48 + F47 + Section_47 = 2
invariant :Section_32 + F31 + Section_31 = 1
invariant :Section_6 + Section_5 + F5 = 2
invariant :Section_57 + Section_56 + F56 = 2
invariant :Section_78 + F77 + Section_77 = 2
invariant :Section_38 + -1'F39 + -1'Section_40 + F38 = 1
invariant :F64 + -1'Section_63 + -1'F63 + Section_65 = 0
invariant :Section_42 + -1'F40 + -1'Section_40 + F41 = 1
invariant :F3 + Section_3 + -1'Section_5 + -1'F4 = 0
invariant :F12 + Section_10 + F10 + -1'F11 + Section_13 = 0
invariant :Section_11 + Section_10 + F10 = 1
invariant :Section_9 + F8 + Section_8 = 2
invariant :Section_64 + Section_63 + F63 = 1
invariant :Section_50 + Section_49 + F49 = 1
invariant :Section_23 + F22 + Section_22 = 1
invariant :Section_30 + F29 + Section_29 = 2
invariant :Section_39 + F39 + Section_40 = 1
invariant :F55 + Section_56 + -1'F54 + Section_53 + F53 = 2
invariant :F61 + Section_61 + Section_62 = 1
invariant :F69 + -1'F68 + Section_70 + -1'Section_68 = -1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 96 rows 192 cols
invariant :Section_51 + -1'Section_49 + -1'F49 + F50 = 1
invariant :Section_18 + Section_17 + F17 = 2
invariant :F2 + -1'F1 + Section_3 + -1'Section_1 = 1
invariant :Section_54 + Section_53 + F53 = 2
invariant :Section_67 + F66 + -1'F65 + -1'Section_65 = -1
invariant :F59 + Section_60 + Section_59 = 2
invariant :Section_85 + F84 + Section_84 = 1
invariant :Section_81 + F80 + Section_80 = 2
invariant :F58 + Section_58 + Section_59 = 1
invariant :Section_28 + -1'Section_26 + F27 + -1'F26 = -1
invariant :Section_94 + F93 + -1'Section_92 + -1'F92 = -1
invariant :Section_89 + F88 + Section_88 = 1
invariant :F74 + -1'Section_76 + -1'F75 + Section_74 = 1
invariant :F46 + Section_47 + Section_46 = 1
invariant :F42 + -1'F43 + F40 + Section_40 + -1'Section_44 + -1'F41 = -1
invariant :F16 + -1'Section_15 + Section_17 + -1'F15 = 0
invariant :F37 + F39 + Section_40 + -1'F36 + Section_35 + -1'F38 + F35 = 1
invariant :Section_73 + Section_72 + F72 = 1
invariant :Section_82 + F81 + -1'F80 + -1'Section_80 = -1
invariant :F62 + Section_63 + Section_62 = 2
invariant :Section_14 + F13 + Section_13 = 1
invariant :Section_21 + Section_20 + F20 = 2
invariant :F33 + -1'F34 + Section_33 + -1'Section_35 = 0
invariant :Section_71 + Section_72 + F71 = 2
invariant :F23 + Section_24 + -1'F22 + -1'Section_22 = 1
invariant :F44 + Section_45 + Section_44 = 2
invariant :F89 + Section_90 + -1'F88 + -1'Section_88 = 1
invariant :F85 + -1'F84 + -1'Section_84 + Section_86 = 0
invariant :Section_37 + F36 + -1'Section_35 + -1'F35 = -1
invariant :F82 + -1'F81 + F80 + Section_83 + Section_80 = 2
invariant :Section_25 + Section_24 + F24 = 1
invariant :F14 + Section_15 + -1'F13 + -1'Section_13 = 1
invariant :F87 + Section_87 + Section_88 = 1
invariant :Section_69 + F68 + Section_68 = 2
invariant :F60 + Section_60 + Section_61 = 1
invariant :Section_4 + Section_5 + F4 = 1
invariant :F83 + Section_84 + Section_83 = 2
invariant :Section_95 + Section_60 + -1'F96 + -1'F43 + -1'F34 + Section_33 + Section_87 + -1'F91 + Section_90 + Section_79 + -1'F29 + -1'F1 + Section_45 + -1'F15 + -1'F68 + -1'F77 + -1'F54 + Section_3 + Section_26 + Section_10 + -1'F84 + -1'F47 + -1'F63 + -1'F8 + -1'F31 + -1'F75 + Section_49 + -1'F24 + -1'Section_72 + -1'F72 + -1'F27 + -1'F88 + -1'Section_5 + Section_70 + -1'F13 + Section_19 + -1'F66 + Section_40 + -1'F36 + Section_61 + -1'F93 + Section_74 + Section_58 + -1'F22 + -1'F81 + Section_7 + Section_83 + Section_53 + -1'F5 + Section_59 + -1'F11 + -1'F71 + -1'F4 + -1'Section_1 + -1'F41 + -1'F56 + Section_86 + Section_52 + Section_62 + -1'F20 + -1'F17 + Section_65 + -1'F38 + -1'F50 + Section_46 + Section_80 = -18
invariant :F32 + Section_33 + -1'F31 + -1'Section_31 = 1
invariant :F90 + -1'F91 + Section_90 + -1'Section_92 = 0
invariant :Section_91 + F91 + Section_92 = 1
invariant :F51 + Section_49 + F49 + Section_52 + -1'F50 = 0
invariant :F6 + -1'Section_5 + Section_7 + -1'F5 = -1
invariant :F28 + Section_26 + -1'F27 + F26 + Section_29 = 2
invariant :F94 + -1'Section_60 + F96 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + Section_92 + Section_1 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F92 + F38 + F50 + -1'Section_46 + -1'Section_80 = 20
invariant :Section_75 + Section_76 + F75 = 1
invariant :F19 + Section_19 + Section_20 = 1
invariant :F45 + Section_45 + Section_46 = 1
invariant :F25 + -1'Section_24 + Section_26 + -1'F24 = 0
invariant :Section_41 + F40 + Section_40 = 1
invariant :F73 + -1'Section_72 + -1'F72 + Section_74 = 0
invariant :F21 + -1'Section_20 + Section_22 + -1'F20 = -1
invariant :Section_55 + F54 + -1'Section_53 + -1'F53 = -1
invariant :F48 + -1'F47 + Section_49 + -1'Section_47 = -1
invariant :Section_36 + Section_35 + F35 = 2
invariant :Section_66 + F65 + Section_65 = 2
invariant :Section_2 + F1 + Section_1 = 1
invariant :Section_96 + F96 + Section_1 = 1
invariant :F18 + -1'Section_17 + Section_19 + -1'F17 = -1
invariant :F79 + Section_79 + Section_80 = 1
invariant :F76 + Section_76 + Section_77 = 1
invariant :Section_16 + Section_15 + F15 = 1
invariant :F30 + -1'F29 + Section_31 + -1'Section_29 = -1
invariant :Section_27 + Section_26 + F26 = 2
invariant :F70 + -1'Section_72 + Section_70 + -1'F71 = -1
invariant :F78 + Section_79 + -1'F77 + -1'Section_77 = -1
invariant :F7 + Section_8 + Section_7 = 1
invariant :F9 + Section_10 + -1'F8 + -1'Section_8 = -1
invariant :F57 + -1'Section_56 + Section_58 + -1'F56 = -1
invariant :Section_43 + F43 + Section_44 = 1
invariant :F67 + -1'F66 + F65 + Section_68 + Section_65 = 2
invariant :F86 + Section_87 + Section_86 = 2
invariant :Section_12 + -1'Section_10 + -1'F10 + F11 = 1
invariant :F95 + -1'Section_60 + F43 + F34 + -1'Section_33 + -1'Section_87 + F91 + -1'Section_90 + -1'Section_79 + F29 + F1 + -1'Section_45 + F15 + F68 + F77 + F54 + -1'Section_3 + -1'Section_26 + -1'Section_10 + F84 + F47 + F63 + F8 + F31 + F75 + -1'Section_49 + F24 + Section_72 + F72 + F27 + F88 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F66 + -1'Section_40 + F36 + -1'Section_61 + F93 + -1'Section_74 + -1'Section_58 + F22 + F81 + -1'Section_7 + -1'Section_83 + -1'Section_53 + F5 + -1'Section_59 + F11 + F71 + F4 + F41 + F56 + -1'Section_86 + -1'Section_52 + -1'Section_62 + F20 + F17 + -1'Section_65 + F38 + F50 + -1'Section_46 + -1'Section_80 = 19
invariant :Section_34 + F34 + Section_35 = 1
invariant :Section_93 + Section_92 + F92 = 2
invariant :F52 + Section_53 + Section_52 = 1
invariant :Section_48 + F47 + Section_47 = 2
invariant :Section_32 + F31 + Section_31 = 1
invariant :Section_6 + Section_5 + F5 = 2
invariant :Section_57 + Section_56 + F56 = 2
invariant :Section_78 + F77 + Section_77 = 2
invariant :Section_38 + -1'F39 + -1'Section_40 + F38 = 1
invariant :F64 + -1'Section_63 + -1'F63 + Section_65 = 0
invariant :Section_42 + -1'F40 + -1'Section_40 + F41 = 1
invariant :F3 + Section_3 + -1'Section_5 + -1'F4 = 0
invariant :F12 + Section_10 + F10 + -1'F11 + Section_13 = 0
invariant :Section_11 + Section_10 + F10 = 1
invariant :Section_9 + F8 + Section_8 = 2
invariant :Section_64 + Section_63 + F63 = 1
invariant :Section_50 + Section_49 + F49 = 1
invariant :Section_23 + F22 + Section_22 = 1
invariant :Section_30 + F29 + Section_29 = 2
invariant :Section_39 + F39 + Section_40 = 1
invariant :F55 + Section_56 + -1'F54 + Section_53 + F53 = 2
invariant :F61 + Section_61 + Section_62 = 1
invariant :F69 + -1'F68 + Section_70 + -1'Section_68 = -1
FORMULA CircularTrains-PT-096-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-11 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-12 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA CircularTrains-PT-096-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2850 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 54 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, CircularTrainsPT096ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 260 ms.
Found Violation
FORMULA CircularTrains-PT-096-ReachabilityCardinality-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, CircularTrainsPT096ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 365 ms.
Found Violation
FORMULA CircularTrains-PT-096-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, CircularTrainsPT096ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
LTSmin run took 248 ms.
Found Violation
FORMULA CircularTrains-PT-096-ReachabilityCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, CircularTrainsPT096ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
LTSmin run took 207 ms.
Found Violation
FORMULA CircularTrains-PT-096-ReachabilityCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, CircularTrainsPT096ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
LTSmin run took 321 ms.
Found Violation
FORMULA CircularTrains-PT-096-ReachabilityCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
P-invariant computation with GreatSPN timed out. Skipping.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-00 with value :(((!(F39<=F26))||(Section_77>=2))&&((!(F18<=Section_30))||(!(F26<=Section_37))))
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-01 with value :(Section_72>=3)
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-02 with value :((Section_23>=2)&&(F36<=F57))
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-03 with value :(!((!(Section_68>=2))||((Section_47<=F9)||(F13<=F66))))
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-04 with value :(((Section_70>=2)&&(!(F60<=F24)))&&(!((F31<=F18)||(F62>=3))))
Read [invariant] property : CircularTrains-PT-096-ReachabilityCardinality-05 with value :(Section_35<=F59)
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-06 with value :(Section_45>=2)
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-07 with value :(!((Section_86<=F10)||((Section_48<=F16)||(F32<=Section_71))))
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-08 with value :(F21>=2)
Read [invariant] property : CircularTrains-PT-096-ReachabilityCardinality-09 with value :(((Section_50>=1)||((F81<=Section_54)||(F68>=2)))||(F22<=F89))
Read [invariant] property : CircularTrains-PT-096-ReachabilityCardinality-10 with value :(((Section_11<=Section_48)||(F2>=1))||(((Section_79<=F88)||(Section_78<=F38))||((F55<=F24)&&(F13<=F3))))
Read [invariant] property : CircularTrains-PT-096-ReachabilityCardinality-11 with value :(!(Section_39>=2))
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-12 with value :((((F54>=3)&&(F80<=Section_12))&&((F6<=F90)&&(Section_21>=1)))&&(F9>=3))
Read [invariant] property : CircularTrains-PT-096-ReachabilityCardinality-13 with value :(Section_64<=F35)
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-14 with value :(Section_93>=2)
Read [reachable] property : CircularTrains-PT-096-ReachabilityCardinality-15 with value :(((F47<=Section_21)||((F36<=Section_93)||(Section_29<=Section_13)))&&(F2>=3))
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri,2.5913e+21,3.23916,70760,2,16862,5,351149,6,0,867,378699,0
Total reachable state count : 2591300278296609652224

Verifying 16 reachability properties.
Reachability property CircularTrains-PT-096-ReachabilityCardinality-00 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-00,2.00652e+13,3.27733,71044,2,6785,6,351149,7,0,891,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-01,0,3.28386,71108,1,0,6,351149,8,0,892,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-02 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-02,0,3.29847,71108,1,0,6,351149,9,0,898,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-03 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-03,0,3.31605,71108,1,0,6,351149,10,0,905,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-04 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-04,0,3.33946,71108,1,0,6,351149,11,0,921,378699,0
Invariant property CircularTrains-PT-096-ReachabilityCardinality-05 does not hold.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-05,2.23265e+16,3.34555,71108,2,10236,7,351149,12,0,925,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-06 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-06,0,3.34669,71108,1,0,7,351149,13,0,926,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-07 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-07,2.40837e+17,3.3972,71108,2,11298,8,351149,14,0,945,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-08 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-08,0,3.40695,71108,1,0,8,351149,15,0,946,378699,0
Invariant property CircularTrains-PT-096-ReachabilityCardinality-09 does not hold.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-09,3.02938e+18,3.46733,71108,2,12229,9,351149,16,0,966,378699,0
Invariant property CircularTrains-PT-096-ReachabilityCardinality-10 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-10,0,3.54491,71108,1,0,9,351149,17,0,1002,378699,0
Invariant property CircularTrains-PT-096-ReachabilityCardinality-11 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-11,0,3.54758,71108,1,0,9,351149,18,0,1003,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-12 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-12,0,3.55922,71108,1,0,9,351149,19,0,1011,378699,0
Invariant property CircularTrains-PT-096-ReachabilityCardinality-13 does not hold.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-13,1.62612e+13,3.56354,71108,2,7136,10,351149,20,0,1017,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-14,0,3.57625,71108,1,0,10,351149,21,0,1018,378699,0
Reachability property CircularTrains-PT-096-ReachabilityCardinality-15 does not hold.
No reachable states exhibit your property : CircularTrains-PT-096-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
CircularTrains-PT-096-ReachabilityCardinality-15,0,3.60709,71108,1,0,10,351149,22,0,1025,378699,0

BK_STOP 1553643184412

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 11:32:28 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 11:32:28 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 11:32:28 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 75 ms
Mar 26, 2019 11:32:28 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 192 places.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 96 transitions.
Mar 26, 2019 11:32:29 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 93 ms
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 35 ms
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 82 ms
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 192 places.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 96 transitions.
Mar 26, 2019 11:32:29 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 97 place invariants in 114 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 573 ms.
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-00(UNSAT) depth K=0 took 5 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-01(UNSAT) depth K=0 took 16 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-02(UNSAT) depth K=0 took 27 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-03(UNSAT) depth K=0 took 14 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-04(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-05(UNSAT) depth K=0 took 7 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-06(UNSAT) depth K=0 took 6 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-07(UNSAT) depth K=0 took 17 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-08(UNSAT) depth K=0 took 12 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-09(UNSAT) depth K=0 took 15 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-10(UNSAT) depth K=0 took 7 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-11(UNSAT) depth K=0 took 4 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-12(UNSAT) depth K=0 took 6 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-13(UNSAT) depth K=0 took 1 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-14(UNSAT) depth K=0 took 0 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-15(UNSAT) depth K=0 took 1 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-00(UNSAT) depth K=1 took 16 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-01(UNSAT) depth K=1 took 6 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-02(UNSAT) depth K=1 took 10 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-03(UNSAT) depth K=1 took 8 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-04(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 97 place invariants in 63 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-05(UNSAT) depth K=1 took 16 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-06(UNSAT) depth K=1 took 16 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-08(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-09(UNSAT) depth K=1 took 10 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-10(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-11(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-12(UNSAT) depth K=1 took 13 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-13(UNSAT) depth K=1 took 7 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-14(UNSAT) depth K=1 took 7 ms
Mar 26, 2019 11:32:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-15(UNSAT) depth K=1 took 6 ms
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 192 variables to be positive in 1708 ms
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 96 transitions.
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/96 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 96 transitions.
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 11:32:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-00(UNSAT) depth K=2 took 1527 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 192 variables to be positive in 1837 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-00
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-00(SAT) depth K=0 took 548 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-01
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-01
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-01(FALSE) depth K=0 took 89 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-02
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-02
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-02(FALSE) depth K=0 took 67 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-01(UNSAT) depth K=2 took 907 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-03
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-03
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-03(FALSE) depth K=0 took 68 ms
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-04
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-04
Mar 26, 2019 11:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-04(FALSE) depth K=0 took 66 ms
Mar 26, 2019 11:32:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-02(UNSAT) depth K=2 took 1376 ms
Mar 26, 2019 11:32:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 96 transitions.
Mar 26, 2019 11:32:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/96) took 94 ms. Total solver calls (SAT/UNSAT): 3(3/0)
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-05
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-05(SAT) depth K=0 took 2149 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-06
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-06
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-06(FALSE) depth K=0 took 52 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-03(UNSAT) depth K=2 took 1074 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-07
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-07(SAT) depth K=0 took 326 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-08
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-08
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-08(FALSE) depth K=0 took 31 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-09
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-09(SAT) depth K=0 took 463 ms
Mar 26, 2019 11:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-04(UNSAT) depth K=2 took 684 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant CircularTrains-PT-096-ReachabilityCardinality-10
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-10
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-10(TRUE) depth K=0 took 171 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant CircularTrains-PT-096-ReachabilityCardinality-11
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-11
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-11(TRUE) depth K=0 took 67 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-12
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-12
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-12(FALSE) depth K=0 took 64 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-13
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-13(SAT) depth K=0 took 375 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-14
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-14
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-14(FALSE) depth K=0 took 52 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate CircularTrains-PT-096-ReachabilityCardinality-15
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for CircularTrains-PT-096-ReachabilityCardinality-15
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-15(FALSE) depth K=0 took 61 ms
Mar 26, 2019 11:32:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-05(UNSAT) depth K=2 took 1013 ms
Mar 26, 2019 11:32:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-06(UNSAT) depth K=2 took 804 ms
Mar 26, 2019 11:32:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/96) took 3288 ms. Total solver calls (SAT/UNSAT): 317(294/23)
Mar 26, 2019 11:32:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-07(UNSAT) depth K=2 took 1397 ms
Mar 26, 2019 11:32:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-08(UNSAT) depth K=2 took 710 ms
Mar 26, 2019 11:32:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/96) took 6417 ms. Total solver calls (SAT/UNSAT): 654(596/58)
Mar 26, 2019 11:32:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-09(UNSAT) depth K=2 took 2284 ms
Mar 26, 2019 11:32:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-10(UNSAT) depth K=2 took 1435 ms
Mar 26, 2019 11:32:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-00
Mar 26, 2019 11:32:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-00(SAT) depth K=1 took 7244 ms
Mar 26, 2019 11:32:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/96) took 9649 ms. Total solver calls (SAT/UNSAT): 993(905/88)
Mar 26, 2019 11:32:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-11(UNSAT) depth K=2 took 928 ms
Mar 26, 2019 11:32:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-12(UNSAT) depth K=2 took 370 ms
Mar 26, 2019 11:32:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-13(UNSAT) depth K=2 took 651 ms
Mar 26, 2019 11:32:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-14(UNSAT) depth K=2 took 1463 ms
Mar 26, 2019 11:32:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/96) took 12813 ms. Total solver calls (SAT/UNSAT): 1280(1184/96)
Mar 26, 2019 11:32:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property CircularTrains-PT-096-ReachabilityCardinality-15(UNSAT) depth K=2 took 1164 ms
Mar 26, 2019 11:32:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 14144 ms. Total solver calls (SAT/UNSAT): 1388(1285/103)
Mar 26, 2019 11:32:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 96 transitions.
Mar 26, 2019 11:32:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2109 ms. Total solver calls (SAT/UNSAT): 89(0/89)
Mar 26, 2019 11:32:51 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 21504ms conformant to PINS in folder :/home/mcc/execution
Mar 26, 2019 11:32:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesCircularTrains-PT-096-ReachabilityCardinality-05
Mar 26, 2019 11:32:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property CircularTrains-PT-096-ReachabilityCardinality-05(SAT) depth K=1 took 9150 ms
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying CircularTrains-PT-096-ReachabilityCardinality-00 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying CircularTrains-PT-096-ReachabilityCardinality-07 K-induction depth 1
Exception in thread "Thread-6" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Mar 26, 2019 11:32:55 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 11/ 16 properties. Interrupting other analysis methods.
Mar 26, 2019 11:32:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 6 ms
Mar 26, 2019 11:32:59 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-096"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is CircularTrains-PT-096, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r190-smll-155225126800197"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-096.tgz
mv CircularTrains-PT-096 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;