Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r190-smll-155225126600113.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is CircadianClock-PT-000001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r190-smll-155225126600113
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 180K
-rw-r--r-- 1 mcc users 3.7K Feb 9 08:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 9 08:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 5 07:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 5 07:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.8K Feb 4 23:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K Feb 4 23:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 2 01:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 2 01:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Jan 29 15:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Jan 29 15:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 7 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 11K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-00
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-01
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-02
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-03
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-04
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-05
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-06
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-07
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-08
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-09
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-10
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-11
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-12
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-13
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-14
FORMULA_NAME CircadianClock-PT-000001-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1553616621316

Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,128,0.013888,4324,2,25,5,252,6,0,75,229,0


Converting to forward existential form...Done !
original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 0,0,0.014033,4324,1,0,5,252,7,0,75,229,0
FORMULA CircadianClock-PT-000001-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EX(E(!(((ma>=1)&&(a_cap>=1))) U ((a>=1)&&(r>=1))))
=> equivalent forward existential formula: [(FwdU(EY(Init),!(((ma>=1)&&(a_cap>=1)))) * ((a>=1)&&(r>=1)))] != FALSE
Hit Full ! (commute/partial/dont) 6/0/10
(forward)formula 1,0,0.015321,5052,1,0,10,252,16,1,139,229,5
FORMULA CircadianClock-PT-000001-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: TRUE
=> equivalent forward existential formula: [(Init * TRUE)] != FALSE
(forward)formula 2,1,0.015366,5052,1,0,10,252,16,1,139,229,5
FORMULA CircadianClock-PT-000001-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: TRUE
=> equivalent forward existential formula: [(Init * TRUE)] != FALSE
(forward)formula 3,1,0.015399,5052,1,0,10,252,16,1,139,229,5
FORMULA CircadianClock-PT-000001-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: TRUE
=> equivalent forward existential formula: [(Init * TRUE)] != FALSE
(forward)formula 4,1,0.015431,5052,1,0,10,252,16,1,139,229,5
FORMULA CircadianClock-PT-000001-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 5,0,0.015462,5052,1,0,10,252,16,1,139,229,5
FORMULA CircadianClock-PT-000001-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EX(EX(((ma>=1)&&(a_cap>=1))))
=> equivalent forward existential formula: [(EY(EY(Init)) * ((ma>=1)&&(a_cap>=1)))] != FALSE
(forward)formula 6,1,0.016073,5052,1,0,14,252,16,2,139,229,7
FORMULA CircadianClock-PT-000001-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 7,0,0.016118,5052,1,0,14,252,16,2,139,229,7
FORMULA CircadianClock-PT-000001-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: A((AG(((a>=1)&&(dr>=1))) * EG(((da_a>=1)&&(a_cap>=1)))) U EG(!((ma>=1))))
=> equivalent forward existential formula: [((Init * !(EG(!(EG(!((ma>=1))))))) * !(E(!(EG(!((ma>=1)))) U (!((!(E(TRUE U !(((a>=1)&&(dr>=1))))) * EG(((da_a>=1)&&(a_cap>=1))))) * !(EG(!((ma>=1))))))))] != FALSE
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Using saturation style SCC detection
(forward)formula 8,1,0.021259,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 9,0,0.021299,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: TRUE
=> equivalent forward existential formula: [(Init * TRUE)] != FALSE
(forward)formula 10,1,0.021332,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 11,0,0.021363,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 12,0,0.021394,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 13,0,0.021424,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 14,0,0.021456,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: FALSE
=> equivalent forward existential formula: [(Init * FALSE)] != FALSE
(forward)formula 15,0,0.021487,5316,1,0,19,462,46,6,407,326,22
FORMULA CircadianClock-PT-000001-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************


BK_STOP 1553616625230

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 34 ms
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16 transitions.
Mar 26, 2019 4:10:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.instantiate.CTLSimplifier simplifyTemporal
INFO: Initial state reduction rules for CTL removed 13 formulas.
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 37 ms
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 16 transitions.
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 14 places.
Mar 26, 2019 4:10:23 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 16 transitions.
Mar 26, 2019 4:10:24 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 1 ms
Mar 26, 2019 4:10:24 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is CircadianClock-PT-000001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r190-smll-155225126600113"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000001.tgz
mv CircadianClock-PT-000001 execution
cd execution
if [ "CTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "CTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;