Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r189-csrt-155225080500511.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is BridgeAndVehicles-PT-V10P10N10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-csrt-155225080500511
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 684K
-rw-r--r-- 1 mcc users 5.2K Feb 9 07:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 9 07:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K Feb 5 04:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 5 04:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 117 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 355 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 3.3K Feb 4 22:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K Feb 4 22:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.7K Feb 2 01:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 2 01:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 28K Jan 29 12:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Jan 29 12:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.4K Feb 4 22:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 10 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 311K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553620354652

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !(((G("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))"))U(F(G(X("(SUR_PONT_A>=1)"))))))
Formula 0 simplified : !(G"(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_1>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_2>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_3>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_4>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_5>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_6>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_7>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_8>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_9>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_0>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_1>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_2>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_3>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_4>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_5>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_6>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_7>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_8>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_9>=1)))||((((NB_ATTENTE_A_10>=1)&&(CONTROLEUR_2>=1))&&(NB_ATTENTE_B_0>=1))&&(COMPTEUR_10>=1)))" U FGX"(SUR_PONT_A>=1)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 90
// Phase 1: matrix 90 rows 48 cols
invariant :ROUTE_A + ATTENTE_A + SORTI_A + -1'CAPACITE + ATTENTE_B + SORTI_B + ROUTE_B = 10
invariant :COMPTEUR_0 + COMPTEUR_1 + COMPTEUR_2 + COMPTEUR_3 + COMPTEUR_4 + COMPTEUR_5 + COMPTEUR_6 + COMPTEUR_7 + COMPTEUR_8 + COMPTEUR_9 + COMPTEUR_10 = 1
invariant :NB_ATTENTE_B_0 + NB_ATTENTE_B_1 + NB_ATTENTE_B_2 + NB_ATTENTE_B_3 + NB_ATTENTE_B_4 + NB_ATTENTE_B_5 + NB_ATTENTE_B_6 + NB_ATTENTE_B_7 + NB_ATTENTE_B_8 + NB_ATTENTE_B_9 + NB_ATTENTE_B_10 = 1
invariant :CONTROLEUR_1 + CONTROLEUR_2 + CHOIX_1 + CHOIX_2 + VIDANGE_1 + VIDANGE_2 = 1
invariant :SUR_PONT_A + CAPACITE + -1'ATTENTE_B + -1'SORTI_B + -1'ROUTE_B = 0
invariant :NB_ATTENTE_A_0 + NB_ATTENTE_A_1 + NB_ATTENTE_A_2 + NB_ATTENTE_A_3 + NB_ATTENTE_A_4 + NB_ATTENTE_A_5 + NB_ATTENTE_A_6 + NB_ATTENTE_A_7 + NB_ATTENTE_A_8 + NB_ATTENTE_A_9 + NB_ATTENTE_A_10 = 1
invariant :ATTENTE_B + SUR_PONT_B + SORTI_B + ROUTE_B = 10
Reverse transition relation is NOT exact ! Due to transitions t0, t11, t22, t23, t24, t25, t56, t57, t59, t60, t61, t62, t63, t64, t65, t66, t67, t68, t70, t71, t72, t73, t74, t75, t76, t77, t78, t79, t81, t82, t83, t84, t85, t86, t87, t88, t89, t90, t92, t93, t94, t95, t96, t97, t98, t99, t100, t101, t103, t104, t105, t106, t107, t108, t109, t110, t111, t112, t114, t115, t116, t117, t118, t119, t120, t121, t122, t123, t125, t126, t127, t128, t129, t130, t131, t132, t133, t134, t136, t137, t138, t139, t140, t141, t142, t143, t144, t145, t147, t148, t149, t150, t151, t152, t153, t154, t155, t156, t158, t159, t160, t161, t162, t163, t164, t165, t166, t167, t170, t171, t172, t173, t174, t175, t176, t177, t178, t181, t182, t183, t184, t185, t186, t187, t188, t189, t192, t193, t194, t195, t196, t197, t198, t199, t200, t203, t204, t205, t206, t207, t208, t209, t210, t211, t214, t215, t216, t217, t218, t219, t220, t221, t222, t225, t226, t227, t228, t229, t230, t231, t232, t233, t236, t237, t238, t239, t240, t241, t242, t243, t244, t247, t248, t249, t250, t251, t252, t253, t254, t255, t258, t259, t260, t261, t262, t263, t264, t265, t266, t269, t270, t271, t272, t273, t274, t275, t276, t277, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :32/58/198/288
Computing Next relation with stutter on 20 deadlock states
143 unique states visited
142 strongly connected components in search stack
144 transitions explored
143 items max in DFS search stack
23568 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,235.766,2425564,1,0,839,4.713e+06,18,459,1677,5.21258e+06,670
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((G("((((((((((((NB_ATTENTE_B_0>=1)&&(ROUTE_B>=1))||((NB_ATTENTE_B_1>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_2>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_3>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_4>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_5>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_6>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_7>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_8>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_9>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_10>=1)&&(ROUTE_B>=1)))")))
Formula 1 simplified : !G"((((((((((((NB_ATTENTE_B_0>=1)&&(ROUTE_B>=1))||((NB_ATTENTE_B_1>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_2>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_3>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_4>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_5>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_6>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_7>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_8>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_9>=1)&&(ROUTE_B>=1)))||((NB_ATTENTE_B_10>=1)&&(ROUTE_B>=1)))"
Computing Next relation with stutter on 20 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5022 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1135 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(([]([]((LTLAP3==true))))U(X((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 583 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((<>((LTLAP5==true)))U(X((LTLAP1==true))))U([]([]((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 565 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(((LTLAP6==true))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1407 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](([]((LTLAP5==true)))U([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 346 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (([]((LTLAP5==true)))U([]((LTLAP7==true))))U((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2013 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1771 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1818 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(X((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2133 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2722 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 599 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((LTLAP12==true))U([](X(X((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 620 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (([]((LTLAP14==true)))U([]((LTLAP15==true))))U(X([](<>((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 854 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((X(<>((LTLAP17==true))))U(X(X((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3430 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]([]([](X((LTLAP19==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7011 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553620757886

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 5:12:36 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 5:12:36 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 117 ms
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 48 places.
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 288 transitions.
Mar 26, 2019 5:12:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 37 ms
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 106 ms
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 82 ms
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 288 transitions.
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 288 transitions.
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 48 places.
Mar 26, 2019 5:12:37 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 288 transitions.
Mar 26, 2019 5:12:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Mar 26, 2019 5:12:37 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 8 ms
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 30 ms
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 48 variables to be positive in 224 ms
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 288 transitions.
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/288 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 42 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 288 transitions.
Mar 26, 2019 5:12:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 13 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 5:13:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 288 transitions.
Mar 26, 2019 5:13:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/288) took 2221 ms. Total solver calls (SAT/UNSAT): 263(133/130)
Mar 26, 2019 5:13:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/288) took 6676 ms. Total solver calls (SAT/UNSAT): 786(203/583)
Mar 26, 2019 5:13:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/288) took 11071 ms. Total solver calls (SAT/UNSAT): 1046(238/808)
Mar 26, 2019 5:13:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/288) took 15490 ms. Total solver calls (SAT/UNSAT): 1563(308/1255)
Mar 26, 2019 5:13:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/288) took 18769 ms. Total solver calls (SAT/UNSAT): 2076(378/1698)
Mar 26, 2019 5:13:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/288) took 24239 ms. Total solver calls (SAT/UNSAT): 2838(483/2355)
Mar 26, 2019 5:13:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/288) took 30034 ms. Total solver calls (SAT/UNSAT): 3420(520/2900)
Mar 26, 2019 5:13:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/288) took 38741 ms. Total solver calls (SAT/UNSAT): 3693(522/3171)
Mar 26, 2019 5:13:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/288) took 42741 ms. Total solver calls (SAT/UNSAT): 3965(524/3441)
Mar 26, 2019 5:14:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/288) took 46228 ms. Total solver calls (SAT/UNSAT): 4506(528/3978)
Mar 26, 2019 5:14:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/288) took 49937 ms. Total solver calls (SAT/UNSAT): 4775(530/4245)
Mar 26, 2019 5:14:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/288) took 54497 ms. Total solver calls (SAT/UNSAT): 5576(536/5040)
Mar 26, 2019 5:14:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/288) took 58997 ms. Total solver calls (SAT/UNSAT): 6354(689/5665)
Mar 26, 2019 5:14:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/288) took 65533 ms. Total solver calls (SAT/UNSAT): 6831(731/6100)
Mar 26, 2019 5:14:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/288) took 73664 ms. Total solver calls (SAT/UNSAT): 7539(794/6745)
Mar 26, 2019 5:14:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/288) took 76697 ms. Total solver calls (SAT/UNSAT): 7773(815/6958)
Mar 26, 2019 5:14:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/288) took 79870 ms. Total solver calls (SAT/UNSAT): 8238(857/7381)
Mar 26, 2019 5:14:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/288) took 84103 ms. Total solver calls (SAT/UNSAT): 8699(899/7800)
Mar 26, 2019 5:14:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/288) took 87153 ms. Total solver calls (SAT/UNSAT): 9449(899/8550)
Mar 26, 2019 5:14:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/288) took 93216 ms. Total solver calls (SAT/UNSAT): 9697(899/8798)
Mar 26, 2019 5:14:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/288) took 99839 ms. Total solver calls (SAT/UNSAT): 9944(899/9045)
Mar 26, 2019 5:14:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/288) took 103217 ms. Total solver calls (SAT/UNSAT): 10190(899/9291)
Mar 26, 2019 5:15:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/288) took 111922 ms. Total solver calls (SAT/UNSAT): 10679(899/9780)
Mar 26, 2019 5:15:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/288) took 115415 ms. Total solver calls (SAT/UNSAT): 10922(899/10023)
Mar 26, 2019 5:15:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/288) took 119188 ms. Total solver calls (SAT/UNSAT): 11164(899/10265)
Mar 26, 2019 5:15:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/288) took 122517 ms. Total solver calls (SAT/UNSAT): 11405(899/10506)
Mar 26, 2019 5:15:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/288) took 128183 ms. Total solver calls (SAT/UNSAT): 11884(899/10985)
Mar 26, 2019 5:15:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/288) took 134090 ms. Total solver calls (SAT/UNSAT): 12122(899/11223)
Mar 26, 2019 5:15:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/288) took 141186 ms. Total solver calls (SAT/UNSAT): 12359(899/11460)
Mar 26, 2019 5:15:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/288) took 147251 ms. Total solver calls (SAT/UNSAT): 12595(899/11696)
Mar 26, 2019 5:15:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/288) took 152278 ms. Total solver calls (SAT/UNSAT): 13297(899/12398)
Mar 26, 2019 5:15:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/288) took 158747 ms. Total solver calls (SAT/UNSAT): 14219(899/13320)
Mar 26, 2019 5:15:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/288) took 162070 ms. Total solver calls (SAT/UNSAT): 14447(899/13548)
Mar 26, 2019 5:16:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/288) took 165482 ms. Total solver calls (SAT/UNSAT): 15572(899/14673)
Mar 26, 2019 5:16:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/288) took 168602 ms. Total solver calls (SAT/UNSAT): 16454(899/15555)
Mar 26, 2019 5:16:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/288) took 171715 ms. Total solver calls (SAT/UNSAT): 17534(899/16635)
Mar 26, 2019 5:16:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/288) took 176318 ms. Total solver calls (SAT/UNSAT): 18170(899/17271)
Mar 26, 2019 5:16:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/288) took 179798 ms. Total solver calls (SAT/UNSAT): 19004(899/18105)
Mar 26, 2019 5:16:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/288) took 183059 ms. Total solver calls (SAT/UNSAT): 19415(899/18516)
Mar 26, 2019 5:16:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/288) took 186062 ms. Total solver calls (SAT/UNSAT): 19822(899/18923)
Mar 26, 2019 5:16:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/288) took 193010 ms. Total solver calls (SAT/UNSAT): 20225(899/19326)
Mar 26, 2019 5:16:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/288) took 196802 ms. Total solver calls (SAT/UNSAT): 21019(899/20120)
Mar 26, 2019 5:16:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/288) took 199902 ms. Total solver calls (SAT/UNSAT): 21604(899/20705)
Mar 26, 2019 5:16:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/288) took 202964 ms. Total solver calls (SAT/UNSAT): 21797(899/20898)
Mar 26, 2019 5:16:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/288) took 206423 ms. Total solver calls (SAT/UNSAT): 22559(899/21660)
Mar 26, 2019 5:16:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/288) took 210212 ms. Total solver calls (SAT/UNSAT): 22934(899/22035)
Mar 26, 2019 5:16:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/288) took 215796 ms. Total solver calls (SAT/UNSAT): 23489(899/22590)
Mar 26, 2019 5:16:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/288) took 219842 ms. Total solver calls (SAT/UNSAT): 23854(899/22955)
Mar 26, 2019 5:16:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/288) took 223180 ms. Total solver calls (SAT/UNSAT): 24925(899/24026)
Mar 26, 2019 5:17:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/288) took 227451 ms. Total solver calls (SAT/UNSAT): 25447(899/24548)
Mar 26, 2019 5:17:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/288) took 230802 ms. Total solver calls (SAT/UNSAT): 26129(899/25230)
Mar 26, 2019 5:17:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/288) took 235040 ms. Total solver calls (SAT/UNSAT): 26297(899/25398)
Mar 26, 2019 5:17:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/288) took 238118 ms. Total solver calls (SAT/UNSAT): 26959(899/26060)
Mar 26, 2019 5:17:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/288) took 241778 ms. Total solver calls (SAT/UNSAT): 27122(899/26223)
Mar 26, 2019 5:17:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/288) took 246660 ms. Total solver calls (SAT/UNSAT): 28079(899/27180)
Mar 26, 2019 5:17:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/288) took 250780 ms. Total solver calls (SAT/UNSAT): 29299(899/28400)
Mar 26, 2019 5:17:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/288) took 255088 ms. Total solver calls (SAT/UNSAT): 29740(899/28841)
Mar 26, 2019 5:17:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/288) took 261214 ms. Total solver calls (SAT/UNSAT): 30029(899/29130)
Mar 26, 2019 5:17:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/288) took 265077 ms. Total solver calls (SAT/UNSAT): 30172(899/29273)
Mar 26, 2019 5:17:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/288) took 269197 ms. Total solver calls (SAT/UNSAT): 30314(899/29415)
Mar 26, 2019 5:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/288) took 272227 ms. Total solver calls (SAT/UNSAT): 31145(899/30246)
Mar 26, 2019 5:17:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/288) took 275435 ms. Total solver calls (SAT/UNSAT): 31414(899/30515)
Mar 26, 2019 5:17:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/288) took 278976 ms. Total solver calls (SAT/UNSAT): 32324(899/31425)
Mar 26, 2019 5:17:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/288) took 284605 ms. Total solver calls (SAT/UNSAT): 33065(899/32166)
Mar 26, 2019 5:18:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/288) took 288331 ms. Total solver calls (SAT/UNSAT): 33304(899/32405)
Mar 26, 2019 5:18:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/288) took 291361 ms. Total solver calls (SAT/UNSAT): 34220(899/33321)
Mar 26, 2019 5:18:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/288) took 295094 ms. Total solver calls (SAT/UNSAT): 35072(899/34173)
Mar 26, 2019 5:18:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/288) took 298681 ms. Total solver calls (SAT/UNSAT): 35669(899/34770)
Mar 26, 2019 5:18:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/288) took 302640 ms. Total solver calls (SAT/UNSAT): 36497(899/35598)
Mar 26, 2019 5:18:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/288) took 306316 ms. Total solver calls (SAT/UNSAT): 37475(899/36576)
Mar 26, 2019 5:18:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/288) took 310199 ms. Total solver calls (SAT/UNSAT): 38047(899/37148)
Mar 26, 2019 5:18:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/288) took 313446 ms. Total solver calls (SAT/UNSAT): 38434(899/37535)
Mar 26, 2019 5:18:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/288) took 317634 ms. Total solver calls (SAT/UNSAT): 38785(899/37886)
Mar 26, 2019 5:18:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/288) took 321136 ms. Total solver calls (SAT/UNSAT): 39422(899/38523)
Mar 26, 2019 5:18:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/288) took 324829 ms. Total solver calls (SAT/UNSAT): 39974(899/39075)
Mar 26, 2019 5:18:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(266/288) took 327868 ms. Total solver calls (SAT/UNSAT): 40115(899/39216)
Mar 26, 2019 5:18:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 329004 ms. Total solver calls (SAT/UNSAT): 40325(899/39426)
Mar 26, 2019 5:18:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 288 transitions.
Mar 26, 2019 5:18:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1020 ms. Total solver calls (SAT/UNSAT): 45(0/45)
Mar 26, 2019 5:18:45 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 367514ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-csrt-155225080500511"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;