About the Execution of ITS-Tools for NoC3x3-PT-7A
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
13173.060 | 787686.00 | 2624144.00 | 325.60 | FFFFFFFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344538000349.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is NoC3x3-PT-7A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344538000349
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 532K
-rw-r--r-- 1 mcc users 4.1K Mar 23 12:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 23 12:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Mar 23 12:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 23 12:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 10:10 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 10:10 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K Mar 23 12:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.2K Mar 23 12:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K Mar 23 12:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.1K Mar 23 12:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 23 10:10 NewModel
-rw-r--r-- 1 mcc users 3.2K Mar 23 12:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 23 12:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 Mar 23 11:58 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 Mar 23 11:58 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K Mar 23 12:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 23 12:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 23 12:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 12:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 23 10:10 instance
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 iscolored
-rw-r--r-- 1 mcc users 0 Mar 23 10:10 model-fix.log
-rw-r--r-- 1 mcc users 355K Mar 23 10:10 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-00
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-01
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-02
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-03
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-04
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-05
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-06
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-07
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-08
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-09
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-10
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-11
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-12
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-13
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-14
FORMULA_NAME NoC3x3-PT-7A-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1553569953749
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(X(X(X(X("((u55.p654>=1)&&(u59.p707>=1))")))))))
Formula 0 simplified : !GXXXX"((u55.p654>=1)&&(u59.p707>=1))"
built 129 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1355
// Phase 1: matrix 1355 rows 801 cols
invariant :u16:p183 + -1'u19:p208 + -1'u19:p214 + -1'u19:p222 = 0
invariant :u40:p477 + u40:p478 + u40:p480 + u40:p482 + u40:p484 + u43:p494 + u43:p500 + u43:p505 + u44:p511 + u44:p517 + u44:p523 + u45:p529 + u45:p535 + u45:p543 + u46:p549 + u46:p555 + u46:p561 + u67:p0 = 1
invariant :u20:p227 + u20:p228 + u20:p229 + u20:p230 + u20:p231 + u20:p232 + u20:p233 + u20:p234 + u20:p235 + u20:p236 + u20:p237 + u20:p238 + u20:p239 + u20:p240 + u20:p241 + u20:p242 + u20:p243 + u20:p244 + u20:p245 + u20:p246 + u67:p0 = 1
invariant :u35:p398 + u35:p399 + u35:p400 + u35:p401 + u35:p402 + u35:p403 + u35:p404 + u35:p405 + u35:p406 + u35:p407 + u35:p408 + u35:p409 + u35:p410 + u35:p411 + u35:p412 + u35:p413 + u67:p0 = 1
invariant :u51:p598 + u51:p599 + u51:p600 + u51:p601 + u51:p602 + u51:p603 + u51:p604 + u51:p605 + u51:p606 + u51:p607 + u51:p608 + u51:p609 + u51:p610 + u51:p611 + u51:p612 + u51:p613 + u51:p614 + u51:p615 + u51:p616 + u51:p617 + u67:p0 = 1
invariant :u30:p354 + u30:p355 + u30:p356 + u30:p357 + u30:p358 + u30:p359 + u30:p360 + u30:p361 + u30:p362 + u67:p0 = 1
invariant :u23:p263 + u23:p264 + u23:p266 + u23:p268 + u25:p272 + u25:p278 + u25:p279 + u26:p289 + u26:p295 + u26:p296 + u28:p327 + u28:p333 + u28:p338 + u67:p0 = 1
invariant :u41:p486 + u41:p487 + u41:p489 + u41:p491 + u43:p495 + u43:p501 + u43:p502 + u44:p512 + u44:p518 + u44:p521 + u46:p550 + u46:p556 + u46:p559 + u67:p0 = 1
invariant :u50:p581 + u50:p582 + u50:p583 + u50:p584 + u50:p585 + u50:p586 + u50:p587 + u50:p588 + u50:p589 + u50:p590 + u50:p591 + u50:p592 + u50:p593 + u50:p594 + u50:p595 + u50:p596 + u50:p597 + u67:p0 = 1
invariant :u54:p649 + -1'u57:p664 + -1'u57:p670 + -1'u57:p675 = 0
invariant :u41:p490 + -1'u44:p512 + -1'u44:p518 + -1'u44:p521 = 0
invariant :u15:p174 + u15:p175 + u15:p176 + u15:p177 + u15:p178 + u15:p179 + u15:p180 + u67:p0 = 1
invariant :u41:p488 + -1'u43:p495 + -1'u43:p501 + -1'u43:p502 = 0
invariant :u29:p345 + u29:p346 + u29:p347 + u29:p348 + u29:p349 + u29:p350 + u29:p351 + u29:p352 + u29:p353 + u67:p0 = 1
invariant :u61:p738 + u61:p739 + u61:p741 + u61:p743 + u64:p753 + u64:p759 + u64:p764 + u65:p769 + u65:p775 + u65:p780 + u66:p785 + u66:p791 + u66:p796 + u67:p0 = 1
invariant :u47:p566 + u47:p567 + u47:p568 + u47:p569 + u47:p571 + u51:p598 + u51:p602 + u51:p609 + u51:p615 + u52:p618 + u52:p622 + u52:p629 + u52:p635 + u67:p0 = 1
invariant :u32:p374 + -1'u34:p383 + -1'u34:p389 + -1'u34:p390 = 0
invariant :u22:p254 + u22:p255 + u22:p256 + u22:p257 + u22:p258 + u22:p259 + u22:p260 + u22:p261 + u22:p262 + u67:p0 = 1
invariant :u26:p288 + u26:p289 + u26:p290 + u26:p291 + u26:p292 + u26:p293 + u26:p294 + u26:p295 + u26:p296 + u26:p297 + u26:p298 + u26:p299 + u26:p300 + u26:p301 + u26:p302 + u26:p303 + u26:p304 + u67:p0 = 1
invariant :u62:p751 + -1'u66:p786 + -1'u66:p792 + -1'u66:p793 = 0
invariant :u61:p740 + -1'u64:p753 + -1'u64:p759 + -1'u64:p764 = 0
invariant :u28:p326 + u28:p327 + u28:p328 + u28:p329 + u28:p330 + u28:p331 + u28:p332 + u28:p333 + u28:p334 + u28:p335 + u28:p336 + u28:p337 + u28:p338 + u28:p339 + u28:p340 + u28:p341 + u28:p342 + u28:p343 + u28:p344 + u67:p0 = 1
invariant :u32:p378 + -1'u36:p415 + -1'u36:p421 + -1'u36:p426 = 0
invariant :u21:p247 + u21:p248 + u21:p249 + u21:p250 + u21:p251 + u21:p252 + u21:p253 + u67:p0 = 1
invariant :u53:p644 + -1'u59:p700 + -1'u59:p704 + -1'u59:p711 + -1'u59:p716 = 0
invariant :u31:p363 + u31:p364 + u31:p366 + u31:p368 + u31:p370 + u34:p382 + u34:p388 + u34:p393 + u35:p398 + u35:p404 + u35:p409 + u37:p433 + u37:p439 + u37:p449 + u38:p453 + u38:p458 + u38:p466 + u67:p0 = 1
invariant :u53:p646 + -1'u60:p719 + -1'u60:p723 + -1'u60:p730 + -1'u60:p735 = 0
invariant :u55:p662 + -1'u60:p722 + -1'u60:p728 + -1'u60:p731 = 0
invariant :u40:p483 + -1'u45:p529 + -1'u45:p535 + -1'u45:p543 = 0
invariant :u16:p187 + -1'u20:p228 + -1'u20:p234 + -1'u20:p242 = 0
invariant :u54:p653 + -1'u60:p721 + -1'u60:p727 + -1'u60:p734 = 0
invariant :u63:p752 + u67:p0 = 1
invariant :u49:p580 + u67:p0 = 1
invariant :u59:p700 + u59:p701 + u59:p702 + u59:p703 + u59:p704 + u59:p705 + u59:p706 + u59:p707 + u59:p708 + u59:p709 + u59:p710 + u59:p711 + u59:p712 + u59:p713 + u59:p714 + u59:p715 + u59:p716 + u59:p717 + u59:p718 + u67:p0 = 1
invariant :u42:p493 + u67:p0 = 1
invariant :u19:p207 + u19:p208 + u19:p209 + u19:p210 + u19:p211 + u19:p212 + u19:p213 + u19:p214 + u19:p215 + u19:p216 + u19:p217 + u19:p218 + u19:p219 + u19:p220 + u19:p221 + u19:p222 + u19:p223 + u19:p224 + u19:p225 + u19:p226 + u67:p0 = 1
invariant :u14:p154 + u14:p155 + u14:p156 + u14:p157 + u14:p158 + u14:p159 + u14:p160 + u14:p161 + u14:p162 + u14:p163 + u14:p164 + u14:p165 + u14:p166 + u14:p167 + u14:p168 + u14:p169 + u14:p170 + u14:p171 + u14:p172 + u14:p173 + u67:p0 = 1
invariant :u18:p189 + u18:p190 + u18:p191 + u18:p192 + u18:p193 + u18:p194 + u18:p195 + u18:p196 + u18:p197 + u18:p198 + u18:p199 + u18:p200 + u18:p201 + u18:p202 + u18:p203 + u18:p204 + u18:p205 + u18:p206 + u67:p0 = 1
invariant :u23:p265 + -1'u25:p272 + -1'u25:p278 + -1'u25:p279 = 0
invariant :u55:p656 + -1'u59:p703 + -1'u59:p709 + -1'u59:p712 = 0
invariant :u39:p470 + u39:p471 + u39:p472 + u39:p473 + u39:p474 + u39:p475 + u39:p476 + u67:p0 = 1
invariant :u9:p89 + u9:p90 + u9:p92 + u9:p94 + u11:p97 + u11:p103 + u11:p110 + u12:p115 + u12:p121 + u12:p128 + u14:p154 + u14:p160 + u14:p170 + u67:p0 = 1
invariant :u55:p654 + u55:p655 + u55:p657 + u55:p659 + u55:p661 + u57:p665 + u57:p671 + u57:p672 + u58:p683 + u58:p689 + u58:p692 + u59:p703 + u59:p709 + u59:p712 + u60:p722 + u60:p728 + u60:p731 + u67:p0 = 1
invariant :u57:p664 + u57:p665 + u57:p666 + u57:p667 + u57:p668 + u57:p669 + u57:p670 + u57:p671 + u57:p672 + u57:p673 + u57:p674 + u57:p675 + u57:p676 + u57:p677 + u57:p678 + u57:p679 + u67:p0 = 1
invariant :u36:p414 + u36:p415 + u36:p416 + u36:p417 + u36:p418 + u36:p419 + u36:p420 + u36:p421 + u36:p422 + u36:p423 + u36:p424 + u36:p425 + u36:p426 + u36:p427 + u36:p428 + u36:p429 + u36:p430 + u36:p431 + u36:p432 + u67:p0 = 1
invariant :u43:p494 + u43:p495 + u43:p496 + u43:p497 + u43:p498 + u43:p499 + u43:p500 + u43:p501 + u43:p502 + u43:p503 + u43:p504 + u43:p505 + u43:p506 + u43:p507 + u43:p508 + u43:p509 + u67:p0 = 1
invariant :u7:p73 + u7:p74 + u7:p75 + u7:p76 + u7:p77 + u7:p78 + u7:p79 + u7:p80 + u7:p81 + u67:p0 = 1
invariant :u5:p33 + u5:p34 + u5:p35 + u5:p36 + u5:p37 + u5:p38 + u5:p39 + u5:p40 + u5:p41 + u5:p42 + u5:p43 + u5:p44 + u5:p45 + u5:p46 + u5:p47 + u5:p48 + u5:p49 + u5:p50 + u5:p51 + u67:p0 = 1
invariant :u54:p647 + u54:p648 + u54:p650 + u54:p652 + u57:p664 + u57:p670 + u57:p675 + u59:p702 + u59:p708 + u59:p715 + u60:p721 + u60:p727 + u60:p734 + u67:p0 = 1
invariant :u6:p52 + u6:p53 + u6:p54 + u6:p55 + u6:p56 + u6:p57 + u6:p58 + u6:p59 + u6:p60 + u6:p61 + u6:p62 + u6:p63 + u6:p64 + u6:p65 + u6:p66 + u6:p67 + u6:p68 + u6:p69 + u6:p70 + u6:p71 + u6:p72 + u67:p0 = 1
invariant :u40:p479 + -1'u43:p494 + -1'u43:p500 + -1'u43:p505 = 0
invariant :u41:p492 + -1'u46:p550 + -1'u46:p556 + -1'u46:p559 = 0
invariant :u31:p371 + -1'u38:p453 + -1'u38:p458 + -1'u38:p466 = 0
invariant :u47:p572 + -1'u52:p618 + -1'u52:p622 + -1'u52:p629 + -1'u52:p635 = 0
invariant :u9:p91 + -1'u11:p97 + -1'u11:p103 + -1'u11:p110 = 0
invariant :u11:p97 + u11:p98 + u11:p99 + u11:p100 + u11:p101 + u11:p102 + u11:p103 + u11:p104 + u11:p105 + u11:p106 + u11:p107 + u11:p108 + u11:p109 + u11:p110 + u11:p111 + u11:p112 + u11:p113 + u11:p114 + u67:p0 = 1
invariant :u31:p367 + -1'u35:p398 + -1'u35:p404 + -1'u35:p409 = 0
invariant :u48:p575 + -1'u50:p582 + -1'u50:p588 + -1'u50:p589 = 0
invariant :u58:p680 + u58:p681 + u58:p682 + u58:p683 + u58:p684 + u58:p685 + u58:p686 + u58:p687 + u58:p688 + u58:p689 + u58:p690 + u58:p691 + u58:p692 + u58:p693 + u58:p694 + u58:p695 + u58:p696 + u58:p697 + u58:p698 + u58:p699 + u67:p0 = 1
invariant :u53:p642 + -1'u58:p680 + -1'u58:p684 + -1'u58:p691 + -1'u58:p697 = 0
invariant :u23:p267 + -1'u26:p289 + -1'u26:p295 + -1'u26:p296 = 0
invariant :u54:p651 + -1'u59:p702 + -1'u59:p708 + -1'u59:p715 = 0
invariant :u65:p769 + u65:p770 + u65:p771 + u65:p772 + u65:p773 + u65:p774 + u65:p775 + u65:p776 + u65:p777 + u65:p778 + u65:p779 + u65:p780 + u65:p781 + u65:p782 + u65:p783 + u65:p784 + u67:p0 = 1
invariant :u23:p269 + -1'u28:p327 + -1'u28:p333 + -1'u28:p338 = 0
invariant :u46:p548 + u46:p549 + u46:p550 + u46:p551 + u46:p552 + u46:p553 + u46:p554 + u46:p555 + u46:p556 + u46:p557 + u46:p558 + u46:p559 + u46:p560 + u46:p561 + u46:p562 + u46:p563 + u46:p564 + u46:p565 + u67:p0 = 1
invariant :u55:p660 + -1'u57:p665 + -1'u57:p671 + -1'u57:p672 = 0
invariant :u24:p270 + u67:p0 = 1
invariant :u9:p93 + -1'u12:p115 + -1'u12:p121 + -1'u12:p128 = 0
invariant :u10:p96 + u67:p0 = 1
invariant :u66:p785 + u66:p786 + u66:p787 + u66:p788 + u66:p789 + u66:p790 + u66:p791 + u66:p792 + u66:p793 + u66:p794 + u66:p795 + u66:p796 + u66:p797 + u66:p798 + u66:p799 + u66:p800 + u67:p0 = 1
invariant :u44:p510 + u44:p511 + u44:p512 + u44:p513 + u44:p514 + u44:p515 + u44:p516 + u44:p517 + u44:p518 + u44:p519 + u44:p520 + u44:p521 + u44:p522 + u44:p523 + u44:p524 + u44:p525 + u44:p526 + u44:p527 + u67:p0 = 1
invariant :u16:p181 + u16:p182 + u16:p184 + u16:p186 + u18:p189 + u18:p195 + u18:p202 + u19:p208 + u19:p214 + u19:p222 + u20:p228 + u20:p234 + u20:p242 + u67:p0 = 1
invariant :u53:p638 + u53:p639 + u53:p640 + u53:p641 + u53:p643 + u53:p645 + u58:p680 + u58:p684 + u58:p691 + u58:p697 + u59:p700 + u59:p704 + u59:p711 + u59:p716 + u60:p719 + u60:p723 + u60:p730 + u60:p735 + u67:p0 = 1
invariant :u17:p188 + u67:p0 = 1
invariant :u55:p658 + -1'u58:p683 + -1'u58:p689 + -1'u58:p692 = 0
invariant :u13:p133 + u13:p134 + u13:p135 + u13:p136 + u13:p137 + u13:p138 + u13:p139 + u13:p140 + u13:p141 + u13:p142 + u13:p143 + u13:p144 + u13:p145 + u13:p146 + u13:p147 + u13:p148 + u13:p149 + u13:p150 + u13:p151 + u13:p152 + u13:p153 + u67:p0 = 1
invariant :u4:p14 + u4:p15 + u4:p16 + u4:p17 + u4:p18 + u4:p19 + u4:p20 + u4:p21 + u4:p22 + u4:p23 + u4:p24 + u4:p25 + u4:p26 + u4:p27 + u4:p28 + u4:p29 + u4:p30 + u4:p31 + u4:p32 + u67:p0 = 1
invariant :u61:p742 + -1'u65:p769 + -1'u65:p775 + -1'u65:p780 = 0
invariant :u32:p372 + u32:p373 + u32:p375 + u32:p377 + u32:p379 + u34:p383 + u34:p389 + u34:p390 + u35:p399 + u35:p405 + u35:p406 + u36:p415 + u36:p421 + u36:p426 + u38:p454 + u38:p459 + u38:p464 + u67:p0 = 1
invariant :u33:p381 + u67:p0 = 1
invariant :u62:p745 + u62:p746 + u62:p748 + u62:p750 + u64:p754 + u64:p760 + u64:p761 + u65:p770 + u65:p776 + u65:p777 + u66:p786 + u66:p792 + u66:p793 + u67:p0 = 1
invariant :u2:p6 + u2:p7 + u2:p8 + u2:p9 + u2:p10 + u2:p11 + u2:p12 + u67:p0 = 1
invariant :u38:p453 + u38:p454 + u38:p455 + u38:p456 + u38:p457 + u38:p458 + u38:p459 + u38:p460 + u38:p461 + u38:p462 + u38:p463 + u38:p464 + u38:p465 + u38:p466 + u38:p467 + u38:p468 + u38:p469 + u67:p0 = 1
invariant :u62:p747 + -1'u64:p754 + -1'u64:p760 + -1'u64:p761 = 0
invariant :u52:p618 + u52:p619 + u52:p620 + u52:p621 + u52:p622 + u52:p623 + u52:p624 + u52:p625 + u52:p626 + u52:p627 + u52:p628 + u52:p629 + u52:p630 + u52:p631 + u52:p632 + u52:p633 + u52:p634 + u52:p635 + u52:p636 + u52:p637 + u67:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + u1:p5 + u67:p0 = 1
invariant :u12:p115 + u12:p116 + u12:p117 + u12:p118 + u12:p119 + u12:p120 + u12:p121 + u12:p122 + u12:p123 + u12:p124 + u12:p125 + u12:p126 + u12:p127 + u12:p128 + u12:p129 + u12:p130 + u12:p131 + u12:p132 + u67:p0 = 1
invariant :u45:p528 + u45:p529 + u45:p530 + u45:p531 + u45:p532 + u45:p533 + u45:p534 + u45:p535 + u45:p536 + u45:p537 + u45:p538 + u45:p539 + u45:p540 + u45:p541 + u45:p542 + u45:p543 + u45:p544 + u45:p545 + u45:p546 + u45:p547 + u67:p0 = 1
invariant :u9:p95 + -1'u14:p154 + -1'u14:p160 + -1'u14:p170 = 0
invariant :u48:p579 + -1'u52:p621 + -1'u52:p627 + -1'u52:p630 = 0
invariant :u47:p570 + -1'u51:p598 + -1'u51:p602 + -1'u51:p609 + -1'u51:p615 = 0
invariant :u48:p577 + -1'u51:p601 + -1'u51:p607 + -1'u51:p610 = 0
invariant :u37:p433 + u37:p434 + u37:p435 + u37:p436 + u37:p437 + u37:p438 + u37:p439 + u37:p440 + u37:p441 + u37:p442 + u37:p443 + u37:p444 + u37:p445 + u37:p446 + u37:p447 + u37:p448 + u37:p449 + u37:p450 + u37:p451 + u37:p452 + u67:p0 = 1
invariant :u40:p485 + -1'u46:p549 + -1'u46:p555 + -1'u46:p561 = 0
invariant :u8:p82 + u8:p83 + u8:p84 + u8:p85 + u8:p86 + u8:p87 + u8:p88 + u67:p0 = 1
invariant :u32:p380 + -1'u38:p454 + -1'u38:p459 + -1'u38:p464 = 0
invariant :u31:p369 + -1'u37:p433 + -1'u37:p439 + -1'u37:p449 = 0
invariant :u61:p744 + -1'u66:p785 + -1'u66:p791 + -1'u66:p796 = 0
invariant :u16:p185 + -1'u18:p189 + -1'u18:p195 + -1'u18:p202 = 0
invariant :u32:p376 + -1'u35:p399 + -1'u35:p405 + -1'u35:p406 = 0
invariant :u64:p753 + u64:p754 + u64:p755 + u64:p756 + u64:p757 + u64:p758 + u64:p759 + u64:p760 + u64:p761 + u64:p762 + u64:p763 + u64:p764 + u64:p765 + u64:p766 + u64:p767 + u64:p768 + u67:p0 = 1
invariant :u25:p271 + u25:p272 + u25:p273 + u25:p274 + u25:p275 + u25:p276 + u25:p277 + u25:p278 + u25:p279 + u25:p280 + u25:p281 + u25:p282 + u25:p283 + u25:p284 + u25:p285 + u25:p286 + u25:p287 + u67:p0 = 1
invariant :u48:p573 + u48:p574 + u48:p576 + u48:p578 + u50:p582 + u50:p588 + u50:p589 + u51:p601 + u51:p607 + u51:p610 + u52:p621 + u52:p627 + u52:p630 + u67:p0 = 1
invariant :u34:p382 + u34:p383 + u34:p384 + u34:p385 + u34:p386 + u34:p387 + u34:p388 + u34:p389 + u34:p390 + u34:p391 + u34:p392 + u34:p393 + u34:p394 + u34:p395 + u34:p396 + u34:p397 + u67:p0 = 1
invariant :u40:p481 + -1'u44:p511 + -1'u44:p517 + -1'u44:p523 = 0
invariant :u56:p663 + u67:p0 = 1
invariant :u60:p719 + u60:p720 + u60:p721 + u60:p722 + u60:p723 + u60:p724 + u60:p725 + u60:p726 + u60:p727 + u60:p728 + u60:p729 + u60:p730 + u60:p731 + u60:p732 + u60:p733 + u60:p734 + u60:p735 + u60:p736 + u60:p737 + u67:p0 = 1
invariant :u27:p305 + u27:p306 + u27:p307 + u27:p308 + u27:p309 + u27:p310 + u27:p311 + u27:p312 + u27:p313 + u27:p314 + u27:p315 + u27:p316 + u27:p317 + u27:p318 + u27:p319 + u27:p320 + u27:p321 + u27:p322 + u27:p323 + u27:p324 + u27:p325 + u67:p0 = 1
invariant :u31:p365 + -1'u34:p382 + -1'u34:p388 + -1'u34:p393 = 0
invariant :u62:p749 + -1'u65:p770 + -1'u65:p776 + -1'u65:p777 = 0
invariant :u3:p13 + u67:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 20435 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 202 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(X(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9608 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7856 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP2==true))U((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6050 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 57176 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([]((<>((LTLAP4==true)))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49165 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42553 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(([]((LTLAP6==true)))U([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7537 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(X(X((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18272 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 54378 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([](((LTLAP9==true))U([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36646 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50432 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP11==true))U(<>((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 56112 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 53166 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59017 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9470 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 52660 ms.
FORMULA NoC3x3-PT-7A-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1553570741435
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 3:12:35 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 26, 2019 3:12:35 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 203 ms
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 801 places.
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1544 transitions.
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 3:12:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 325 ms
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 153 ms
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 3:12:36 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :t1483,t1482,t1483,t1482,t1440,t1439,t1440,t1439,t620,t619,t620,t619,t595,t594,t595,t594,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :t1160,t1163,t1160,t1163,t1160,t1006,t1127,t1005,t1003,t1002,t1123,t1006,t1005,t1003,t1002,t1007,t1006,t1005,t1004,t1003,t1002,t970,t971,t970,t971,t970,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t1506,t1506,t1456,t1456,t1456,t1456,t1442,t1442,t1442,t1442,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1303,t1303,t1303,t1303,t1291,t1291,t1291,t1291,t752,t752,t752,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1433,t1433,t1433,t834,t834,t834,t834,t820,t820,t820,t820,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 17 events :t1140,t1140,t1140,t1132,t1132,t1132,t1132,t1124,t1124,t1124,t1124,t1119,t1119,t1119,t844,t844,t844,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t1196,t1199,t1196,t1199,t1196,t953,t952,t951,t950,t949,t923,t924,t923,t924,t923,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :t1372,t1371,t1372,t1371,t1349,t1348,t1349,t1348,t721,t720,t721,t720,t689,t688,t689,t688,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t946,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t789,t789,t789,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t1402,t1402,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t881,t881,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :t1325,t1324,t1325,t1324,t1287,t1286,t1287,t1286,t827,t826,t827,t826,t759,t758,t759,t758,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 24 events :t1479,t1478,t1479,t1478,t1479,t1478,t1446,t1445,t1444,t1443,t1442,t1441,t618,t617,t618,t617,t618,t617,t591,t590,t591,t590,t591,t590,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 9 events :t1088,t1087,t1086,t1085,t1027,t1028,t1027,t1028,t1027,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1318,t1318,t1318,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t678,t678,t678,t669,t669,t669,t639,t639,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t583,t583,t583,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1408,t1407,t1408,t1407,t675,t674,t675,t674,t645,t644,t645,t644,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1474,t1474,t1474,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1113,t1113,t1094,t1094,t1094,t1090,t1090,t1086,t1086,t1081,t1081,t1081,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t1370,t1373,t1370,t1373,t1370,t722,t723,t722,t723,t722,t690,t691,t690,t691,t690,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 17 events :t1277,t1277,t1277,t902,t902,t902,t902,t897,t897,t897,t888,t888,t888,t882,t882,t882,t882,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t1518,t1518,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t1159,t1161,t1159,t1161,t1159,t1122,t1121,t1120,t1119,t1118,t966,t967,t966,t967,t966,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t570,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1351,t1350,t1351,t1350,t725,t724,t725,t724,t693,t692,t693,t692,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t1010,t1010,t1010,t1010,t1002,t1002,t1002,t1002,t963,t963,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t1252,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 21 events :t1322,t1326,t1322,t1326,t1322,t825,t824,t823,t822,t821,t820,t790,t791,t790,t791,t790,t756,t757,t756,t757,t756,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t810,t810,t810,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t668,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 26 events :t1254,t1256,t1254,t1256,t1254,t886,t885,t883,t1230,t882,t1228,t886,t885,t883,t882,t887,t886,t885,t884,t883,t882,t848,t849,t848,t849,t848,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t719,t719,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t616,t616,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1227,t1226,t1227,t1226,t894,t893,t894,t893,t853,t852,t853,t852,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t1193,t1193,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1522,t1521,t1522,t1521,t572,t571,t572,t571,t550,t549,t550,t549,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 21 events :t1323,t1328,t1323,t1328,t1323,t1295,t1294,t1293,t1292,t1291,t1290,t792,t793,t792,t793,t792,t760,t761,t760,t761,t760,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t1239,t1239,t1239,t1239,t1229,t1229,t1229,t1229,t685,t685,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t1052,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t1255,t1258,t1255,t1258,t1255,t892,t891,t890,t889,t888,t850,t851,t850,t851,t850,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1524,t1523,t1524,t1523,t574,t573,t574,t573,t552,t551,t552,t551,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t587,t587,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 18 events :t1056,t1054,t1082,t1053,t1080,t1056,t1054,t1053,t1057,t1056,t1055,t1054,t1053,t1025,t1026,t1025,t1026,t1025,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1481,t1480,t1481,t1480,t1438,t1437,t1438,t1437,t593,t592,t593,t592,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t999,t999,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 17 events :t1406,t1405,t1406,t1405,t1406,t1405,t673,t672,t671,t670,t669,t643,t642,t643,t642,t643,t642,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1198,t1197,t1198,t1197,t948,t947,t948,t947,t922,t921,t922,t921,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :t1289,t1288,t1289,t1288,t829,t828,t829,t828,t795,t794,t795,t794,t763,t762,t763,t762,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t1367,t1367,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t631,t631,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t1345,t1345,t956,t956,t956,t949,t949,t949,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t739,t739,t739,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t1156,t1156,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1117,t1116,t1117,t1116,t1001,t1000,t1001,t1000,t969,t968,t969,t968,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t1223,t1223,t1058,t1058,t1058,t1053,t1053,t1053,
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 549 redundant transitions.
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 330 ms
Mar 26, 2019 3:12:37 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 14 ms
Mar 26, 2019 3:12:37 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 107 identical transitions.
Mar 26, 2019 3:12:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1437 transitions.
Mar 26, 2019 3:12:38 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 111 place invariants in 530 ms
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 801 variables to be positive in 2035 ms
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1437 transitions.
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1437 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 103 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1437 transitions.
Mar 26, 2019 3:12:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 63 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 3:12:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1437 transitions.
Mar 26, 2019 3:12:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/1437) took 2188 ms. Total solver calls (SAT/UNSAT): 3137(144/2993)
Mar 26, 2019 3:12:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/1437) took 5207 ms. Total solver calls (SAT/UNSAT): 3924(230/3694)
Mar 26, 2019 3:12:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/1437) took 8238 ms. Total solver calls (SAT/UNSAT): 5897(372/5525)
Mar 26, 2019 3:12:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/1437) took 11267 ms. Total solver calls (SAT/UNSAT): 6992(490/6502)
Mar 26, 2019 3:12:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/1437) took 14311 ms. Total solver calls (SAT/UNSAT): 9510(779/8731)
Mar 26, 2019 3:12:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(226/1437) took 17507 ms. Total solver calls (SAT/UNSAT): 11884(1006/10878)
Mar 26, 2019 3:13:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/1437) took 20809 ms. Total solver calls (SAT/UNSAT): 14346(1200/13146)
Mar 26, 2019 3:13:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(282/1437) took 24041 ms. Total solver calls (SAT/UNSAT): 14850(1284/13566)
Mar 26, 2019 3:13:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(297/1437) took 27453 ms. Total solver calls (SAT/UNSAT): 15615(1349/14266)
Mar 26, 2019 3:13:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(338/1437) took 30456 ms. Total solver calls (SAT/UNSAT): 17772(1536/16236)
Mar 26, 2019 3:13:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(355/1437) took 33878 ms. Total solver calls (SAT/UNSAT): 18671(1615/17056)
Mar 26, 2019 3:13:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(357/1437) took 36939 ms. Total solver calls (SAT/UNSAT): 18812(1622/17190)
Mar 26, 2019 3:13:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(388/1437) took 40390 ms. Total solver calls (SAT/UNSAT): 20523(1770/18753)
Mar 26, 2019 3:13:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(393/1437) took 43870 ms. Total solver calls (SAT/UNSAT): 20753(1782/18971)
Mar 26, 2019 3:13:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(402/1437) took 47344 ms. Total solver calls (SAT/UNSAT): 21119(1795/19324)
Mar 26, 2019 3:13:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(407/1437) took 51004 ms. Total solver calls (SAT/UNSAT): 21394(1832/19562)
Mar 26, 2019 3:13:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(411/1437) took 54997 ms. Total solver calls (SAT/UNSAT): 21614(1858/19756)
Mar 26, 2019 3:13:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(416/1437) took 58389 ms. Total solver calls (SAT/UNSAT): 21858(1881/19977)
Mar 26, 2019 3:13:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(422/1437) took 61823 ms. Total solver calls (SAT/UNSAT): 22120(1898/20222)
Mar 26, 2019 3:13:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(430/1437) took 64998 ms. Total solver calls (SAT/UNSAT): 22401(1918/20483)
Mar 26, 2019 3:13:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(438/1437) took 68134 ms. Total solver calls (SAT/UNSAT): 22767(1933/20834)
Mar 26, 2019 3:13:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(443/1437) took 72146 ms. Total solver calls (SAT/UNSAT): 22990(1942/21048)
Mar 26, 2019 3:13:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(450/1437) took 75521 ms. Total solver calls (SAT/UNSAT): 23264(1951/21313)
Mar 26, 2019 3:13:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(459/1437) took 78546 ms. Total solver calls (SAT/UNSAT): 23615(1963/21652)
Mar 26, 2019 3:14:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(467/1437) took 82789 ms. Total solver calls (SAT/UNSAT): 23881(1973/21908)
Mar 26, 2019 3:14:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(477/1437) took 86054 ms. Total solver calls (SAT/UNSAT): 24316(2007/22309)
Mar 26, 2019 3:14:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(482/1437) took 89493 ms. Total solver calls (SAT/UNSAT): 24483(2013/22470)
Mar 26, 2019 3:14:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(487/1437) took 92526 ms. Total solver calls (SAT/UNSAT): 24653(2027/22626)
Mar 26, 2019 3:14:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(495/1437) took 96573 ms. Total solver calls (SAT/UNSAT): 25006(2043/22963)
Mar 26, 2019 3:14:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(500/1437) took 100070 ms. Total solver calls (SAT/UNSAT): 25215(2053/23162)
Mar 26, 2019 3:14:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(507/1437) took 103493 ms. Total solver calls (SAT/UNSAT): 25467(2060/23407)
Mar 26, 2019 3:14:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(513/1437) took 106707 ms. Total solver calls (SAT/UNSAT): 25692(2080/23612)
Mar 26, 2019 3:14:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(522/1437) took 109802 ms. Total solver calls (SAT/UNSAT): 26040(2110/23930)
Mar 26, 2019 3:14:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(555/1437) took 112806 ms. Total solver calls (SAT/UNSAT): 27158(2173/24985)
Mar 26, 2019 3:14:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(622/1437) took 115830 ms. Total solver calls (SAT/UNSAT): 29358(2286/27072)
Mar 26, 2019 3:14:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(671/1437) took 119433 ms. Total solver calls (SAT/UNSAT): 30731(2362/28369)
Mar 26, 2019 3:14:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(707/1437) took 122531 ms. Total solver calls (SAT/UNSAT): 31565(2404/29161)
Mar 26, 2019 3:14:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(756/1437) took 125557 ms. Total solver calls (SAT/UNSAT): 32289(2429/29860)
Mar 26, 2019 3:14:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(816/1437) took 128736 ms. Total solver calls (SAT/UNSAT): 33142(2469/30673)
Mar 26, 2019 3:14:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(825/1437) took 132096 ms. Total solver calls (SAT/UNSAT): 33277(2477/30800)
Mar 26, 2019 3:14:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(841/1437) took 136025 ms. Total solver calls (SAT/UNSAT): 33482(2483/30999)
Mar 26, 2019 3:15:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(846/1437) took 139951 ms. Total solver calls (SAT/UNSAT): 33607(2491/31116)
Mar 26, 2019 3:15:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(869/1437) took 143009 ms. Total solver calls (SAT/UNSAT): 33860(2501/31359)
Mar 26, 2019 3:15:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(876/1437) took 146141 ms. Total solver calls (SAT/UNSAT): 34007(2508/31499)
Mar 26, 2019 3:15:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(895/1437) took 149541 ms. Total solver calls (SAT/UNSAT): 34185(2517/31668)
Mar 26, 2019 3:15:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(900/1437) took 152622 ms. Total solver calls (SAT/UNSAT): 34295(2522/31773)
Mar 26, 2019 3:15:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(908/1437) took 155747 ms. Total solver calls (SAT/UNSAT): 34419(2530/31889)
Mar 26, 2019 3:15:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(921/1437) took 159205 ms. Total solver calls (SAT/UNSAT): 34511(2533/31978)
Mar 26, 2019 3:15:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(926/1437) took 162634 ms. Total solver calls (SAT/UNSAT): 34626(2539/32087)
Mar 26, 2019 3:15:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(933/1437) took 165761 ms. Total solver calls (SAT/UNSAT): 34745(2544/32201)
Mar 26, 2019 3:15:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(948/1437) took 168842 ms. Total solver calls (SAT/UNSAT): 34864(2550/32314)
Mar 26, 2019 3:15:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(953/1437) took 172078 ms. Total solver calls (SAT/UNSAT): 34989(2556/32433)
Mar 26, 2019 3:15:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(979/1437) took 175586 ms. Total solver calls (SAT/UNSAT): 35308(2570/32738)
Mar 26, 2019 3:15:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1058/1437) took 178610 ms. Total solver calls (SAT/UNSAT): 36342(2617/33725)
Mar 26, 2019 3:15:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1197/1437) took 181619 ms. Total solver calls (SAT/UNSAT): 37546(2692/34854)
Mar 26, 2019 3:15:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1324/1437) took 184623 ms. Total solver calls (SAT/UNSAT): 38982(2769/36213)
Mar 26, 2019 3:15:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 187333 ms. Total solver calls (SAT/UNSAT): 39922(2828/37094)
Mar 26, 2019 3:15:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1437 transitions.
Mar 26, 2019 3:15:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 234 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 3:15:49 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 191958ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-7A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is NoC3x3-PT-7A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344538000349"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-7A.tgz
mv NoC3x3-PT-7A execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;