Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344538000295.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is NoC3x3-PT-4A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344538000295
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 304K
-rw-r--r-- 1 mcc users 3.3K Mar 23 12:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 12:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 23 12:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 23 12:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 10:10 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 10:10 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.1K Mar 23 12:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.0K Mar 23 12:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K Mar 23 12:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.1K Mar 23 12:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 23 10:10 NewModel
-rw-r--r-- 1 mcc users 2.9K Mar 23 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K Mar 23 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 Mar 23 11:58 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 Mar 23 11:58 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K Mar 23 12:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 23 12:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 23 12:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 12:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 23 10:10 instance
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 iscolored
-rw-r--r-- 1 mcc users 0 Mar 23 10:10 model-fix.log
-rw-r--r-- 1 mcc users 144K Mar 23 10:10 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-00
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-01
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-02
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-03
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-04
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-05
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-06
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-07
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-08
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-09
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-10
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-11
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-12
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-13
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-14
FORMULA_NAME NoC3x3-PT-4A-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553565951561

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(G("((u19.p77>=1)&&(u17.p73>=1))"))))
Formula 0 simplified : !XG"((u19.p77>=1)&&(u17.p73>=1))"
built 129 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 381
// Phase 1: matrix 381 rows 293 cols
invariant :u17:p73 + u67:p0 = 1
invariant :u12:p50 + u12:p51 + u12:p52 + u67:p0 = 1
invariant :u50:p222 + u50:p223 + u50:p224 + u67:p0 = 1
invariant :u6:p20 + u6:p21 + u6:p22 + u67:p0 = 1
invariant :u11:p47 + u11:p48 + u11:p49 + u67:p0 = 1
invariant :u29:p119 + u29:p120 + u29:p121 + u29:p122 + u29:p123 + u29:p124 + u29:p125 + u29:p126 + u29:p127 + u67:p0 = 1
invariant :u40:p178 + u40:p179 + u40:p180 + u40:p181 + u40:p182 + u40:p183 + u40:p184 + u40:p185 + u40:p186 + u67:p0 = 1
invariant :u9:p39 + u9:p40 + u9:p41 + u9:p42 + u9:p43 + u9:p44 + u9:p45 + u67:p0 = 1
invariant :u43:p195 + u43:p196 + u43:p197 + u67:p0 = 1
invariant :u60:p266 + u60:p267 + u60:p268 + u67:p0 = 1
invariant :u16:p66 + u16:p67 + u16:p68 + u16:p69 + u16:p70 + u16:p71 + u16:p72 + u67:p0 = 1
invariant :u5:p17 + u5:p18 + u5:p19 + u67:p0 = 1
invariant :u2:p6 + u2:p7 + u2:p8 + u2:p9 + u2:p10 + u2:p11 + u2:p12 + u67:p0 = 1
invariant :u4:p14 + u4:p15 + u4:p16 + u67:p0 = 1
invariant :u48:p214 + u48:p215 + u48:p216 + u48:p217 + u48:p218 + u48:p219 + u48:p220 + u67:p0 = 1
invariant :u38:p168 + u38:p169 + u38:p170 + u67:p0 = 1
invariant :u35:p159 + u35:p160 + u35:p161 + u67:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + u1:p5 + u67:p0 = 1
invariant :u10:p46 + u67:p0 = 1
invariant :u27:p113 + u27:p114 + u27:p115 + u67:p0 = 1
invariant :u54:p240 + u54:p241 + u54:p242 + u54:p243 + u54:p244 + u54:p245 + u54:p246 + u67:p0 = 1
invariant :u53:p231 + u53:p232 + u53:p233 + u53:p234 + u53:p235 + u53:p236 + u53:p237 + u53:p238 + u53:p239 + u67:p0 = 1
invariant :u56:p256 + u67:p0 = 1
invariant :u42:p194 + u67:p0 = 1
invariant :u23:p99 + u23:p100 + u23:p101 + u23:p102 + u23:p103 + u23:p104 + u23:p105 + u67:p0 = 1
invariant :u32:p146 + u32:p147 + u32:p148 + u32:p149 + u32:p150 + u32:p151 + u32:p152 + u32:p153 + u32:p154 + u67:p0 = 1
invariant :u19:p77 + u19:p78 + u19:p79 + u67:p0 = 1
invariant :u20:p80 + u20:p81 + u20:p82 + u67:p0 = 1
invariant :u14:p56 + u14:p57 + u14:p58 + u67:p0 = 1
invariant :u34:p156 + u34:p157 + u34:p158 + u67:p0 = 1
invariant :u28:p116 + u28:p117 + u28:p118 + u67:p0 = 1
invariant :u57:p257 + u57:p258 + u57:p259 + u67:p0 = 1
invariant :u55:p247 + u55:p248 + u55:p249 + u55:p250 + u55:p251 + u55:p252 + u55:p253 + u55:p254 + u55:p255 + u67:p0 = 1
invariant :u63:p283 + u67:p0 = 1
invariant :u30:p128 + u30:p129 + u30:p130 + u30:p131 + u30:p132 + u30:p133 + u30:p134 + u30:p135 + u30:p136 + u67:p0 = 1
invariant :u22:p90 + u22:p91 + u22:p92 + u22:p93 + u22:p94 + u22:p95 + u22:p96 + u22:p97 + u22:p98 + u67:p0 = 1
invariant :u41:p187 + u41:p188 + u41:p189 + u41:p190 + u41:p191 + u41:p192 + u41:p193 + u67:p0 = 1
invariant :u31:p137 + u31:p138 + u31:p139 + u31:p140 + u31:p141 + u31:p142 + u31:p143 + u31:p144 + u31:p145 + u67:p0 = 1
invariant :u37:p165 + u37:p166 + u37:p167 + u67:p0 = 1
invariant :u36:p162 + u36:p163 + u36:p164 + u67:p0 = 1
invariant :u65:p287 + u65:p288 + u65:p289 + u67:p0 = 1
invariant :u13:p53 + u13:p54 + u13:p55 + u67:p0 = 1
invariant :u49:p221 + u67:p0 = 1
invariant :u3:p13 + u67:p0 = 1
invariant :u7:p23 + u7:p24 + u7:p25 + u7:p26 + u7:p27 + u7:p28 + u7:p29 + u7:p30 + u7:p31 + u67:p0 = 1
invariant :u58:p260 + u58:p261 + u58:p262 + u67:p0 = 1
invariant :u45:p201 + u45:p202 + u45:p203 + u67:p0 = 1
invariant :u51:p225 + u51:p226 + u51:p227 + u67:p0 = 1
invariant :u15:p59 + u15:p60 + u15:p61 + u15:p62 + u15:p63 + u15:p64 + u15:p65 + u67:p0 = 1
invariant :u25:p107 + u25:p108 + u25:p109 + u67:p0 = 1
invariant :u46:p204 + u46:p205 + u46:p206 + u67:p0 = 1
invariant :u61:p269 + u61:p270 + u61:p271 + u61:p272 + u61:p273 + u61:p274 + u61:p275 + u67:p0 = 1
invariant :u52:p228 + u52:p229 + u52:p230 + u67:p0 = 1
invariant :u18:p74 + u18:p75 + u18:p76 + u67:p0 = 1
invariant :u24:p106 + u67:p0 = 1
invariant :u21:p83 + u21:p84 + u21:p85 + u21:p86 + u21:p87 + u21:p88 + u21:p89 + u67:p0 = 1
invariant :u44:p198 + u44:p199 + u44:p200 + u67:p0 = 1
invariant :u33:p155 + u67:p0 = 1
invariant :u66:p290 + u66:p291 + u66:p292 + u67:p0 = 1
invariant :u39:p171 + u39:p172 + u39:p173 + u39:p174 + u39:p175 + u39:p176 + u39:p177 + u67:p0 = 1
invariant :u62:p276 + u62:p277 + u62:p278 + u62:p279 + u62:p280 + u62:p281 + u62:p282 + u67:p0 = 1
invariant :u26:p110 + u26:p111 + u26:p112 + u67:p0 = 1
invariant :u59:p263 + u59:p264 + u59:p265 + u67:p0 = 1
invariant :u64:p284 + u64:p285 + u64:p286 + u67:p0 = 1
invariant :u8:p32 + u8:p33 + u8:p34 + u8:p35 + u8:p36 + u8:p37 + u8:p38 + u67:p0 = 1
invariant :u47:p207 + u47:p208 + u47:p209 + u47:p210 + u47:p211 + u47:p212 + u47:p213 + u67:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6815 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 83 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]((LTLAP0==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2965 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4084 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(X(X([]((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1348 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3894 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4347 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((((LTLAP2==true))U((LTLAP3==true)))U((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 661 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP5==true))U(((LTLAP6==true))U((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2935 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3310 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(((LTLAP8==true))U(X((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1528 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3248 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2832 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3570 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3215 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>([]([]((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1560 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3246 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X((X((LTLAP14==true)))U(<>((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2049 ms.
FORMULA NoC3x3-PT-4A-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553566016370

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 128 ms
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 293 places.
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 608 transitions.
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 2:05:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 25 ms
Mar 26, 2019 2:05:53 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 138 ms
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 88 ms
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t485,t485,t485,t482,t482,t478,t478,t478,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t159,t159,t156,t156,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t511,t511,t509,t506,t506,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t532,t532,t530,t527,t527,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t110,t110,t107,t107,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t329,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t204,t204,t204,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t238,t238,t235,t235,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t169,t169,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t257,t256,t254,t253,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t304,t304,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t100,t100,t100,t98,t95,t95,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t572,t572,t572,t569,t569,t565,t565,t565,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t195,t195,t195,t191,t191,t191,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t543,t543,t543,t224,t224,t224,t224,t224,t224,t220,t220,t220,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t375,t375,t375,t365,t365,t365,t365,t365,t365,t365,t365,t365,t231,t231,t231,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t498,t498,t496,t104,t104,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t320,t318,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t423,t423,t331,t331,t331,t329,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t280,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t294,t294,t291,t291,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t136,t134,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 9 events :t432,t432,t426,t426,t426,t426,t426,t153,t153,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t95,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t86,t84,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t148,t148,t148,t148,t145,t145,t131,t131,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 9 events :t307,t307,t307,t307,t307,t304,t304,t288,t288,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t334,t332,t331,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t176,t176,t176,t173,t173,t169,t169,t169,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t118,t118,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t248,t248,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t444,t444,t442,t440,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t362,t362,t351,t351,t344,t344,t344,t344,t344,t344,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t412,t412,t410,t407,t407,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t391,t391,t389,t386,t386,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t312,t311,t309,t308,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 15 events :t453,t453,t453,t252,t252,t252,t252,t252,t252,t252,t252,t252,t248,t248,t248,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t271,t269,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t145,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t597,t597,t595,t592,t592,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t123,t123,t121,t118,t118,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t469,t469,t469,t462,t462,t462,t462,t462,t462,t187,t187,t187,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t211,t211,t211,t208,t208,t204,t204,t204,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t493,t493,t283,t283,t283,t283,t280,t280,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t582,t582,t554,t554,t554,t547,t547,t547,t547,t547,t547,
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 248 redundant transitions.
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 148 ms
Mar 26, 2019 2:05:54 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
Mar 26, 2019 2:05:54 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 0 ms
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 155 identical transitions.
Mar 26, 2019 2:05:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 453 transitions.
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 66 place invariants in 135 ms
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 293 variables to be positive in 770 ms
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 453 transitions.
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/453 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 34 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 453 transitions.
Mar 26, 2019 2:05:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 2:05:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 453 transitions.
Mar 26, 2019 2:05:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/453) took 2242 ms. Total solver calls (SAT/UNSAT): 1761(246/1515)
Mar 26, 2019 2:06:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(265/453) took 5255 ms. Total solver calls (SAT/UNSAT): 4261(822/3439)
Mar 26, 2019 2:06:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 7345 ms. Total solver calls (SAT/UNSAT): 4931(986/3945)
Mar 26, 2019 2:06:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 453 transitions.
Mar 26, 2019 2:06:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 46 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 2:06:04 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 9602ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-4A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is NoC3x3-PT-4A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344538000295"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-4A.tgz
mv NoC3x3-PT-4A execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;