Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344537900241.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is NoC3x3-PT-1A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344537900241
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 252K
-rw-r--r-- 1 mcc users 3.4K Mar 23 12:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 23 12:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 23 12:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 23 12:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 10:10 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 10:10 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K Mar 23 12:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Mar 23 12:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Mar 23 12:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K Mar 23 12:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 23 10:10 NewModel
-rw-r--r-- 1 mcc users 3.3K Mar 23 12:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 23 12:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 Mar 23 11:58 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 Mar 23 11:58 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K Mar 23 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 23 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 23 12:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 12:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 23 10:10 instance
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 iscolored
-rw-r--r-- 1 mcc users 0 Mar 23 10:10 model-fix.log
-rw-r--r-- 1 mcc users 81K Mar 23 10:10 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-00
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-01
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-02
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-03
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-04
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-05
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-06
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-07
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-08
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-09
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-10
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-11
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-12
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-13
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-14
FORMULA_NAME NoC3x3-PT-1A-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553562980841

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(G("(u5.p17>=1)"))))
Formula 0 simplified : !XG"(u5.p17>=1)"
built 71 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 213
// Phase 1: matrix 213 rows 165 cols
invariant :u38:p156 + u38:p157 + u38:p158 + u41:p0 = 1
invariant :u23:p97 + u23:p98 + u23:p99 + u23:p100 + u23:p101 + u23:p102 + u23:p103 + u41:p0 = 1
invariant :u33:p135 + u33:p136 + u33:p137 + u41:p0 = 1
invariant :u5:p17 + u5:p18 + u5:p19 + u41:p0 = 1
invariant :u12:p44 + u12:p45 + u12:p46 + u41:p0 = 1
invariant :u25:p105 + u25:p106 + u25:p107 + u41:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + u1:p5 + u1:p6 + u1:p7 + u41:p0 = 1
invariant :u10:p38 + u10:p39 + u10:p40 + u41:p0 = 1
invariant :u18:p72 + u18:p73 + u18:p74 + u41:p0 = 1
invariant :u13:p47 + u13:p48 + u13:p49 + u13:p50 + u13:p51 + u13:p52 + u13:p53 + u41:p0 = 1
invariant :u22:p88 + u22:p89 + u22:p90 + u22:p91 + u22:p92 + u22:p93 + u22:p94 + u22:p95 + u22:p96 + u41:p0 = 1
invariant :u15:p61 + u15:p62 + u15:p63 + u15:p64 + u15:p65 + u15:p66 + u15:p67 + u41:p0 = 1
invariant :u2:p8 + u2:p9 + u2:p10 + u2:p11 + u2:p12 + u41:p0 = 1
invariant :u36:p148 + u36:p149 + u36:p150 + u36:p151 + u36:p152 + u36:p153 + u36:p154 + u41:p0 = 1
invariant :u7:p23 + u7:p24 + u7:p25 + u7:p26 + u7:p27 + u7:p28 + u7:p29 + u41:p0 = 1
invariant :u29:p117 + u29:p118 + u29:p119 + u29:p120 + u29:p121 + u29:p122 + u29:p123 + u41:p0 = 1
invariant :u11:p41 + u11:p42 + u11:p43 + u41:p0 = 1
invariant :u6:p20 + u6:p21 + u6:p22 + u41:p0 = 1
invariant :u9:p37 + u41:p0 = 1
invariant :u19:p75 + u19:p76 + u19:p77 + u41:p0 = 1
invariant :u32:p132 + u32:p133 + u32:p134 + u41:p0 = 1
invariant :u39:p159 + u39:p160 + u39:p161 + u41:p0 = 1
invariant :u27:p111 + u27:p112 + u27:p113 + u41:p0 = 1
invariant :u24:p104 + u41:p0 = 1
invariant :u30:p124 + u30:p125 + u30:p126 + u30:p127 + u30:p128 + u30:p129 + u30:p130 + u41:p0 = 1
invariant :u21:p81 + u21:p82 + u21:p83 + u21:p84 + u21:p85 + u21:p86 + u21:p87 + u41:p0 = 1
invariant :u31:p131 + u41:p0 = 1
invariant :u16:p68 + u41:p0 = 1
invariant :u4:p14 + u4:p15 + u4:p16 + u41:p0 = 1
invariant :u28:p114 + u28:p115 + u28:p116 + u41:p0 = 1
invariant :u3:p13 + u41:p0 = 1
invariant :u17:p69 + u17:p70 + u17:p71 + u41:p0 = 1
invariant :u37:p155 + u41:p0 = 1
invariant :u14:p54 + u14:p55 + u14:p56 + u14:p57 + u14:p58 + u14:p59 + u14:p60 + u41:p0 = 1
invariant :u8:p30 + u8:p31 + u8:p32 + u8:p33 + u8:p34 + u8:p35 + u8:p36 + u41:p0 = 1
invariant :u20:p78 + u20:p79 + u20:p80 + u41:p0 = 1
invariant :u40:p162 + u40:p163 + u40:p164 + u41:p0 = 1
invariant :u35:p141 + u35:p142 + u35:p143 + u35:p144 + u35:p145 + u35:p146 + u35:p147 + u41:p0 = 1
invariant :u34:p138 + u34:p139 + u34:p140 + u41:p0 = 1
invariant :u26:p108 + u26:p109 + u26:p110 + u41:p0 = 1
Reverse transition relation is NOT exact ! Due to transitions t64, t65, t66, t86, t87, t88, t110, t111, t112, t113, t144, t145, t146, t170, t171, t172, t194, t195, t196, t216, t236, t237, t238, t255, t256, t257, t270, t271, t272, t284, t285, t286, t297, t298, t299, t318, t319, t320, t344, t345, t346, u4.t204, u4.t205, u4.t206, u4.t207, u4.t210, u5.t185, u5.t189, u5.t190, u5.t191, u5.t192, u5.t193, u10.t225, u10.t226, u10.t227, u10.t228, u10.t231, u11.t163, u11.t166, u11.t167, u11.t168, u11.t169, u17.t152, u17.t155, u17.t156, u17.t157, u17.t158, u18.t258, u18.t259, u18.t260, u18.t261, u18.t264, u19.t137, u19.t140, u19.t141, u19.t142, u19.t143, u25.t120, u25.t123, u25.t124, u25.t125, u25.t126, u26.t287, u26.t288, u26.t289, u26.t291, u27.t103, u27.t106, u27.t107, u27.t108, u27.t109, u32.t306, u32.t307, u32.t308, u32.t309, u32.t312, u33.t79, u33.t82, u33.t83, u33.t84, u33.t85, u38.t332, u38.t333, u38.t334, u38.t335, u38.t338, u39.t57, u39.t60, u39.t61, u39.t62, u39.t63, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :108/178/69/355
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
354 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.59711,91672,1,0,176567,851,2421,253858,283,5533,419389
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA NoC3x3-PT-1A-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(F((G("((u9.p37>=1)&&(u11.p41>=1))"))U(G("((u8.p30>=1)&&(u11.p42>=1))"))))))
Formula 1 simplified : !F(G"((u9.p37>=1)&&(u11.p41>=1))" U G"((u8.p30>=1)&&(u11.p42>=1))")
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4001 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 88 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>(([]((LTLAP1==true)))U([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 656 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>([](<>((LTLAP3==true)))))U((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 326 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 140 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((LTLAP6==true))U(<>([](X((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 169 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 253 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 684 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X(X(<>((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 662 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](((LTLAP10==true))U((LTLAP11==true))))U((<>((LTLAP7==true)))U((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 415 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 250 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 405 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([](<>((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 424 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(X(((LTLAP14==true))U((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 232 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((X((LTLAP16==true)))U(<>((LTLAP17==true))))U((<>((LTLAP18==true)))U((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 309 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 411 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>(<>([]([]((LTLAP19==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 935 ms.
FORMULA NoC3x3-PT-1A-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553563002936

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 1:16:22 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 26, 2019 1:16:22 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 82 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 165 places.
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 355 transitions.
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 1:16:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 29 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 94 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 50 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t297,t297,t295,t292,t292,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t144,t144,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t64,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t329,t329,t89,t89,t89,t89,t86,t86,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t318,t318,t316,t313,t313,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t203,t202,t200,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t215,t211,t211,t211,t178,t178,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t55,t53,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t77,t75,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 9 events :t147,t147,t147,t147,t144,t144,t127,t127,t127,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t270,t270,t268,t265,t265,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t183,t181,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t194,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t69,t69,t67,t64,t64,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t100,t100,t97,t97,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t134,t134,t131,t131,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t344,t344,t342,t339,t339,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t247,t247,t197,t197,t197,t197,t197,t197,t194,t194,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t255,t255,t250,t250,t250,t250,t94,t94,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t86,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t236,t236,t234,t232,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t110,t110,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t161,t159,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t279,t279,t173,t173,t173,t173,t170,t170,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t170,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 7 events :t117,t117,t114,t114,t110,t110,t110,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t284,t284,t282,t72,t72,
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 117 redundant transitions.
Mar 26, 2019 1:16:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 177 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 11 ms
Mar 26, 2019 1:16:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 108 identical transitions.
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 247 transitions.
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 40 place invariants in 55 ms
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 165 variables to be positive in 502 ms
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 247 transitions.
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/247 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 247 transitions.
Mar 26, 2019 1:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:16:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 247 transitions.
Mar 26, 2019 1:16:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/247) took 2172 ms. Total solver calls (SAT/UNSAT): 1277(216/1061)
Mar 26, 2019 1:16:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/247) took 5173 ms. Total solver calls (SAT/UNSAT): 2222(440/1782)
Mar 26, 2019 1:16:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 6260 ms. Total solver calls (SAT/UNSAT): 2272(453/1819)
Mar 26, 2019 1:16:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 247 transitions.
Mar 26, 2019 1:16:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:16:32 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 8206ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-1A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is NoC3x3-PT-1A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344537900241"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-1A.tgz
mv NoC3x3-PT-1A execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;