fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r184-csrt-155344537700158
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for FamilyReunion-COL-L05000M0500C250P250G125

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6494.650 1234944.00 4736577.00 159.80 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344537700158.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is FamilyReunion-COL-L05000M0500C250P250G125, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344537700158
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 624K
-rw-r--r-- 1 mcc users 4.2K Mar 24 07:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 24 07:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 24 06:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 11K Mar 24 06:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 2.6K Mar 24 06:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K Mar 24 06:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 24 06:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K Mar 24 06:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 24 00:18 NewModel
-rw-r--r-- 1 mcc users 3.2K Mar 24 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K Mar 24 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 132 Mar 24 06:27 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 370 Mar 24 06:27 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.3K Mar 24 06:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 24 06:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 24 06:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 24 06:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 equiv_pt

-rw-r--r-- 1 mcc users 24 Mar 24 00:18 instance
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 iscolored
-rw-r--r-- 1 mcc users 462K Mar 24 00:18 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L05000M0500C250P250G125-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1553555757364

23:16:00.450 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
23:16:00.453 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Its-tools:
An error has occurred. See the log file
/tmp/.eclipse/1553555758398.log.

BK_STOP 1553556992308

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 25, 2019 11:15:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 25, 2019 11:15:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 25, 2019 11:15:59 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 25, 2019 11:16:00 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1143 ms
Mar 25, 2019 11:18:36 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 104 places.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L05000M0500C250P250G125"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is FamilyReunion-COL-L05000M0500C250P250G125, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344537700158"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L05000M0500C250P250G125.tgz
mv FamilyReunion-COL-L05000M0500C250P250G125 execution
cd execution
if [ "CTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "CTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;