Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344537600093.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is GlobalProperties
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344537600093
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 292K
-rw-r--r-- 1 mcc users 3.8K Mar 24 07:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 24 07:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Mar 24 06:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 24 06:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 128 Apr 5 12:35 GlobalProperties.txt
-rw-r--r-- 1 mcc users 366 Apr 5 12:35 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.8K Mar 24 06:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Mar 24 06:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 24 06:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K Mar 24 06:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 24 00:18 NewModel
-rw-r--r-- 1 mcc users 3.9K Mar 24 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 24 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Mar 24 06:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 24 06:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 24 06:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 24 06:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 24 00:18 instance
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 iscolored
-rw-r--r-- 1 mcc users 137K Mar 24 00:18 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-GlobalProperties-0

=== Now, execution of the tool begins

BK_START 1554496882552

20:41:28.005 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
20:41:28.008 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Flatten gal took : 10404 ms
Constant places removed 275 places and 51 transitions.
Implicit places reduction removed 1836 places :[l7_305, l7_304, l7_303, l7_302, l7_301, l7_300, l7_299, l7_298, l7_297, l7_296, l7_295, l7_294, l7_293, l7_292, l7_291, l7_290, l7_289, l7_288, l7_287, l7_286, l7_285, l7_284, l7_283, l7_282, l7_281, l7_280, l7_279, l7_278, l7_277, l7_276, l7_275, l7_274, l7_273, l7_272, l7_271, l7_270, l7_269, l7_268, l7_267, l7_266, l7_265, l7_264, l7_263, l7_262, l7_261, l7_260, l7_259, l7_258, l7_257, l7_256, l7_255, l7_254, l7_253, l7_252, l7_251, l7_250, l7_249, l7_248, l7_247, l7_246, l7_245, l7_244, l7_243, l7_242, l7_241, l7_240, l7_239, l7_238, l7_237, l7_236, l7_235, l7_234, l7_233, l7_232, l7_231, l7_230, l7_229, l7_228, l7_227, l7_226, l7_225, l7_224, l7_223, l7_222, l7_221, l7_220, l7_219, l7_218, l7_217, l7_216, l7_215, l7_214, l7_213, l7_212, l7_211, l7_210, l7_209, l7_208, l7_207, l7_206, l7_205, l7_204, l7_203, l7_202, l7_201, l7_200, l7_199, l7_198, l7_197, l7_196, l7_195, l7_194, l7_193, l7_192, l7_191, l7_190, l7_189, l7_188, l7_187, l7_186, l7_185, l7_184, l7_183, l7_182, l7_181, l7_180, l7_179, l7_178, l7_177, l7_176, l7_175, l7_174, l7_173, l7_172, l7_171, l7_170, l7_169, l7_168, l7_167, l7_166, l7_165, l7_164, l7_163, l7_162, l7_161, l7_160, l7_159, l7_158, l7_157, l7_156, l7_155, l7_154, l7_153, l7_152, l7_151, l7_150, l7_149, l7_148, l7_147, l7_146, l7_145, l7_144, l7_143, l7_142, l7_141, l7_140, l7_139, l7_138, l7_137, l7_136, l7_135, l7_134, l7_133, l7_132, l7_131, l7_130, l7_129, l7_128, l7_127, l7_126, l7_125, l7_124, l7_123, l7_122, l7_121, l7_120, l7_119, l7_118, l7_117, l7_116, l7_115, l7_114, l7_113, l7_112, l7_111, l7_110, l7_109, l7_108, l7_107, l7_106, l7_105, l7_104, l7_103, l7_102, l7_101, l7_100, l7_99, l7_98, l7_97, l7_96, l7_95, l7_94, l7_93, l7_92, l7_91, l7_90, l7_89, l7_88, l7_87, l7_86, l7_85, l7_84, l7_83, l7_82, l7_81, l7_80, l7_79, l7_78, l7_77, l7_76, l7_75, l7_74, l7_73, l7_72, l7_71, l7_70, l7_69, l7_68, l7_67, l7_66, l7_65, l7_64, l7_63, l7_62, l7_61, l7_60, l7_59, l7_58, l7_57, l7_56, l7_55, l7_54, l7_53, l7_52, l7_51, l7_50, l7_49, l7_48, l7_47, l7_46, l7_45, l7_44, l7_43, l7_42, l7_41, l7_40, l7_39, l7_38, l7_37, l7_36, l7_35, l7_34, l7_33, l7_32, l7_31, l7_30, l7_29, l7_28, l7_27, l7_26, l7_25, l7_24, l7_23, l7_22, l7_21, l7_20, l7_19, l7_18, l7_17, l7_16, l7_15, l7_14, l7_13, l7_12, l7_11, l7_10, l7_9, l7_8, l7_7, l7_6, l7_5, l7_4, l7_3, l7_2, l7_1, l7_0, m6_305, m6_304, m6_303, m6_302, m6_301, m6_300, m6_299, m6_298, m6_297, m6_296, m6_295, m6_294, m6_293, m6_292, m6_291, m6_290, m6_289, m6_288, m6_287, m6_286, m6_285, m6_284, m6_283, m6_282, m6_281, m6_280, m6_279, m6_278, m6_277, m6_276, m6_275, m6_274, m6_273, m6_272, m6_271, m6_270, m6_269, m6_268, m6_267, m6_266, m6_265, m6_264, m6_263, m6_262, m6_261, m6_260, m6_259, m6_258, m6_257, m6_256, m6_255, m6_254, m6_253, m6_252, m6_251, m6_250, m6_249, m6_248, m6_247, m6_246, m6_245, m6_244, m6_243, m6_242, m6_241, m6_240, m6_239, m6_238, m6_237, m6_236, m6_235, m6_234, m6_233, m6_232, m6_231, m6_230, m6_229, m6_228, m6_227, m6_226, m6_225, m6_224, m6_223, m6_222, m6_221, m6_220, m6_219, m6_218, m6_217, m6_216, m6_215, m6_214, m6_213, m6_212, m6_211, m6_210, m6_209, m6_208, m6_207, m6_206, m6_205, m6_204, m6_203, m6_202, m6_201, m6_200, m6_199, m6_198, m6_197, m6_196, m6_195, m6_194, m6_193, m6_192, m6_191, m6_190, m6_189, m6_188, m6_187, m6_186, m6_185, m6_184, m6_183, m6_182, m6_181, m6_180, m6_179, m6_178, m6_177, m6_176, m6_175, m6_174, m6_173, m6_172, m6_171, m6_170, m6_169, m6_168, m6_167, m6_166, m6_165, m6_164, m6_163, m6_162, m6_161, m6_160, m6_159, m6_158, m6_157, m6_156, m6_155, m6_154, m6_153, m6_152, m6_151, m6_150, m6_149, m6_148, m6_147, m6_146, m6_145, m6_144, m6_143, m6_142, m6_141, m6_140, m6_139, m6_138, m6_137, m6_136, m6_135, m6_134, m6_133, m6_132, m6_131, m6_130, m6_129, m6_128, m6_127, m6_126, m6_125, m6_124, m6_123, m6_122, m6_121, m6_120, m6_119, m6_118, m6_117, m6_116, m6_115, m6_114, m6_113, m6_112, m6_111, m6_110, m6_109, m6_108, m6_107, m6_106, m6_105, m6_104, m6_103, m6_102, m6_101, m6_100, m6_99, m6_98, m6_97, m6_96, m6_95, m6_94, m6_93, m6_92, m6_91, m6_90, m6_89, m6_88, m6_87, m6_86, m6_85, m6_84, m6_83, m6_82, m6_81, m6_80, m6_79, m6_78, m6_77, m6_76, m6_75, m6_74, m6_73, m6_72, m6_71, m6_70, m6_69, m6_68, m6_67, m6_66, m6_65, m6_64, m6_63, m6_62, m6_61, m6_60, m6_59, m6_58, m6_57, m6_56, m6_55, m6_54, m6_53, m6_52, m6_51, m6_50, m6_49, m6_48, m6_47, m6_46, m6_45, m6_44, m6_43, m6_42, m6_41, m6_40, m6_39, m6_38, m6_37, m6_36, m6_35, m6_34, m6_33, m6_32, m6_31, m6_30, m6_29, m6_28, m6_27, m6_26, m6_25, m6_24, m6_23, m6_22, m6_21, m6_20, m6_19, m6_18, m6_17, m6_16, m6_15, m6_14, m6_13, m6_12, m6_11, m6_10, m6_9, m6_8, m6_7, m6_6, m6_5, m6_4, m6_3, m6_2, m6_1, m6_0, l5_305, l5_304, l5_303, l5_302, l5_301, l5_300, l5_299, l5_298, l5_297, l5_296, l5_295, l5_294, l5_293, l5_292, l5_291, l5_290, l5_289, l5_288, l5_287, l5_286, l5_285, l5_284, l5_283, l5_282, l5_281, l5_280, l5_279, l5_278, l5_277, l5_276, l5_275, l5_274, l5_273, l5_272, l5_271, l5_270, l5_269, l5_268, l5_267, l5_266, l5_265, l5_264, l5_263, l5_262, l5_261, l5_260, l5_259, l5_258, l5_257, l5_256, l5_255, l5_254, l5_253, l5_252, l5_251, l5_250, l5_249, l5_248, l5_247, l5_246, l5_245, l5_244, l5_243, l5_242, l5_241, l5_240, l5_239, l5_238, l5_237, l5_236, l5_235, l5_234, l5_233, l5_232, l5_231, l5_230, l5_229, l5_228, l5_227, l5_226, l5_225, l5_224, l5_223, l5_222, l5_221, l5_220, l5_219, l5_218, l5_217, l5_216, l5_215, l5_214, l5_213, l5_212, l5_211, l5_210, l5_209, l5_208, l5_207, l5_206, l5_205, l5_204, l5_203, l5_202, l5_201, l5_200, l5_199, l5_198, l5_197, l5_196, l5_195, l5_194, l5_193, l5_192, l5_191, l5_190, l5_189, l5_188, l5_187, l5_186, l5_185, l5_184, l5_183, l5_182, l5_181, l5_180, l5_179, l5_178, l5_177, l5_176, l5_175, l5_174, l5_173, l5_172, l5_171, l5_170, l5_169, l5_168, l5_167, l5_166, l5_165, l5_164, l5_163, l5_162, l5_161, l5_160, l5_159, l5_158, l5_157, l5_156, l5_155, l5_154, l5_153, l5_152, l5_151, l5_150, l5_149, l5_148, l5_147, l5_146, l5_145, l5_144, l5_143, l5_142, l5_141, l5_140, l5_139, l5_138, l5_137, l5_136, l5_135, l5_134, l5_133, l5_132, l5_131, l5_130, l5_129, l5_128, l5_127, l5_126, l5_125, l5_124, l5_123, l5_122, l5_121, l5_120, l5_119, l5_118, l5_117, l5_116, l5_115, l5_114, l5_113, l5_112, l5_111, l5_110, l5_109, l5_108, l5_107, l5_106, l5_105, l5_104, l5_103, l5_102, l5_101, l5_100, l5_99, l5_98, l5_97, l5_96, l5_95, l5_94, l5_93, l5_92, l5_91, l5_90, l5_89, l5_88, l5_87, l5_86, l5_85, l5_84, l5_83, l5_82, l5_81, l5_80, l5_79, l5_78, l5_77, l5_76, l5_75, l5_74, l5_73, l5_72, l5_71, l5_70, l5_69, l5_68, l5_67, l5_66, l5_65, l5_64, l5_63, l5_62, l5_61, l5_60, l5_59, l5_58, l5_57, l5_56, l5_55, l5_54, l5_53, l5_52, l5_51, l5_50, l5_49, l5_48, l5_47, l5_46, l5_45, l5_44, l5_43, l5_42, l5_41, l5_40, l5_39, l5_38, l5_37, l5_36, l5_35, l5_34, l5_33, l5_32, l5_31, l5_30, l5_29, l5_28, l5_27, l5_26, l5_25, l5_24, l5_23, l5_22, l5_21, l5_20, l5_19, l5_18, l5_17, l5_16, l5_15, l5_14, l5_13, l5_12, l5_11, l5_10, l5_9, l5_8, l5_7, l5_6, l5_5, l5_4, l5_3, l5_2, l5_1, l5_0, m4_305, m4_304, m4_303, m4_302, m4_301, m4_300, m4_299, m4_298, m4_297, m4_296, m4_295, m4_294, m4_293, m4_292, m4_291, m4_290, m4_289, m4_288, m4_287, m4_286, m4_285, m4_284, m4_283, m4_282, m4_281, m4_280, m4_279, m4_278, m4_277, m4_276, m4_275, m4_274, m4_273, m4_272, m4_271, m4_270, m4_269, m4_268, m4_267, m4_266, m4_265, m4_264, m4_263, m4_262, m4_261, m4_260, m4_259, m4_258, m4_257, m4_256, m4_255, m4_254, m4_253, m4_252, m4_251, m4_250, m4_249, m4_248, m4_247, m4_246, m4_245, m4_244, m4_243, m4_242, m4_241, m4_240, m4_239, m4_238, m4_237, m4_236, m4_235, m4_234, m4_233, m4_232, m4_231, m4_230, m4_229, m4_228, m4_227, m4_226, m4_225, m4_224, m4_223, m4_222, m4_221, m4_220, m4_219, m4_218, m4_217, m4_216, m4_215, m4_214, m4_213, m4_212, m4_211, m4_210, m4_209, m4_208, m4_207, m4_206, m4_205, m4_204, m4_203, m4_202, m4_201, m4_200, m4_199, m4_198, m4_197, m4_196, m4_195, m4_194, m4_193, m4_192, m4_191, m4_190, m4_189, m4_188, m4_187, m4_186, m4_185, m4_184, m4_183, m4_182, m4_181, m4_180, m4_179, m4_178, m4_177, m4_176, m4_175, m4_174, m4_173, m4_172, m4_171, m4_170, m4_169, m4_168, m4_167, m4_166, m4_165, m4_164, m4_163, m4_162, m4_161, m4_160, m4_159, m4_158, m4_157, m4_156, m4_155, m4_154, m4_153, m4_152, m4_151, m4_150, m4_149, m4_148, m4_147, m4_146, m4_145, m4_144, m4_143, m4_142, m4_141, m4_140, m4_139, m4_138, m4_137, m4_136, m4_135, m4_134, m4_133, m4_132, m4_131, m4_130, m4_129, m4_128, m4_127, m4_126, m4_125, m4_124, m4_123, m4_122, m4_121, m4_120, m4_119, m4_118, m4_117, m4_116, m4_115, m4_114, m4_113, m4_112, m4_111, m4_110, m4_109, m4_108, m4_107, m4_106, m4_105, m4_104, m4_103, m4_102, m4_101, m4_100, m4_99, m4_98, m4_97, m4_96, m4_95, m4_94, m4_93, m4_92, m4_91, m4_90, m4_89, m4_88, m4_87, m4_86, m4_85, m4_84, m4_83, m4_82, m4_81, m4_80, m4_79, m4_78, m4_77, m4_76, m4_75, m4_74, m4_73, m4_72, m4_71, m4_70, m4_69, m4_68, m4_67, m4_66, m4_65, m4_64, m4_63, m4_62, m4_61, m4_60, m4_59, m4_58, m4_57, m4_56, m4_55, m4_54, m4_53, m4_52, m4_51, m4_50, m4_49, m4_48, m4_47, m4_46, m4_45, m4_44, m4_43, m4_42, m4_41, m4_40, m4_39, m4_38, m4_37, m4_36, m4_35, m4_34, m4_33, m4_32, m4_31, m4_30, m4_29, m4_28, m4_27, m4_26, m4_25, m4_24, m4_23, m4_22, m4_21, m4_20, m4_19, m4_18, m4_17, m4_16, m4_15, m4_14, m4_13, m4_12, m4_11, m4_10, m4_9, m4_8, m4_7, m4_6, m4_5, m4_4, m4_3, m4_2, m4_1, m4_0, l3_305, l3_304, l3_303, l3_302, l3_301, l3_300, l3_299, l3_298, l3_297, l3_296, l3_295, l3_294, l3_293, l3_292, l3_291, l3_290, l3_289, l3_288, l3_287, l3_286, l3_285, l3_284, l3_283, l3_282, l3_281, l3_280, l3_279, l3_278, l3_277, l3_276, l3_275, l3_274, l3_273, l3_272, l3_271, l3_270, l3_269, l3_268, l3_267, l3_266, l3_265, l3_264, l3_263, l3_262, l3_261, l3_260, l3_259, l3_258, l3_257, l3_256, l3_255, l3_254, l3_253, l3_252, l3_251, l3_250, l3_249, l3_248, l3_247, l3_246, l3_245, l3_244, l3_243, l3_242, l3_241, l3_240, l3_239, l3_238, l3_237, l3_236, l3_235, l3_234, l3_233, l3_232, l3_231, l3_230, l3_229, l3_228, l3_227, l3_226, l3_225, l3_224, l3_223, l3_222, l3_221, l3_220, l3_219, l3_218, l3_217, l3_216, l3_215, l3_214, l3_213, l3_212, l3_211, l3_210, l3_209, l3_208, l3_207, l3_206, l3_205, l3_204, l3_203, l3_202, l3_201, l3_200, l3_199, l3_198, l3_197, l3_196, l3_195, l3_194, l3_193, l3_192, l3_191, l3_190, l3_189, l3_188, l3_187, l3_186, l3_185, l3_184, l3_183, l3_182, l3_181, l3_180, l3_179, l3_178, l3_177, l3_176, l3_175, l3_174, l3_173, l3_172, l3_171, l3_170, l3_169, l3_168, l3_167, l3_166, l3_165, l3_164, l3_163, l3_162, l3_161, l3_160, l3_159, l3_158, l3_157, l3_156, l3_155, l3_154, l3_153, l3_152, l3_151, l3_150, l3_149, l3_148, l3_147, l3_146, l3_145, l3_144, l3_143, l3_142, l3_141, l3_140, l3_139, l3_138, l3_137, l3_136, l3_135, l3_134, l3_133, l3_132, l3_131, l3_130, l3_129, l3_128, l3_127, l3_126, l3_125, l3_124, l3_123, l3_122, l3_121, l3_120, l3_119, l3_118, l3_117, l3_116, l3_115, l3_114, l3_113, l3_112, l3_111, l3_110, l3_109, l3_108, l3_107, l3_106, l3_105, l3_104, l3_103, l3_102, l3_101, l3_100, l3_99, l3_98, l3_97, l3_96, l3_95, l3_94, l3_93, l3_92, l3_91, l3_90, l3_89, l3_88, l3_87, l3_86, l3_85, l3_84, l3_83, l3_82, l3_81, l3_80, l3_79, l3_78, l3_77, l3_76, l3_75, l3_74, l3_73, l3_72, l3_71, l3_70, l3_69, l3_68, l3_67, l3_66, l3_65, l3_64, l3_63, l3_62, l3_61, l3_60, l3_59, l3_58, l3_57, l3_56, l3_55, l3_54, l3_53, l3_52, l3_51, l3_50, l3_49, l3_48, l3_47, l3_46, l3_45, l3_44, l3_43, l3_42, l3_41, l3_40, l3_39, l3_38, l3_37, l3_36, l3_35, l3_34, l3_33, l3_32, l3_31, l3_30, l3_29, l3_28, l3_27, l3_26, l3_25, l3_24, l3_23, l3_22, l3_21, l3_20, l3_19, l3_18, l3_17, l3_16, l3_15, l3_14, l3_13, l3_12, l3_11, l3_10, l3_9, l3_8, l3_7, l3_6, l3_5, l3_4, l3_3, l3_2, l3_1, l3_0, m2_305, m2_304, m2_303, m2_302, m2_301, m2_300, m2_299, m2_298, m2_297, m2_296, m2_295, m2_294, m2_293, m2_292, m2_291, m2_290, m2_289, m2_288, m2_287, m2_286, m2_285, m2_284, m2_283, m2_282, m2_281, m2_280, m2_279, m2_278, m2_277, m2_276, m2_275, m2_274, m2_273, m2_272, m2_271, m2_270, m2_269, m2_268, m2_267, m2_266, m2_265, m2_264, m2_263, m2_262, m2_261, m2_260, m2_259, m2_258, m2_257, m2_256, m2_255, m2_254, m2_253, m2_252, m2_251, m2_250, m2_249, m2_248, m2_247, m2_246, m2_245, m2_244, m2_243, m2_242, m2_241, m2_240, m2_239, m2_238, m2_237, m2_236, m2_235, m2_234, m2_233, m2_232, m2_231, m2_230, m2_229, m2_228, m2_227, m2_226, m2_225, m2_224, m2_223, m2_222, m2_221, m2_220, m2_219, m2_218, m2_217, m2_216, m2_215, m2_214, m2_213, m2_212, m2_211, m2_210, m2_209, m2_208, m2_207, m2_206, m2_205, m2_204, m2_203, m2_202, m2_201, m2_200, m2_199, m2_198, m2_197, m2_196, m2_195, m2_194, m2_193, m2_192, m2_191, m2_190, m2_189, m2_188, m2_187, m2_186, m2_185, m2_184, m2_183, m2_182, m2_181, m2_180, m2_179, m2_178, m2_177, m2_176, m2_175, m2_174, m2_173, m2_172, m2_171, m2_170, m2_169, m2_168, m2_167, m2_166, m2_165, m2_164, m2_163, m2_162, m2_161, m2_160, m2_159, m2_158, m2_157, m2_156, m2_155, m2_154, m2_153, m2_152, m2_151, m2_150, m2_149, m2_148, m2_147, m2_146, m2_145, m2_144, m2_143, m2_142, m2_141, m2_140, m2_139, m2_138, m2_137, m2_136, m2_135, m2_134, m2_133, m2_132, m2_131, m2_130, m2_129, m2_128, m2_127, m2_126, m2_125, m2_124, m2_123, m2_122, m2_121, m2_120, m2_119, m2_118, m2_117, m2_116, m2_115, m2_114, m2_113, m2_112, m2_111, m2_110, m2_109, m2_108, m2_107, m2_106, m2_105, m2_104, m2_103, m2_102, m2_101, m2_100, m2_99, m2_98, m2_97, m2_96, m2_95, m2_94, m2_93, m2_92, m2_91, m2_90, m2_89, m2_88, m2_87, m2_86, m2_85, m2_84, m2_83, m2_82, m2_81, m2_80, m2_79, m2_78, m2_77, m2_76, m2_75, m2_74, m2_73, m2_72, m2_71, m2_70, m2_69, m2_68, m2_67, m2_66, m2_65, m2_64, m2_63, m2_62, m2_61, m2_60, m2_59, m2_58, m2_57, m2_56, m2_55, m2_54, m2_53, m2_52, m2_51, m2_50, m2_49, m2_48, m2_47, m2_46, m2_45, m2_44, m2_43, m2_42, m2_41, m2_40, m2_39, m2_38, m2_37, m2_36, m2_35, m2_34, m2_33, m2_32, m2_31, m2_30, m2_29, m2_28, m2_27, m2_26, m2_25, m2_24, m2_23, m2_22, m2_21, m2_20, m2_19, m2_18, m2_17, m2_16, m2_15, m2_14, m2_13, m2_12, m2_11, m2_10, m2_9, m2_8, m2_7, m2_6, m2_5, m2_4, m2_3, m2_2, m2_1, m2_0]
Performed 6579 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 8690 rules applied. Total rules applied 8690 place count 10117 transition count 3930
Constant places removed 6885 places and 0 transitions.
Performed 204 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 7089 rules applied. Total rules applied 15779 place count 3232 transition count 3726
Constant places removed 204 places and 0 transitions.
Iterating post reduction 2 with 204 rules applied. Total rules applied 15983 place count 3028 transition count 3726
Symmetric choice reduction at 3 with 920 rule applications. Total rules 16903 place count 3028 transition count 3726
Constant places removed 920 places and 971 transitions.
Reduce isomorphic transitions removed 153 transitions.
Performed 306 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 1379 rules applied. Total rules applied 18282 place count 2108 transition count 2296
Constant places removed 357 places and 0 transitions.
Implicit places reduction removed 51 places :[l16_50, l16_49, l16_48, l16_47, l16_46, l16_45, l16_44, l16_43, l16_42, l16_41, l16_40, l16_39, l16_38, l16_37, l16_36, l16_35, l16_34, l16_33, l16_32, l16_31, l16_30, l16_29, l16_28, l16_27, l16_26, l16_25, l16_24, l16_23, l16_22, l16_21, l16_20, l16_19, l16_18, l16_17, l16_16, l16_15, l16_14, l16_13, l16_12, l16_11, l16_10, l16_9, l16_8, l16_7, l16_6, l16_5, l16_4, l16_3, l16_2, l16_1, l16_0]
Performed 102 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 510 rules applied. Total rules applied 18792 place count 1700 transition count 2194
Constant places removed 102 places and 0 transitions.
Iterating post reduction 5 with 102 rules applied. Total rules applied 18894 place count 1598 transition count 2194
Performed 102 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 102 Pre rules applied. Total rules applied 18894 place count 1598 transition count 2092
Constant places removed 102 places and 0 transitions.
Iterating post reduction 6 with 102 rules applied. Total rules applied 18996 place count 1496 transition count 2092
Symmetric choice reduction at 7 with 10 rule applications. Total rules 19006 place count 1496 transition count 2092
Constant places removed 10 places and 510 transitions.
Reduce isomorphic transitions removed 204 transitions.
Implicit places reduction removed 255 places :[l20_50, l20_49, l20_48, l20_47, l20_46, l20_45, l20_44, l20_43, l20_42, l20_41, l20_40, l20_39, l20_38, l20_37, l20_36, l20_35, l20_34, l20_33, l20_32, l20_31, l20_30, l20_29, l20_28, l20_27, l20_26, l20_25, l20_24, l20_23, l20_22, l20_21, l20_20, l20_19, l20_18, l20_17, l20_16, l20_15, l20_14, l20_13, l20_12, l20_11, l20_10, l20_9, l20_8, l20_7, l20_6, l20_5, l20_4, l20_3, l20_2, l20_1, l20_0, l18_50, l18_49, l18_48, l18_47, l18_46, l18_45, l18_44, l18_43, l18_42, l18_41, l18_40, l18_39, l18_38, l18_37, l18_36, l18_35, l18_34, l18_33, l18_32, l18_31, l18_30, l18_29, l18_28, l18_27, l18_26, l18_25, l18_24, l18_23, l18_22, l18_21, l18_20, l18_19, l18_18, l18_17, l18_16, l18_15, l18_14, l18_13, l18_12, l18_11, l18_10, l18_9, l18_8, l18_7, l18_6, l18_5, l18_4, l18_3, l18_2, l18_1, l18_0, l10_50, l10_49, l10_48, l10_47, l10_46, l10_45, l10_44, l10_43, l10_42, l10_41, l10_40, l10_39, l10_38, l10_37, l10_36, l10_35, l10_34, l10_33, l10_32, l10_31, l10_30, l10_29, l10_28, l10_27, l10_26, l10_25, l10_24, l10_23, l10_22, l10_21, l10_20, l10_19, l10_18, l10_17, l10_16, l10_15, l10_14, l10_13, l10_12, l10_11, l10_10, l10_9, l10_8, l10_7, l10_6, l10_5, l10_4, l10_3, l10_2, l10_1, l10_0, l36_50, l36_49, l36_48, l36_47, l36_46, l36_45, l36_44, l36_43, l36_42, l36_41, l36_40, l36_39, l36_38, l36_37, l36_36, l36_35, l36_34, l36_33, l36_32, l36_31, l36_30, l36_29, l36_28, l36_27, l36_26, l36_25, l36_24, l36_23, l36_22, l36_21, l36_20, l36_19, l36_18, l36_17, l36_16, l36_15, l36_14, l36_13, l36_12, l36_11, l36_10, l36_9, l36_8, l36_7, l36_6, l36_5, l36_4, l36_3, l36_2, l36_1, l36_0, l31_50, l31_49, l31_48, l31_47, l31_46, l31_45, l31_44, l31_43, l31_42, l31_41, l31_40, l31_39, l31_38, l31_37, l31_36, l31_35, l31_34, l31_33, l31_32, l31_31, l31_30, l31_29, l31_28, l31_27, l31_26, l31_25, l31_24, l31_23, l31_22, l31_21, l31_20, l31_19, l31_18, l31_17, l31_16, l31_15, l31_14, l31_13, l31_12, l31_11, l31_10, l31_9, l31_8, l31_7, l31_6, l31_5, l31_4, l31_3, l31_2, l31_1, l31_0]
Performed 357 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 826 rules applied. Total rules applied 19832 place count 1231 transition count 1021
Constant places removed 357 places and 0 transitions.
Iterating post reduction 8 with 357 rules applied. Total rules applied 20189 place count 874 transition count 1021
Performed 102 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 9 with 102 Pre rules applied. Total rules applied 20189 place count 874 transition count 919
Constant places removed 102 places and 0 transitions.
Iterating post reduction 9 with 102 rules applied. Total rules applied 20291 place count 772 transition count 919
Symmetric choice reduction at 10 with 256 rule applications. Total rules 20547 place count 772 transition count 919
Constant places removed 256 places and 306 transitions.
Reduce isomorphic transitions removed 255 transitions.
Iterating post reduction 10 with 511 rules applied. Total rules applied 21058 place count 516 transition count 358
Constant places removed 51 places and 51 transitions.
Iterating post reduction 11 with 51 rules applied. Total rules applied 21109 place count 465 transition count 307
Constant places removed 51 places and 0 transitions.
Iterating post reduction 12 with 51 rules applied. Total rules applied 21160 place count 414 transition count 307
Constant places removed 51 places and 51 transitions.
Iterating post reduction 13 with 51 rules applied. Total rules applied 21211 place count 363 transition count 256
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 21212 place count 362 transition count 255
Applied a total of 21212 rules in 16795 ms. Remains 362 /12228 variables (removed 11866) and now considering 255/10560 (removed 10305) transitions.
// Phase 1: matrix 255 rows 362 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 255 rows 362 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/GlobalProperties.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/GlobalProperties.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 255 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 32 groups
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]

BK_STOP 1554498259259

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ GlobalProperties = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution GlobalProperties -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination GlobalProperties -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Apr 05, 2019 8:41:26 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, GlobalProperties, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Apr 05, 2019 8:41:26 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Apr 05, 2019 8:41:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Apr 05, 2019 8:41:28 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1997 ms
Apr 05, 2019 8:41:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 104 places.
Apr 05, 2019 8:41:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Apr 05, 2019 8:41:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :LxM->m1,ml0,l2,m2,lm1,l3,m3,ml1,l4,lm2,m4,m5,l5,ml2,l6,lm3,m6,m7,ml3,l7,m9,m10,ml4,
Response->r0,
CINFORMI->c2,c4,c7,c0,c1,
LegalResident->lm0,l12,l0,l30,l31,lc1,l1,l32,lc2,l33,lc3,l34,cg0,l35,lg0,l36,l8,l9,lm4,l38,l10,l11,l13,l16,l14,lc0,l15,l17,l18,lp0,l19,lp1,l20,l21,l22,l24,l25,l23,l28,l26,l27,l29,
LxP->p1,p3,p2,p5,p4,p6,p9,pl0,pl1,
LxC->c3,cl2,c5,c6,cl0,cl1,
GovernmentCommission->g0,g2,g4,
LxR->gl1,l37,l39,l40,
MICSystem->m0,m8,m11,
PublicAdminOffice->p0,p7,p8,p10,p11,
LxG->g1,gl0,g3,

Apr 05, 2019 8:41:29 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 66 transitions.
Apr 05, 2019 8:41:29 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Apr 05, 2019 8:41:29 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 71 ms
Apr 05, 2019 8:41:29 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 5 fixed domain variables (out of 12245 variables) in GAL type FamilyReunion_COL_L00050M0005C002P002G001
Apr 05, 2019 8:41:29 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 17 constant array cells/variables (out of 12245 variables) in type FamilyReunion_COL_L00050M0005C002P002G001
Apr 05, 2019 8:41:29 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: m0[0-5], r0[0-1], p0[0-2], c0[0-2], c2[0-2],
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 51.0 instantiations of transitions. Total transitions/syncs built is 11530
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 5 fixed domain variables (out of 12245 variables) in GAL type FamilyReunion_COL_L00050M0005C002P002G001
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 68 constant array cells/variables (out of 12245 variables) in type FamilyReunion_COL_L00050M0005C002P002G001
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: m0[0-5], l40[1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79,81,83,85,87,89,91,93,95,97,99,101], r0[0-1], p0[0-2], c0[0-2], c2[0-2],
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :m0[]
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :r0[]
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :p0[]
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :c0[]
Apr 05, 2019 8:41:30 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :c2[]
Apr 05, 2019 8:41:31 PM fr.lip6.move.gal.instantiate.PropertySimplifier evalInInitialState
WARNING: Unexpected boolean logic operator in evalInInitialState fr.lip6.move.gal.impl.EXImpl
Apr 05, 2019 8:41:31 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-COL-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 8:41:32 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2884 ms
Apr 05, 2019 8:41:39 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 245 ms
Apr 05, 2019 8:41:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 6226 transitions. Expanding to a total of 11581 deterministic transitions.
Apr 05, 2019 8:41:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 140 ms.
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-COL-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 398 ms
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 255 transitions.
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-COL-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 109 ms
Apr 05, 2019 8:42:00 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Apr 05, 2019 8:42:01 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Apr 05, 2019 8:42:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 186 ms
Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 50 events 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Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 100 events :t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t9999.t10152.t10305.t10356.t10407.t10458.t10509.t0.t408.t767.t1226.t1377.t2142.t3060,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,t2193,
Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 100 events :t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t2958.t5151.t5814.t6223.t6579.t6987.t7395,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,t3417.t3876.t4641.t4743,
Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 100 events 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Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 350 redundant transitions.
Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-COL-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 8:42:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 659 ms
Apr 05, 2019 8:42:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/GlobalProperties.pnml.gal : 20 ms
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 362 variables to be positive in 8912 ms
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 255 transitions.
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/255 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 78 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 255 transitions.
Apr 05, 2019 8:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 37 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 8:42:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 255 transitions.
Apr 05, 2019 8:42:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/255) took 2981 ms. Total solver calls (SAT/UNSAT): 99(99/0)
Apr 05, 2019 8:42:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/255) took 6318 ms. Total solver calls (SAT/UNSAT): 240(240/0)
Apr 05, 2019 8:42:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/255) took 9377 ms. Total solver calls (SAT/UNSAT): 455(455/0)
Apr 05, 2019 8:42:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/255) took 13269 ms. Total solver calls (SAT/UNSAT): 645(645/0)
Apr 05, 2019 8:42:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/255) took 16274 ms. Total solver calls (SAT/UNSAT): 1022(1022/0)
Apr 05, 2019 8:42:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/255) took 19345 ms. Total solver calls (SAT/UNSAT): 1239(1239/0)
Apr 05, 2019 8:42:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/255) took 22428 ms. Total solver calls (SAT/UNSAT): 1374(1374/0)
Apr 05, 2019 8:42:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/255) took 25586 ms. Total solver calls (SAT/UNSAT): 1604(1604/0)
Apr 05, 2019 8:42:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/255) took 28983 ms. Total solver calls (SAT/UNSAT): 1730(1730/0)
Apr 05, 2019 8:42:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/255) took 32478 ms. Total solver calls (SAT/UNSAT): 1884(1884/0)
Apr 05, 2019 8:42:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/255) took 36353 ms. Total solver calls (SAT/UNSAT): 2022(2022/0)
Apr 05, 2019 8:42:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/255) took 39636 ms. Total solver calls (SAT/UNSAT): 2199(2199/0)
Apr 05, 2019 8:42:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/255) took 42757 ms. Total solver calls (SAT/UNSAT): 2535(2535/0)
Apr 05, 2019 8:42:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/255) took 45852 ms. Total solver calls (SAT/UNSAT): 2744(2744/0)
Apr 05, 2019 8:43:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/255) took 49161 ms. Total solver calls (SAT/UNSAT): 2879(2879/0)
Apr 05, 2019 8:43:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/255) took 53310 ms. Total solver calls (SAT/UNSAT): 3122(3122/0)
Apr 05, 2019 8:43:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/255) took 56901 ms. Total solver calls (SAT/UNSAT): 3500(3500/0)
Apr 05, 2019 8:43:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/255) took 60195 ms. Total solver calls (SAT/UNSAT): 3654(3654/0)
Apr 05, 2019 8:43:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/255) took 63331 ms. Total solver calls (SAT/UNSAT): 3804(3804/0)
Apr 05, 2019 8:43:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/255) took 66706 ms. Total solver calls (SAT/UNSAT): 3972(3972/0)
Apr 05, 2019 8:43:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/255) took 70200 ms. Total solver calls (SAT/UNSAT): 4154(4154/0)
Apr 05, 2019 8:43:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/255) took 73273 ms. Total solver calls (SAT/UNSAT): 4320(4320/0)
Apr 05, 2019 8:43:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/255) took 76924 ms. Total solver calls (SAT/UNSAT): 4505(4505/0)
Apr 05, 2019 8:43:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/255) took 80294 ms. Total solver calls (SAT/UNSAT): 4694(4694/0)
Apr 05, 2019 8:43:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/255) took 83719 ms. Total solver calls (SAT/UNSAT): 4847(4847/0)
Apr 05, 2019 8:43:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/255) took 86931 ms. Total solver calls (SAT/UNSAT): 5009(5009/0)
Apr 05, 2019 8:43:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/255) took 90561 ms. Total solver calls (SAT/UNSAT): 5199(5199/0)
Apr 05, 2019 8:43:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/255) took 93705 ms. Total solver calls (SAT/UNSAT): 5340(5340/0)
Apr 05, 2019 8:43:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(212/255) took 97119 ms. Total solver calls (SAT/UNSAT): 5514(5514/0)
Apr 05, 2019 8:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/255) took 100424 ms. Total solver calls (SAT/UNSAT): 5672(5672/0)
Apr 05, 2019 8:43:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/255) took 104009 ms. Total solver calls (SAT/UNSAT): 5847(5847/0)
Apr 05, 2019 8:43:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/255) took 107366 ms. Total solver calls (SAT/UNSAT): 6024(6024/0)
Apr 05, 2019 8:44:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(236/255) took 110765 ms. Total solver calls (SAT/UNSAT): 6222(6222/0)
Apr 05, 2019 8:44:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 113553 ms. Total solver calls (SAT/UNSAT): 6375(6375/0)
Apr 05, 2019 8:44:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 255 transitions.
Apr 05, 2019 9:04:08 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Apr 05, 2019 9:04:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1327910ms conformant to PINS in folder :/home/mcc/execution
virtual memory exhausted: Cannot allocate memory
java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
at fr.lip6.move.gal.application.LTSminRunner.compilePINS(LTSminRunner.java:242)
at fr.lip6.move.gal.application.LTSminRunner.access$6(LTSminRunner.java:225)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:75)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00050M0005C002P002G001"
export BK_EXAMINATION="GlobalProperties"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is GlobalProperties"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344537600093"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00050M0005C002P002G001.tgz
mv FamilyReunion-COL-L00050M0005C002P002G001 execution
cd execution
if [ "GlobalProperties" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "GlobalProperties" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "GlobalProperties" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "GlobalProperties" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "GlobalProperties.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property GlobalProperties.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "GlobalProperties.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' GlobalProperties.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;