Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r181-csrt-155344534800124.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool lola
Input is FamilyReunion-COL-L00400M0040C020P020G001, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r181-csrt-155344534800124
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 312K
-rw-r--r-- 1 mcc users 3.7K Mar 24 07:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 24 07:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Mar 24 06:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 24 06:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K Mar 24 06:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K Mar 24 06:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 24 06:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K Mar 24 06:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 24 00:18 NewModel
-rw-r--r-- 1 mcc users 3.5K Mar 24 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 24 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 132 Mar 24 06:27 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 370 Mar 24 06:27 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.6K Mar 24 06:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 24 06:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 24 06:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 24 06:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 24 00:18 instance
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 iscolored
-rw-r--r-- 1 mcc users 159K Mar 24 00:18 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-00
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-01
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-02
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-03
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-04
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-05
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-06
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-07
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-08
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-09
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-10
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-11
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-12
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-13
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-14
FORMULA_NAME FamilyReunion-COL-L00400M0040C020P020G001-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553471565852

info: Time: 3600 - MCC
vrfy: Checking LTLFireability @ FamilyReunion-COL-L00400M0040C020P020G001 @ 3570 seconds
Makefile:16: recipe for target 'verify' failed
vrfy: finished
info: timeLeft: 3523
rslt: Output for LTLFireability @ FamilyReunion-COL-L00400M0040C020P020G001
lola: LoLA will run for 3570 seconds at most (--timelimit)
lola: NET
lola: input: PNML file (--pnml)
lola: reading net from model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: Places: 538109, Transitions: 508489
lola: @ trans SendClearanceToRel
lola: @ trans ObtainFamRelCertif
lola: @ trans Summoned
lola: @ trans PrepIncomeCertif
lola: @ trans SetUpAppoint
lola: @ trans RegisterRelativePubHealth
lola: @ trans Gate1ANDSplit
lola: @ trans SendLangChoice
lola: @ trans HousingSuitCertifObtained
lola: @ trans ChoseFamilyReunion
lola: @ trans GotoOSSAndProdDoc
lola: @ trans ObtainRelativeFinStatement
lola: @ trans ReceiveAppointReq
lola: @ trans TransmitReq
lola: @ trans ReceiveQuestion
lola: @ trans ReceiveReqDocsReq
lola: @ trans CheckRequiredDoc
lola: @ trans ArchiveReq
lola: @ trans RespReceived
lola: @ trans ReceiveRegsitration
lola: @ trans EvaluateReq
lola: @ trans Gate1XORSplit
lola: @ trans Gate1XORJoin
lola: @ trans Gate2ANDSplit
lola: @ trans ReceiveAppoint
lola: @ trans ReceiveDocsObtained
lola: @ trans ReceiveNeedChoice
lola: @ trans ReceiveLangReq
lola: @ trans DisplayLangChoice
lola: @ trans TickDocsObtained
lola: @ trans ReceiveAccessReq
lola: @ trans Gate1ANDJoin
lola: @ trans ReceiveLangChoice
lola: @ trans Gate2XORSplit
lola: @ trans ReqHousingSuitCertif
lola: @ trans ClearanceReqReceived
lola: @ trans DisplayNeedChoice
lola: @ trans BringReqtoCINFORMI
lola: @ trans ReceiveNeedReq
lola: @ trans CommunicateResp
lola: @ trans PrepFamReuClearReq
lola: @ trans CheckHousingSuitReq
lola: @ trans ReqAppointCINFORMI
lola: @ trans AppointReceived
lola: @ trans AskCINFORMI
lola: @ trans ObtainMissingDocs
lola: @ trans ObtainRelHealtCondStatement
lola: @ trans DisplayReqDocs
lola: @ trans ExplainProcedure
lola: @ trans ProvidePersonalnfo
lola: @ trans CheckSanityReq
lola: @ trans ExplainHowToObtainMissingDocs
lola: @ trans RegisterRelative
lola: @ trans GiveAppoint
lola: @ trans AppReqReceived
lola: @ trans Gate2ANDJoin
lola: @ trans SendSuitabilityCertif
lola: @ trans SummonApplicant
lola: @ trans GotIt
lola: @ trans GoToAppoint
lola: @ trans ReceiveInstructions
lola: @ trans ReserveAppoint
lola: @ trans ReserveAppCINFORMI
lola: @ trans ReceiveHousingSuitCertifReq
lola: @ trans AccessMicTerminal
lola: @ trans Gate3XORSplit
lola: finished unfolding
lola: finished parsing
lola: closed net file model.pnml
lola: 1046598/268435456 symbol table entries, 0 collisions
lola: preprocessing...
lola: Size of bit vector: 17219488
lola: finding significant places
lola: 538109 places, 508489 transitions, 424479 significant places
lola: compute conflict clusters
lola: computed conflict clusters
lola: Computing conflicting sets
Killed
rslt: finished

BK_STOP 1553471612828

--------------------
content from stderr:

grep: GenericPropertiesVerdict.xml: No such file or directory
make: [verify] Error 137 (ignored)
grep: GenericPropertiesVerdict.xml: No such file or directory

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00400M0040C020P020G001"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00400M0040C020P020G001, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r181-csrt-155344534800124"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00400M0040C020P020G001.tgz
mv FamilyReunion-COL-L00400M0040C020P020G001 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;