Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r162-csrt-155286434200475.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is SmallOperatingSystem-PT-MT4096DC1024, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r162-csrt-155286434200475
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 180K
-rw-r--r-- 1 mcc users 3.5K Feb 12 18:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K Feb 12 18:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 9 02:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 9 02:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 123 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 361 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.8K Feb 5 01:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 01:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 4 22:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K Feb 4 22:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.3K Feb 4 20:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 20:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 21:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 1 21:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 13 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553063600906

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(("(((TaskSuspended>=1)&&(DiskControllerUnit>=1))&&(TaskOnDisk>=1))")U(F("(ExecutingTask>=1)"))))))
Formula 0 simplified : !F("(((TaskSuspended>=1)&&(DiskControllerUnit>=1))&&(TaskOnDisk>=1))" U F"(ExecutingTask>=1)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 8 rows 9 cols
invariant :TaskOnDisk + TransferToDisk + LoadingMem = 4096
invariant :FreeMemSegment + TransferToDisk + TaskReady + TaskSuspended + ExecutingTask + LoadingMem = 4096
invariant :DiskControllerUnit + TransferToDisk + LoadingMem = 1024
invariant :CPUUnit + ExecutingTask = 2048
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 601 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 147 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP0==true))U(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 366 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 387 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 905 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>([](X((LTLAP5==true)))))U([]([](X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1874 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 277 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4759 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X(X(X((LTLAP5==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1067 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 296 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 236 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>([](<>((LTLAP7==true)))))U(((LTLAP4==true))U(X((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 447 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 215 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []([](X((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1267 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((X([]((LTLAP4==true))))U([]([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 245 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2625 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]((LTLAP0==true))))U((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1759 ms.
FORMULA SmallOperatingSystem-PT-MT4096DC1024-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 33 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 9 places.
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 8 transitions.
Mar 20, 2019 6:33:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 8 transitions.
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 4 place invariants in 7 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 9 variables to be positive in 37 ms
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 8 transitions.
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/8 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 8 transitions.
Mar 20, 2019 6:33:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:33:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 8 transitions.
Mar 20, 2019 6:33:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 464 ms. Total solver calls (SAT/UNSAT): 28(28/0)
Mar 20, 2019 6:33:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 8 transitions.
Mar 20, 2019 6:33:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 31 ms. Total solver calls (SAT/UNSAT): 13(0/13)
Mar 20, 2019 6:33:25 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1343ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 0/ 8), 0.009: Loading model from ./gal.so
pins2lts-mc( 5/ 8), 0.010: library has no initializer
pins2lts-mc( 5/ 8), 0.010: loading model GAL
pins2lts-mc( 5/ 8), 0.010: completed loading model GAL
pins2lts-mc( 5/ 8), 0.010: LTL layer: formula: <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true)))))
pins2lts-mc( 5/ 8), 0.010: "<>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true)))))" is not a file, parsing as formula...
pins2lts-mc( 5/ 8), 0.010: Using Spin LTL semantics
pins2lts-mc( 2/ 8), 0.017: library has no initializer
pins2lts-mc( 2/ 8), 0.017: loading model GAL
pins2lts-mc( 2/ 8), 0.017: completed loading model GAL
pins2lts-mc( 6/ 8), 0.017: library has no initializer
pins2lts-mc( 6/ 8), 0.017: loading model GAL
pins2lts-mc( 6/ 8), 0.017: completed loading model GAL
pins2lts-mc( 7/ 8), 0.017: library has no initializer
pins2lts-mc( 7/ 8), 0.017: loading model GAL
pins2lts-mc( 7/ 8), 0.017: completed loading model GAL
pins2lts-mc( 4/ 8), 0.025: library has no initializer
pins2lts-mc( 4/ 8), 0.025: loading model GAL
pins2lts-mc( 4/ 8), 0.025: completed loading model GAL
pins2lts-mc( 1/ 8), 0.027: library has no initializer
pins2lts-mc( 1/ 8), 0.027: loading model GAL
pins2lts-mc( 1/ 8), 0.027: completed loading model GAL
pins2lts-mc( 3/ 8), 0.028: library has no initializer
pins2lts-mc( 3/ 8), 0.028: loading model GAL
pins2lts-mc( 3/ 8), 0.028: completed loading model GAL
pins2lts-mc( 0/ 8), 0.027: library has no initializer
pins2lts-mc( 0/ 8), 0.027: loading model GAL
pins2lts-mc( 0/ 8), 0.028: completed loading model GAL
pins2lts-mc( 0/ 8), 0.053: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc( 0/ 8), 0.127: DFS-FIFO for weak LTL, using special progress label 17
pins2lts-mc( 0/ 8), 0.127: There are 18 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 0.127: State length is 10, there are 11 groups
pins2lts-mc( 0/ 8), 0.127: Running dfsfifo using 8 cores
pins2lts-mc( 0/ 8), 0.127: Using a tree table with 2^27 elements
pins2lts-mc( 0/ 8), 0.127: Successor permutation: rr
pins2lts-mc( 0/ 8), 0.127: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc( 3/ 8), 2.396: ~1 levels ~960 states ~4824 transitions
pins2lts-mc( 3/ 8), 2.420: ~1 levels ~1920 states ~10224 transitions
pins2lts-mc( 3/ 8), 2.496: ~1 levels ~3840 states ~20752 transitions
pins2lts-mc( 3/ 8), 2.603: ~1 levels ~7680 states ~43976 transitions
pins2lts-mc( 3/ 8), 2.836: ~1 levels ~15360 states ~92120 transitions
pins2lts-mc( 3/ 8), 3.284: ~1 levels ~30720 states ~189248 transitions
pins2lts-mc( 6/ 8), 4.099: ~1 levels ~61440 states ~401256 transitions
pins2lts-mc( 6/ 8), 5.382: ~1 levels ~122880 states ~824952 transitions
pins2lts-mc( 2/ 8), 7.332: ~1 levels ~245760 states ~1677024 transitions
pins2lts-mc( 2/ 8), 10.423: ~1 levels ~491520 states ~3419512 transitions
pins2lts-mc( 5/ 8), 14.053: ~1 levels ~983040 states ~7310504 transitions
pins2lts-mc( 6/ 8), 19.262: ~1 levels ~1966080 states ~14215432 transitions
pins2lts-mc( 5/ 8), 23.661: ~1 levels ~3932160 states ~29711696 transitions
pins2lts-mc( 5/ 8), 30.763: ~1 levels ~7864320 states ~59824656 transitions
pins2lts-mc( 7/ 8), 51.461: ~1 levels ~15728640 states ~117783832 transitions
pins2lts-mc( 7/ 8), 81.232: ~1 levels ~31457280 states ~237348088 transitions
pins2lts-mc( 7/ 8), 138.880: ~1 levels ~62914560 states ~477155656 transitions
pins2lts-mc( 0/ 8), 259.949: ~1 levels ~125829120 states ~927959504 transitions
pins2lts-mc( 4/ 8), 312.723: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 312.752:
pins2lts-mc( 0/ 8), 312.752: mean standard work distribution: 2.9% (states) 2.4% (transitions)
pins2lts-mc( 0/ 8), 312.752:
pins2lts-mc( 0/ 8), 312.752: Explored 131757709 states 1006785446 transitions, fanout: 7.641
pins2lts-mc( 0/ 8), 312.752: Total exploration time 312.610 sec (312.540 sec minimum, 312.587 sec on average)
pins2lts-mc( 0/ 8), 312.752: States per second: 421476, Transitions per second: 3220580
pins2lts-mc( 0/ 8), 312.752:
pins2lts-mc( 0/ 8), 312.752: Progress states detected: 134217088
pins2lts-mc( 0/ 8), 312.752: Redundant explorations: -1.8326
pins2lts-mc( 0/ 8), 312.752:
pins2lts-mc( 0/ 8), 312.752: Queue width: 8B, total height: 5396126, memory: 41.17MB
pins2lts-mc( 0/ 8), 312.752: Tree memory: 1131.4MB, 8.8 B/state, compr.: 21.0%
pins2lts-mc( 0/ 8), 312.752: Tree fill ratio (roots/leafs): 99.0%/41.0%
pins2lts-mc( 0/ 8), 312.752: Stored 8 string chucks using 0MB
pins2lts-mc( 0/ 8), 312.752: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 312.752: Est. total memory use: 1172.6MB (~1065.2MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X([]((LTLAP3==true))))U([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC1024"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT4096DC1024, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r162-csrt-155286434200475"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC1024.tgz
mv SmallOperatingSystem-PT-MT4096DC1024 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;