About the Execution of ITS-Tools for SharedMemory-PT-000005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
291.590 | 3619.00 | 6775.00 | 136.20 | TTTFFTTFFTFTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/local/x2003239/mcc2019-input.r162-csrt-155286433900239.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is SharedMemory-PT-000005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r162-csrt-155286433900239
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 348K
-rw-r--r-- 1 mcc users 7.3K Feb 12 15:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 12 15:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 8 18:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 8 18:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 5.0K Feb 5 01:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 5 01:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 4 22:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 4 22:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Feb 4 17:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 31K Feb 4 17:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 1 14:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 30K Feb 1 14:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.2K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.7K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 7 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 82K Mar 10 17:31 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-00
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-01
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-02
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-03
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-04
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-05
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-06
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-07
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-08
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-09
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-10
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-11
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-12
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-13
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-14
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1553052639211
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1863,0.024525,5128,2,593,5,1830,6,0,222,1126,0
Converting to forward existential form...Done !
original formula: AX(((EX(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))) + !(((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1)))) + (((((Active_2>=1)||(Active_1>=1))||(Active_5>=1))||(Active_3>=1))||(Active_4>=1))))
=> equivalent forward existential formula: [(((EY(Init) * !((((((Active_2>=1)||(Active_1>=1))||(Active_5>=1))||(Active_3>=1))||(Active_4>=1)))) * !(!(((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))) * !(EX(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))))] = FALSE
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
(forward)formula 0,1,0.134964,7668,1,0,12,13801,13,3,1191,5630,7
FORMULA SharedMemory-PT-000005-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: ((((((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))&&((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))&&(!((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))) + (EF(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))) + ((EF((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1))) + AF((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1)))) * A((((((Active_2>=1)||(Active_1>=1))||(Active_5>=1))||(Active_3>=1))||(Active_4>=1)) U ((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))))
=> equivalent forward existential formula: ([FwdG((((Init * !((((((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))&&((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))&&(!((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))) * !(E(TRUE U ((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))) * !(E(TRUE U (((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1))))),!((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1))))] = FALSE * ([(FwdU(((Init * !((((((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))&&((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))&&(!((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))) * !(E(TRUE U ((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))),!(((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1))))) * (!((((((Active_2>=1)||(Active_1>=1))||(Active_5>=1))||(Active_3>=1))||(Active_4>=1))) * !(((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1))))))] = FALSE * [FwdG(((Init * !((((((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))&&((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))&&(!((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))) * !(E(TRUE U ((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))),!(((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))] = FALSE))
(forward)formula 1,1,0.211963,8724,1,0,15,17400,39,5,1303,9133,16
FORMULA SharedMemory-PT-000005-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (((EF((((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))&&((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1)))) + !(AF(((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))) + AG(((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1)))) + EG(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))
=> equivalent forward existential formula: [(FwdU(((Init * !(EG(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))) * !((E(TRUE U (((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))&&((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1)))) + !(!(EG(!(((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))))))),TRUE) * !(((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))))] = FALSE
(forward)formula 2,1,0.299169,11100,1,0,19,32562,47,7,1346,17073,20
FORMULA SharedMemory-PT-000005-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: ((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))
=> equivalent forward existential formula: [(Init * ((((((((((((((((((((Ext_Mem_Acc_4_1>=1)||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1)))] != FALSE
(forward)formula 3,0,0.302363,11364,1,0,20,32563,47,7,1346,17073,21
FORMULA SharedMemory-PT-000005-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EX(!(EF(((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))))
=> equivalent forward existential formula: [(EY(Init) * !(E(TRUE U ((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1))||((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))))))] != FALSE
(forward)formula 4,0,0.307184,11364,1,0,21,32612,48,7,1355,17156,24
FORMULA SharedMemory-PT-000005-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EX(EX(((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))
=> equivalent forward existential formula: [(EY(EY(Init)) * ((((((((((((((((((((((Ext_Bus>=1)&&(Memory_2>=1))&&(Queue_1>=1))||(((Ext_Bus>=1)&&(Queue_3>=1))&&(Memory_2>=1)))||(((Ext_Bus>=1)&&(Queue_4>=1))&&(Memory_2>=1)))||(((Queue_5>=1)&&(Memory_2>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_3>=1)))||(((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)))||(((Memory_1>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)))||(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||(((Queue_3>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Queue_5>=1)&&(Memory_4>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_2>=1)))||(((Ext_Bus>=1)&&(Memory_3>=1))&&(Queue_4>=1)))||(((Memory_3>=1)&&(Queue_5>=1))&&(Ext_Bus>=1)))||(((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1)))||(((Queue_1>=1)&&(Memory_5>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))))] != FALSE
(forward)formula 5,1,0.32005,11628,1,0,24,32955,48,8,1355,17522,25
FORMULA SharedMemory-PT-000005-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EG((((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1)))
=> equivalent forward existential formula: [FwdG(Init,(((((Active_2>=1)||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_5>=1)))] != FALSE
Hit Full ! (commute/partial/dont) 20/0/35
(forward)formula 6,1,0.341476,12156,1,0,24,34816,54,9,1419,20511,28
FORMULA SharedMemory-PT-000005-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: ((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1)))
=> equivalent forward existential formula: [(Init * ((((((OwnMemAcc_5>=1)&&(Memory_5>=1))||((OwnMemAcc_4>=1)&&(Memory_4>=1)))||((OwnMemAcc_1>=1)&&(Memory_1>=1)))||((OwnMemAcc_3>=1)&&(Memory_3>=1)))||((OwnMemAcc_2>=1)&&(Memory_2>=1))))] != FALSE
(forward)formula 7,0,0.343098,12420,1,0,25,34816,54,9,1419,20511,29
FORMULA SharedMemory-PT-000005-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1))
=> equivalent forward existential formula: [(Init * (((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))] != FALSE
(forward)formula 8,0,0.343592,12420,1,0,26,34824,55,9,1419,20511,30
FORMULA SharedMemory-PT-000005-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (EG(!((Ext_Mem_Acc_4_3>=1))) + (((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))
=> equivalent forward existential formula: ([FwdG(Init,!((Ext_Mem_Acc_4_3>=1)))] != FALSE + [(Init * (((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))] != FALSE)
Hit Full ! (commute/partial/dont) 53/0/2
(forward)formula 9,1,0.346715,12420,1,0,27,34886,63,10,1466,20773,34
FORMULA SharedMemory-PT-000005-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: !(EX(((Active_4>=1)||(Ext_Mem_Acc_2_5>=1))))
=> equivalent forward existential formula: [(EY(Init) * ((Active_4>=1)||(Ext_Mem_Acc_2_5>=1)))] = FALSE
(forward)formula 10,0,0.347403,12684,1,0,30,34919,64,11,1467,20812,35
FORMULA SharedMemory-PT-000005-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (Active_2>=1)
=> equivalent forward existential formula: [(Init * (Active_2>=1))] != FALSE
(forward)formula 11,1,0.34769,12684,1,0,31,34919,65,11,1467,20812,36
FORMULA SharedMemory-PT-000005-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (EG(((((Ext_Mem_Acc_4_5>=1)&&(Active_2>=1))||((((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1))&&(Ext_Mem_Acc_4_1>=1))) + AG((Ext_Mem_Acc_2_3>=1)))) * (AF((Active_1>=1)) + (E((((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)) U (((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1))) * !(AX((((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1)))))))
=> equivalent forward existential formula: ([(Init * !(EG(((((Ext_Mem_Acc_4_5>=1)&&(Active_2>=1))||((((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1))&&(Ext_Mem_Acc_4_1>=1))) + !(E(TRUE U !((Ext_Mem_Acc_2_3>=1))))))))] = FALSE * [FwdG((Init * !((E((((Ext_Bus>=1)&&(Memory_1>=1))&&(Queue_4>=1)) U (((Ext_Bus>=1)&&(Queue_1>=1))&&(Memory_3>=1))) * !(!(EX(!((((Memory_5>=1)&&(Queue_4>=1))&&(Ext_Bus>=1))))))))),!((Active_1>=1)))] = FALSE)
Hit Full ! (commute/partial/dont) 13/72/42
Using saturation style SCC detection
(forward)formula 12,0,0.365144,12948,1,0,43,37219,89,17,1649,22171,48
FORMULA SharedMemory-PT-000005-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: ((Ext_Mem_Acc_1_2>=1)||(Active_3>=1))
=> equivalent forward existential formula: [(Init * ((Ext_Mem_Acc_1_2>=1)||(Active_3>=1)))] != FALSE
(forward)formula 13,1,0.366252,13212,1,0,44,37232,90,17,1650,22171,49
FORMULA SharedMemory-PT-000005-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: AF(((((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)) + EX(!(((OwnMemAcc_5>=1)&&(Memory_5>=1))))))
=> equivalent forward existential formula: [FwdG(Init,!(((((Ext_Bus>=1)&&(Memory_4>=1))&&(Queue_1>=1)) + EX(!(((OwnMemAcc_5>=1)&&(Memory_5>=1)))))))] = FALSE
(forward)formula 14,1,0.368623,13476,1,0,47,37325,96,20,1650,22534,52
FORMULA SharedMemory-PT-000005-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: !(((A(((OwnMemAcc_3>=1)&&(Memory_3>=1)) U ((OwnMemAcc_3>=1)&&(Memory_3>=1))) + !(((((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1))&&(Ext_Mem_Acc_4_2>=1)))) * (AG(((((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))) + (((!(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||((((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))||(Ext_Mem_Acc_3_2>=1))) * EX((Ext_Mem_Acc_4_3>=1))))))
=> equivalent forward existential formula: (([(FwdU((Init * !(!(((((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1))&&(Ext_Mem_Acc_4_2>=1))))),!(((OwnMemAcc_3>=1)&&(Memory_3>=1)))) * (!(((OwnMemAcc_3>=1)&&(Memory_3>=1))) * !(((OwnMemAcc_3>=1)&&(Memory_3>=1)))))] != FALSE + [FwdG((Init * !(!(((((Ext_Bus>=1)&&(Memory_5>=1))&&(Queue_2>=1))&&(Ext_Mem_Acc_4_2>=1))))),!(((OwnMemAcc_3>=1)&&(Memory_3>=1))))] != FALSE) + [(FwdU((Init * !((((!(((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_4>=1)))||((((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1))||(Ext_Mem_Acc_3_2>=1))) * EX((Ext_Mem_Acc_4_3>=1))))),TRUE) * !(((((Ext_Bus>=1)&&(Queue_2>=1))&&(Memory_1>=1))||(((Memory_5>=1)&&(Queue_3>=1))&&(Ext_Bus>=1)))))] != FALSE)
(forward)formula 15,1,0.377634,13476,1,0,58,37953,115,26,1696,23476,61
FORMULA SharedMemory-PT-000005-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1553052642830
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 20, 2019 3:30:41 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 20, 2019 3:30:41 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 20, 2019 3:30:41 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 56 ms
Mar 20, 2019 3:30:41 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 41 places.
Mar 20, 2019 3:30:41 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 55 transitions.
Mar 20, 2019 3:30:41 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
Mar 20, 2019 3:30:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 53 ms
Mar 20, 2019 3:30:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 2 ms
Mar 20, 2019 3:30:42 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 4 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is SharedMemory-PT-000005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r162-csrt-155286433900239"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000005.tgz
mv SharedMemory-PT-000005 execution
cd execution
if [ "CTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "CTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;