About the Execution of ITS-Tools for ResAllocation-PT-R015C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
339.680 | 7671.00 | 15230.00 | 159.20 | TTFTFFFFTFFTTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2019-input.r151-ebro-155286406200107.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is ResAllocation-PT-R015C002, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r151-ebro-155286406200107
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 236K
-rw-r--r-- 1 mcc users 3.9K Feb 12 14:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 12 14:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 8 16:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 8 16:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.5K Feb 5 01:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 01:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K Feb 4 22:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 4 16:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 4 16:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 13:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K Feb 1 13:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 9 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 61K Mar 10 17:31 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-00
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-01
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-02
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-03
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-04
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-05
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-06
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-07
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-08
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-09
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-10
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-11
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-12
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-13
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-14
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1553107162416
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-00 with value :((p_0_5<=r_1_0)||((r_0_5>=3)&&(!(p_1_1<=r_1_0))))
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-01 with value :(!(r_1_9>=3))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-02 with value :(((p_0_2>=3)&&((r_0_5<=r_0_2)&&(p_0_6<=r_1_11)))&&(r_1_10>=3))
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-03 with value :(!(((r_1_2>=3)&&(p_0_11>=3))&&(!(r_1_12>=3))))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-04 with value :((!(p_1_3>=1))&&((p_1_1<=r_1_8)&&((p_0_3>=2)&&(p_0_5>=3))))
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-05 with value :((r_1_12>=1)||(((p_0_8<=r_1_14)||(p_1_5>=1))||(!(p_1_10>=1))))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-06 with value :(r_0_11>=2)
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-07 with value :(p_0_10>=2)
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-08 with value :((!((r_1_11<=r_1_12)&&(r_0_6>=3)))||((r_1_7<=p_1_8)&&(r_0_5>=1)))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-09 with value :(((r_0_14<=r_0_3)&&((r_1_1>=2)||(p_0_8>=2)))&&(p_1_14<=p_0_10))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-10 with value :(p_1_14>=3)
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-11 with value :(!(((p_1_5<=r_0_1)&&(p_0_9>=3))&&(!(r_1_8>=2))))
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-12 with value :(!(p_0_7>=2))
Read [invariant] property : ResAllocation-PT-R015C002-ReachabilityCardinality-13 with value :(!(r_0_11>=2))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-14 with value :((((p_1_1>=3)||(r_1_6>=3))||((r_0_6>=2)&&(r_0_14>=3)))&&((!(p_0_10>=3))||((p_0_8>=2)||(r_0_8>=1))))
Read [reachable] property : ResAllocation-PT-R015C002-ReachabilityCardinality-15 with value :(!(p_0_9<=r_1_6))
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation\_PT\_R015C002\_flat\_flat,278528,0.049156,4340,2,159,5,2921,6,0,275,3229,0
Total reachable state count : 278528
Verifying 16 reachability properties.
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-00 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-00,0,0.04999,4372,1,0,5,2921,7,0,285,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-01 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-01,0,0.050778,4544,1,0,5,2921,8,0,286,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-02 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-02
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-02,0,0.051407,4716,1,0,5,2921,9,0,295,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-03 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-03,0,0.051843,4716,1,0,5,2921,10,0,299,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-04 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-04
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-04,0,0.052426,4716,1,0,5,2921,11,0,304,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-05 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-05,64,0.05318,4716,2,67,6,2921,12,0,314,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-06 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-06
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-06,0,0.053376,4716,1,0,6,2921,13,0,315,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-07 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-07
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-07,0,0.053568,4716,1,0,6,2921,14,0,316,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-08 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-08,0,0.056904,4716,1,0,6,2921,15,0,328,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-09 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-09
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-09,0,0.057701,4716,1,0,6,2921,16,0,338,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-10 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-10,0,0.058028,4716,1,0,6,2921,17,0,339,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-11 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-11,0,0.058524,4716,1,0,6,2921,18,0,349,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-12 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-12,0,0.058773,4716,1,0,6,2921,19,0,350,3229,0
Invariant property ResAllocation-PT-R015C002-ReachabilityCardinality-13 is true.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-13,0,0.058985,4716,1,0,6,2921,19,0,350,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-14 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-14
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-14,0,0.059886,4716,1,0,6,2921,20,0,360,3229,0
Reachability property ResAllocation-PT-R015C002-ReachabilityCardinality-15 does not hold.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R015C002-ReachabilityCardinality-15
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R015C002-ReachabilityCardinality-15,0,0.067667,4716,1,0,6,2921,21,0,365,3229,0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 32 rows 60 cols
invariant :p_0_8 + r_0_8 + -1'r_1_8 = 0
invariant :p_1_7 + r_1_7 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 = 0
invariant :p_1_3 + r_1_3 = 1
invariant :p_0_13 + r_0_13 + -1'r_1_13 = 0
invariant :p_1_6 + r_1_6 = 1
invariant :p_0_7 + r_0_7 + -1'r_1_7 = 0
invariant :p_1_0 + r_1_0 = 1
invariant :p_1_14 + r_1_14 = 1
invariant :p_1_13 + r_1_13 = 1
invariant :p_1_12 + r_1_12 = 1
invariant :p_1_11 + r_1_11 = 1
invariant :p_0_5 + r_0_5 + -1'r_1_5 = 0
invariant :p_1_2 + r_1_2 = 1
invariant :p_0_12 + r_0_12 + -1'r_1_12 = 0
invariant :p_0_4 + r_0_4 + -1'r_1_4 = 0
invariant :p_1_5 + r_1_5 = 1
invariant :p_1_10 + r_1_10 = 1
invariant :p_0_11 + r_0_11 + -1'r_1_11 = 0
invariant :p_1_9 + r_1_9 = 1
invariant :p_0_14 + r_0_14 + -1'r_1_14 = 0
invariant :p_0_2 + r_0_2 + -1'r_1_2 = 0
invariant :p_0_6 + r_0_6 + -1'r_1_6 = 0
invariant :p_0_10 + r_0_10 + -1'r_1_10 = 0
invariant :p_1_4 + r_1_4 = 1
invariant :p_0_9 + r_0_9 + -1'r_1_9 = 0
invariant :p_1_1 + r_1_1 = 1
invariant :p_1_8 + r_1_8 = 1
invariant :p_0_3 + r_0_3 + -1'r_1_3 = 0
invariant :p_0_0 + r_0_0 + -1'r_1_0 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1553107170087
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 20, 2019 6:39:25 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 20, 2019 6:39:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 20, 2019 6:39:25 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 95 ms
Mar 20, 2019 6:39:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 places.
Mar 20, 2019 6:39:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 32 transitions.
Mar 20, 2019 6:39:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 109 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 30 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 5 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 21 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 32 transitions.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 32 transitions.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 0 in 422 ms.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 30 place invariants in 30 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 60 variables to be positive in 288 ms
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 32 transitions.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/32 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 32 transitions.
Mar 20, 2019 6:39:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:39:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 32 transitions.
Mar 20, 2019 6:39:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 1172 ms. Total solver calls (SAT/UNSAT): 60(45/15)
Mar 20, 2019 6:39:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 32 transitions.
Mar 20, 2019 6:39:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 71 ms. Total solver calls (SAT/UNSAT): 46(0/46)
Mar 20, 2019 6:39:29 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2872ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R015C002"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R015C002, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r151-ebro-155286406200107"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R015C002.tgz
mv ResAllocation-PT-R015C002 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;