Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2019-input.r151-ebro-155286406100061.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is ResAllocation-PT-R003C020, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r151-ebro-155286406100061
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 308K
-rw-r--r-- 1 mcc users 3.4K Feb 12 14:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 12 14:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 8 16:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 8 16:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.6K Feb 5 01:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 01:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.2K Feb 4 22:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 4 16:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 16:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Feb 1 12:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 1 12:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 9 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 138K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C020-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553105466896

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(G(F(G("((r_14_0>=1)&&(r_13_0>=1))"))))))
Formula 0 simplified : !GFG"((r_14_0>=1)&&(r_13_0>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 80 rows 120 cols
invariant :p_3_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_11_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_15_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_15_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_12_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_16_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_8_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_14_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_17_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_7_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_1_0 + r_1_0 + -1'r_2_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_8_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_14_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_15_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_19_1 + r_19_1 = 1
invariant :p_19_2 + r_19_2 = 1
invariant :p_9_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_6_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_7_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_16_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_18_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_12_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_6_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_13_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_3_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_4_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_13_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_10_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_10_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_5_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_2_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_2_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_14_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_17_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_16_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_13_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_9_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 + r_15_0 + -1'r_16_0 + r_17_0 + -1'r_18_0 + r_19_0 = 1
invariant :p_0_0 + r_0_0 + -1'r_1_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_4_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_5_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_11_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_17_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_10_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_19_0 + r_19_0 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 + -1'r_15_2 + r_16_2 + -1'r_17_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_18_2 + r_18_2 + -1'r_19_2 = 0
invariant :p_1_2 + r_1_2 + -1'r_2_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_9_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_12_0 + r_12_0 + -1'r_13_0 + r_14_0 + -1'r_15_0 + r_16_0 + -1'r_17_0 + r_18_0 + -1'r_19_0 = 0
invariant :p_18_1 + r_18_1 + -1'r_19_1 = 0
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 + r_15_1 + -1'r_16_1 + r_17_1 + -1'r_18_1 + r_19_1 = 1
invariant :p_11_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 + r_15_2 + -1'r_16_2 + r_17_2 + -1'r_18_2 + r_19_2 = 1
invariant :p_8_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 + -1'r_15_1 + r_16_1 + -1'r_17_1 + r_18_1 + -1'r_19_1 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2790 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 74 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([](<>([]((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 927 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1130 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 447 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 110 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(<>(<>((LTLAP4==true)))))U(X(((LTLAP5==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 213 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(([](X((LTLAP1==true))))U(<>([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 111 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 258 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X([](X([]((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 104 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([](<>((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 285 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 227 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X(<>((LTLAP12==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 161 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(((LTLAP13==true))U(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 158 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>(<>([]((LTLAP15==true)))))U(([]((LTLAP16==true)))U([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 307 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((((LTLAP7==true))U((LTLAP0==true)))U(X((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 78 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>(X((LTLAP18==true))))U([](((LTLAP19==true))U((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 270 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(<>((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 180 ms.
FORMULA ResAllocation-PT-R003C020-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553105485139

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 20, 2019 6:11:09 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 20, 2019 6:11:09 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 20, 2019 6:11:10 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 117 ms
Mar 20, 2019 6:11:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 120 places.
Mar 20, 2019 6:11:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 80 transitions.
Mar 20, 2019 6:11:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 23 ms
Mar 20, 2019 6:11:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 94 ms
Mar 20, 2019 6:11:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Mar 20, 2019 6:11:10 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 20, 2019 6:11:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 80 transitions.
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 60 place invariants in 47 ms
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 120 variables to be positive in 359 ms
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 80 transitions.
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/80 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 80 transitions.
Mar 20, 2019 6:11:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 20, 2019 6:11:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 80 transitions.
Mar 20, 2019 6:11:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/80) took 2017 ms. Total solver calls (SAT/UNSAT): 680(671/9)
Mar 20, 2019 6:11:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 4152 ms. Total solver calls (SAT/UNSAT): 1200(1170/30)
Mar 20, 2019 6:11:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 80 transitions.
Mar 20, 2019 6:11:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 275 ms. Total solver calls (SAT/UNSAT): 163(0/163)
Mar 20, 2019 6:11:16 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6175ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C020"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C020, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r151-ebro-155286406100061"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C020.tgz
mv ResAllocation-PT-R003C020 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;