Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r110-oct2-155272242300156.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3954
Executing tool win2018
Input is PermAdmissibility-PT-50, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r110-oct2-155272242300156
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 884K
-rw-r--r-- 1 mcc users 5.8K Feb 12 04:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 12 04:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 28K Feb 8 03:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 108K Feb 8 03:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 110 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 348 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 00:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 34K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 4 07:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 07:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 1 02:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 1 02:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 484K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553040240292

info: Time: 3600 - MCC
===========================================================================================
prep: translating PermAdmissibility-PT-50 Petri net model.pnml into LoLA format
===========================================================================================
prep: translating PT Petri net complete
prep: check for too many tokens
===========================================================================================
prep: translating PermAdmissibility-PT-50 formula LTLFireability into LoLA format
===========================================================================================
prep: translating PT formula complete
vrfy: Checking LTLFireability @ PermAdmissibility-PT-50 @ 3570 seconds
lola: LoLA will run for 3570 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: Size of bit vector: 5376
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-50-LTLFireability.task
lola: A ((F ((FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4))) U G (((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)) U (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6)))))) : A (X (F (X (((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) U (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))))))) : A (G (F (G (X (X ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)))))))) : A ((X (F (G ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))))) U (FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)))) : A (X (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIREABLE(switch5_5_3))))) : A ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))) : A (G ((X (G ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIREABLE(switch5_5_3)))) U ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7)) U (FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(switch12_7_4) OR FIREABLE(switch12_6_4) OR FIREABLE(switch12_5_4) OR FIREABLE(switch12_4_5) OR FIREABLE(switch12_3_5) OR FIREABLE(switch12_2_5) OR FIREABLE(switch12_1_5) OR FIREABLE(switch12_7_7) OR FIREABLE(switch12_5_7) OR FIREABLE(switch12_6_7) OR FIREABLE(switch12_7_6) OR FIREABLE(switch12_0_7) OR FIREABLE(switch12_5_6) OR FIREABLE(switch12_6_6) OR FIREABLE(switch12_3_7) OR FIREABLE(switch12_4_7) OR FIREABLE(switch12_1_7) OR FIREABLE(switch12_2_7) OR FIREABLE(switch12_6_1) OR FIREABLE(switch12_5_1) OR FIREABLE(switch12_0_2) OR FIREABLE(switch12_7_1) OR FIREABLE(switch12_2_2) OR FIREABLE(switch12_1_2) OR FIREABLE(switch12_4_2) OR FIREABLE(switch12_3_2) OR FIREABLE(switch12_6_0) OR FIREABLE(switch12_5_0) OR FIREABLE(switch12_0_1) OR FIREABLE(switch12_7_0) OR FIREABLE(switch12_2_1) OR FIREABLE(switch12_1_1) OR FIREABLE(switch12_4_1) OR FIREABLE(switch12_3_1) OR FIREABLE(switch12_5_3) OR FIREABLE(switch12_6_3) OR FIREABLE(switch12_7_3) OR FIREABLE(switch12_0_4) OR FIREABLE(switch12_1_4) OR FIREABLE(switch12_2_4) OR FIREABLE(switch12_3_4) OR FIREABLE(switch12_4_4) OR FIREABLE(switch12_5_2) OR FIREABLE(switch12_6_2) OR FIREABLE(switch12_7_2) OR FIREABLE(switch12_0_3) OR FIREABLE(switch12_1_3) OR FIREABLE(switch12_2_3) OR FIREABLE(switch12_3_3) OR FIREABLE(switch12_4_3)))))) : A (((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) U F (F (G ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(switch12_7_4) OR FIREABLE(switch12_6_4) OR FIREABLE(switch12_5_4) OR FIREABLE(switch12_4_5) OR FIREABLE(switch12_3_5) OR FIREABLE(switch12_2_5) OR FIREABLE(switch12_1_5) OR FIREABLE(switch12_7_7) OR FIREABLE(switch12_5_7) OR FIREABLE(switch12_6_7) OR FIREABLE(switch12_7_6) OR FIREABLE(switch12_0_7) OR FIREABLE(switch12_5_6) OR FIREABLE(switch12_6_6) OR FIREABLE(switch12_3_7) OR FIREABLE(switch12_4_7) OR FIREABLE(switch12_1_7) OR FIREABLE(switch12_2_7) OR FIREABLE(switch12_6_1) OR FIREABLE(switch12_5_1) OR FIREABLE(switch12_0_2) OR FIREABLE(switch12_7_1) OR FIREABLE(switch12_2_2) OR FIREABLE(switch12_1_2) OR FIREABLE(switch12_4_2) OR FIREABLE(switch12_3_2) OR FIREABLE(switch12_6_0) OR FIREABLE(switch12_5_0) OR FIREABLE(switch12_0_1) OR FIREABLE(switch12_7_0) OR FIREABLE(switch12_2_1) OR FIREABLE(switch12_1_1) OR FIREABLE(switch12_4_1) OR FIREABLE(switch12_3_1) OR FIREABLE(switch12_5_3) OR FIREABLE(switch12_6_3) OR FIREABLE(switch12_7_3) OR FIREABLE(switch12_0_4) OR FIREABLE(switch12_1_4) OR FIREABLE(switch12_2_4) OR FIREABLE(switch12_3_4) OR FIREABLE(switch12_4_4) OR FIREABLE(switch12_5_2) OR FIREABLE(switch12_6_2) OR FIREABLE(switch12_7_2) OR FIREABLE(switch12_0_3) OR FIREABLE(switch12_1_3) OR FIREABLE(switch12_2_3) OR FIREABLE(switch12_3_3) OR FIREABLE(switch12_4_3))))))) : A ((G (G (F (FIREABLE(switch11_3_0)))) U G (F (X (FIREABLE(switch10_2_3)))))) : A (X (FIREABLE(switch10_0_5))) : A (X (X (FIREABLE(switch12_0_5)))) : A (FIREABLE(switch10_5_0)) : A (G (FIREABLE(display3_5_6))) : A (FIREABLE(display4_6_7)) : A (FIREABLE(switch5_1_2)) : A (G (G (FIREABLE(switch11_3_6))))
lola: rewrite Frontend/Parser/formula_rewrite.k:437
lola: rewrite Frontend/Parser/formula_rewrite.k:522
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:434
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:374
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:428
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:437
lola: rewrite Frontend/Parser/formula_rewrite.k:434
lola: rewrite Frontend/Parser/formula_rewrite.k:522
lola: rewrite Frontend/Parser/formula_rewrite.k:545
lola: rewrite Frontend/Parser/formula_rewrite.k:347
lola: rewrite Frontend/Parser/formula_rewrite.k:422
lola: rewrite Frontend/Parser/formula_rewrite.k:350
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:377
lola: rewrite Frontend/Parser/formula_rewrite.k:431
lola: rewrite Frontend/Parser/formula_rewrite.k:371
lola: rewrite Frontend/Parser/formula_rewrite.k:522
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:350
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 223 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(... (shortened)
lola: processed formula length: 413
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges

FORMULA PermAdmissibility-PT-50-LTLFireability-5 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 1 will run for 238 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FIREABLE(switch10_5_0)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FIREABLE(switch10_5_0)
lola: processed formula length: 22
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: ========================================
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 2 will run for 255 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FIREABLE(display4_6_7)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FIREABLE(display4_6_7)
lola: processed formula length: 22
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FIREABLE(switch5_1_2)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FIREABLE(switch5_1_2)
lola: processed formula length: 21
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 4 will run for 297 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (FIREABLE(switch10_0_5)))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (FIREABLE(switch10_0_5)))
lola: processed formula length: 30
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 3 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-9 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 5 will run for 324 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (X (FIREABLE(switch12_0_5))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (X (FIREABLE(switch12_0_5))))
lola: processed formula length: 34
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 6 will run for 357 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR ... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR ... (shortened)
lola: processed formula length: 425
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-4 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 7 will run for 396 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (X (F ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (X (F ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))))))
lola: processed formula length: 117
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 3 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: LTL model checker
lola: The net satisfies the given formula (language of the product automaton is empty).
lola: 227222 markings, 353396 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-1 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 8 will run for 446 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(sw... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 8 will run for 446 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: processed formula length: 1737
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: 701648 markings, 998635 edges, 140330 markings/sec, 0 secs
lola: 1344222 markings, 1983508 edges, 128515 markings/sec, 5 secs
lola: 1989897 markings, 2993737 edges, 129135 markings/sec, 10 secs
lola: 2632773 markings, 4011655 edges, 128575 markings/sec, 15 secs
lola: 3245614 markings, 5017817 edges, 122568 markings/sec, 20 secs
lola: 3884910 markings, 6044491 edges, 127859 markings/sec, 25 secs
lola: 4488257 markings, 7048770 edges, 120669 markings/sec, 30 secs
lola: 5116918 markings, 8088657 edges, 125732 markings/sec, 35 secs
lola: 5705938 markings, 9055306 edges, 117804 markings/sec, 40 secs
lola: 6280794 markings, 10029828 edges, 114971 markings/sec, 45 secs
lola: 6869710 markings, 11024429 edges, 117783 markings/sec, 50 secs
lola: 7464208 markings, 12020903 edges, 118900 markings/sec, 55 secs
lola: 8030373 markings, 12974820 edges, 113233 markings/sec, 60 secs
lola: 8605126 markings, 13963993 edges, 114951 markings/sec, 65 secs
lola: 9184819 markings, 14968241 edges, 115939 markings/sec, 70 secs
lola: 9781699 markings, 15985074 edges, 119376 markings/sec, 75 secs
lola: 10374462 markings, 16983151 edges, 118553 markings/sec, 80 secs
lola: 10948142 markings, 17967128 edges, 114736 markings/sec, 85 secs
lola: 11514775 markings, 18957274 edges, 113327 markings/sec, 90 secs
lola: 12077324 markings, 19953261 edges, 112510 markings/sec, 95 secs
lola: 12681493 markings, 20993147 edges, 120834 markings/sec, 100 secs
lola: 13278032 markings, 22038366 edges, 119308 markings/sec, 105 secs
lola: 13875913 markings, 23041403 edges, 119576 markings/sec, 110 secs
lola: 14448422 markings, 24048720 edges, 114502 markings/sec, 115 secs
lola: 15004567 markings, 25025245 edges, 111229 markings/sec, 120 secs
lola: 15559360 markings, 26010351 edges, 110959 markings/sec, 125 secs
lola: 16112685 markings, 26996459 edges, 110665 markings/sec, 130 secs
lola: 16690814 markings, 28009795 edges, 115626 markings/sec, 135 secs
lola: 17267384 markings, 29037332 edges, 115314 markings/sec, 140 secs
lola: 17840966 markings, 30027996 edges, 114716 markings/sec, 145 secs
lola: 18410799 markings, 31007775 edges, 113967 markings/sec, 150 secs
lola: 18970611 markings, 31994038 edges, 111962 markings/sec, 155 secs
lola: 19524946 markings, 32986675 edges, 110867 markings/sec, 160 secs
lola: 20078478 markings, 33982653 edges, 110706 markings/sec, 165 secs
lola: 20627857 markings, 34973300 edges, 109876 markings/sec, 170 secs
lola: 21179855 markings, 35980633 edges, 110400 markings/sec, 175 secs
lola: 21767150 markings, 37011334 edges, 117459 markings/sec, 180 secs
lola: 22349337 markings, 38051727 edges, 116437 markings/sec, 185 secs
lola: 22899832 markings, 39050522 edges, 110099 markings/sec, 190 secs
lola: 23493253 markings, 40048344 edges, 118684 markings/sec, 195 secs
lola: 24060105 markings, 41044675 edges, 113370 markings/sec, 200 secs
lola: 24614854 markings, 42040370 edges, 110950 markings/sec, 205 secs
lola: 25161463 markings, 43042048 edges, 109322 markings/sec, 210 secs
lola: 25717314 markings, 44048392 edges, 111170 markings/sec, 215 secs
lola: 26269583 markings, 45050064 edges, 110454 markings/sec, 220 secs
lola: 26821509 markings, 46055917 edges, 110385 markings/sec, 225 secs
lola: 27387579 markings, 47090001 edges, 113214 markings/sec, 230 secs
lola: 27964444 markings, 48125278 edges, 115373 markings/sec, 235 secs
lola: 28542068 markings, 49169013 edges, 115525 markings/sec, 240 secs
lola: 29104539 markings, 50190715 edges, 112494 markings/sec, 245 secs
lola: 29682422 markings, 51185921 edges, 115577 markings/sec, 250 secs
lola: 30253899 markings, 52189022 edges, 114295 markings/sec, 255 secs
lola: 30810740 markings, 53200912 edges, 111368 markings/sec, 260 secs
lola: 31367220 markings, 54201142 edges, 111296 markings/sec, 265 secs
lola: 31918666 markings, 55217189 edges, 110289 markings/sec, 270 secs
lola: 32440680 markings, 56176088 edges, 104403 markings/sec, 275 secs
lola: 32986865 markings, 57179628 edges, 109237 markings/sec, 280 secs
lola: 33533641 markings, 58183401 edges, 109355 markings/sec, 285 secs
lola: 34083817 markings, 59193078 edges, 110035 markings/sec, 290 secs
lola: 34634527 markings, 60216372 edges, 110142 markings/sec, 295 secs
lola: 35221469 markings, 61276683 edges, 117388 markings/sec, 300 secs
lola: 35797351 markings, 62324546 edges, 115176 markings/sec, 305 secs
lola: 36362640 markings, 63360056 edges, 113058 markings/sec, 310 secs
lola: 36919365 markings, 64375178 edges, 111345 markings/sec, 315 secs
lola: 37501041 markings, 65390662 edges, 116335 markings/sec, 320 secs
lola: 38081891 markings, 66405186 edges, 116170 markings/sec, 325 secs
lola: 38645292 markings, 67430684 edges, 112680 markings/sec, 330 secs
lola: 39205001 markings, 68453699 edges, 111942 markings/sec, 335 secs
lola: 39758489 markings, 69478724 edges, 110698 markings/sec, 340 secs
lola: 40307851 markings, 70492777 edges, 109872 markings/sec, 345 secs
lola: 40855617 markings, 71501120 edges, 109553 markings/sec, 350 secs
lola: 41402815 markings, 72522951 edges, 109440 markings/sec, 355 secs
lola: 41944322 markings, 73538823 edges, 108301 markings/sec, 360 secs
lola: 42498847 markings, 74555804 edges, 110905 markings/sec, 365 secs
lola: 43053131 markings, 75594424 edges, 110857 markings/sec, 370 secs
lola: 43619677 markings, 76642176 edges, 113309 markings/sec, 375 secs
lola: 44175843 markings, 77662212 edges, 111233 markings/sec, 380 secs
lola: 44715879 markings, 78657365 edges, 108007 markings/sec, 385 secs
lola: 45280190 markings, 79693493 edges, 112862 markings/sec, 390 secs
lola: 45819954 markings, 80691754 edges, 107953 markings/sec, 395 secs
lola: 46347068 markings, 81677114 edges, 105423 markings/sec, 400 secs
lola: 46922166 markings, 82657888 edges, 115020 markings/sec, 405 secs
lola: 47472446 markings, 83638034 edges, 110056 markings/sec, 410 secs
lola: 48019231 markings, 84626049 edges, 109357 markings/sec, 415 secs
lola: 48554747 markings, 85617979 edges, 107103 markings/sec, 420 secs
lola: 49089206 markings, 86607954 edges, 106892 markings/sec, 425 secs
lola: 49625310 markings, 87600527 edges, 107221 markings/sec, 430 secs
lola: 50148474 markings, 88597891 edges, 104633 markings/sec, 435 secs
lola: 50684588 markings, 89581660 edges, 107223 markings/sec, 440 secs
lola: local time limit reached - aborting
lola:
preliminary result: unknown yes unknown unknown no no unknown unknown unknown no no no unknown no no unknown
lola: caught signal User defined signal 1 - aborting LoLA
lola:
preliminary result: unknown yes unknown unknown no no unknown unknown unknown no no no unknown no no unknown
lola: memory consumption: 15428 KB
lola: time consumption: 447 seconds
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 9 will run for 446 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (FIREABLE(display3_5_6)))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G (FIREABLE(display3_5_6)))
lola: processed formula length: 30
lola: 33 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: NOT FIREABLE(display3_5_6)
lola: state equation: Generated DNF with 3 literals and 3 conjunctive subformulas
lola: 0 markings, 0 edges
lola: state equation: write sara problem file to PermAdmissibility-PT-50-LTLFireability-9-0.sara
lola: state equation: calling and running sara
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 10 will run for 520 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (FIREABLE(switch11_3_6)))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G (FIREABLE(switch11_3_6)))
lola: processed formula length: 30
lola: 33 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: NOT FIREABLE(switch11_3_6)
lola: state equation: Generated DNF with 3 literals and 3 conjunctive subformulas
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 0 markings, 0 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 11 will run for 624 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A ((G (F (FIREABLE(switch10_2_3))) OR G ((F (FIREABLE(switch11_3_0)) AND F (FIREABLE(switch10_2_3))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A ((G (F (FIREABLE(switch10_2_3))) OR G ((F (FIREABLE(switch11_3_0)) AND F (FIREABLE(switch10_2_3))))))
lola: processed formula length: 103
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 6 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-8 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 12 will run for 780 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F (G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (F (G ((FIREABLE(switch2_1_4) OR FIREABLE(switch2_0_5) OR FIREABLE(switch2_1_5) OR FIREABLE(switch2_0_4)))))
lola: processed formula length: 113
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 803 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-2 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 13 will run for 1041 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F (G ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (F (G ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: processed formula length: 1737
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
sara: try reading problem file PermAdmissibility-PT-50-LTLFireability-9-0.sara.
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 803 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-7 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 14 will run for 1561 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A ((F ((FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4))) U G ((F ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))) AND ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(d... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A ((F ((FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4))) U G ((F ((FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6))) AND ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(d... (shortened)
lola: processed formula length: 2062
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 6 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-0 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 15 will run for 3123 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10... (shortened)
lola: processed formula length: 5204
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-3 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: ...considering subproblem: (A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(sw... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: ========================================
lola: ...considering subproblem: A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (G (F ((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(swi... (shortened)
lola: processed formula length: 1737
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
sara: place or transition ordering is non-deterministic

lola: 695232 markings, 988829 edges, 139046 markings/sec, 0 secs
lola: 1333250 markings, 1965141 edges, 127604 markings/sec, 5 secs
lola: 1959145 markings, 2943143 edges, 125179 markings/sec, 10 secs
lola: 2580755 markings, 3930056 edges, 124322 markings/sec, 15 secs
lola: 3176069 markings, 4900340 edges, 119063 markings/sec, 20 secs
lola: 3792563 markings, 5894662 edges, 123299 markings/sec, 25 secs
lola: 4384792 markings, 6872213 edges, 118446 markings/sec, 30 secs
lola: 4986190 markings, 7871690 edges, 120280 markings/sec, 35 secs
lola: 5589651 markings, 8864224 edges, 120692 markings/sec, 40 secs
lola: 6171351 markings, 9848596 edges, 116340 markings/sec, 45 secs
lola: 6758284 markings, 10839940 edges, 117387 markings/sec, 50 secs
lola: 7354686 markings, 11854863 edges, 119280 markings/sec, 55 secs
lola: 7952087 markings, 12839151 edges, 119480 markings/sec, 60 secs
lola: 8522752 markings, 13824415 edges, 114133 markings/sec, 65 secs
lola: 9094834 markings, 14819465 edges, 114416 markings/sec, 70 secs
lola: 9703910 markings, 15852241 edges, 121815 markings/sec, 75 secs
lola: 10295752 markings, 16844832 edges, 118368 markings/sec, 80 secs
lola: 10872817 markings, 17839909 edges, 115413 markings/sec, 85 secs
lola: 11434752 markings, 18823883 edges, 112387 markings/sec, 90 secs
lola: 11993795 markings, 19799585 edges, 111809 markings/sec, 95 secs
lola: 12576145 markings, 20810947 edges, 116470 markings/sec, 100 secs
lola: 13154701 markings, 21823204 edges, 115711 markings/sec, 105 secs
lola: 13735096 markings, 22801038 edges, 116079 markings/sec, 110 secs
lola: 14303737 markings, 23790443 edges, 113728 markings/sec, 115 secs
lola: 14857125 markings, 24764626 edges, 110678 markings/sec, 120 secs
lola: 15402105 markings, 25735023 edges, 108996 markings/sec, 125 secs
lola: 15948763 markings, 26704835 edges, 109332 markings/sec, 130 secs
lola: 16515242 markings, 27704447 edges, 113296 markings/sec, 135 secs
lola: 17083035 markings, 28706068 edges, 113559 markings/sec, 140 secs
lola: 17633117 markings, 29687401 edges, 110016 markings/sec, 145 secs
lola: 18209852 markings, 30655225 edges, 115347 markings/sec, 150 secs
lola: 18763459 markings, 31629195 edges, 110721 markings/sec, 155 secs
lola: 19307911 markings, 32593564 edges, 108890 markings/sec, 160 secs
lola: 19842597 markings, 33568472 edges, 106937 markings/sec, 165 secs
lola: 20380897 markings, 34527329 edges, 107660 markings/sec, 170 secs
lola: 20913164 markings, 35496954 edges, 106453 markings/sec, 175 secs
lola: 21469958 markings, 36485598 edges, 111359 markings/sec, 180 secs
lola: 22026763 markings, 37474054 edges, 111361 markings/sec, 185 secs
lola: 22579018 markings, 38464062 edges, 110451 markings/sec, 190 secs
lola: 23133170 markings, 39430000 edges, 110830 markings/sec, 195 secs
lola: 23688008 markings, 40389865 edges, 110968 markings/sec, 200 secs
lola: 24232772 markings, 41353536 edges, 108953 markings/sec, 205 secs
lola: 24764086 markings, 42327271 edges, 106263 markings/sec, 210 secs
lola: 25298990 markings, 43280890 edges, 106981 markings/sec, 215 secs
lola: 25827256 markings, 44244413 edges, 105653 markings/sec, 220 secs
lola: 26351544 markings, 45204731 edges, 104858 markings/sec, 225 secs
lola: 26876291 markings, 46161179 edges, 104949 markings/sec, 230 secs
lola: 27417361 markings, 47140649 edges, 108214 markings/sec, 235 secs
lola: 27964583 markings, 48125569 edges, 109444 markings/sec, 240 secs
lola: 28527764 markings, 49142439 edges, 112636 markings/sec, 245 secs
lola: 29075289 markings, 50144130 edges, 109505 markings/sec, 250 secs
lola: 29630856 markings, 51100535 edges, 111113 markings/sec, 255 secs
lola: 30193325 markings, 52078552 edges, 112494 markings/sec, 260 secs
lola: 30733056 markings, 53052072 edges, 107946 markings/sec, 265 secs
lola: 31279391 markings, 54042767 edges, 109267 markings/sec, 270 secs
lola: 31819282 markings, 55026938 edges, 107978 markings/sec, 275 secs
lola: 32349030 markings, 55996258 edges, 105950 markings/sec, 280 secs
lola: 32874813 markings, 56965564 edges, 105157 markings/sec, 285 secs
lola: 33412016 markings, 57960869 edges, 107441 markings/sec, 290 secs
lola: 33947589 markings, 58957058 edges, 107115 markings/sec, 295 secs
lola: 34490961 markings, 59950049 edges, 108674 markings/sec, 300 secs
lola: 35070727 markings, 60999198 edges, 115953 markings/sec, 305 secs
lola: 35626547 markings, 62005340 edges, 111164 markings/sec, 310 secs
lola: 36192978 markings, 63048210 edges, 113286 markings/sec, 315 secs
lola: 36737296 markings, 64052926 edges, 108864 markings/sec, 320 secs
lola: 37295227 markings, 65048010 edges, 111586 markings/sec, 325 secs
lola: 37868329 markings, 66028052 edges, 114620 markings/sec, 330 secs
lola: 38424661 markings, 67025176 edges, 111266 markings/sec, 335 secs
lola: 38965479 markings, 68019792 edges, 108164 markings/sec, 340 secs
lola: 39504344 markings, 69014948 edges, 107773 markings/sec, 345 secs
lola: 40040323 markings, 70003915 edges, 107196 markings/sec, 350 secs
lola: 40577951 markings, 70990662 edges, 107526 markings/sec, 355 secs
lola: 41116401 markings, 71986593 edges, 107690 markings/sec, 360 secs
lola: 41653497 markings, 72992565 edges, 107419 markings/sec, 365 secs
lola: 42155137 markings, 73917270 edges, 100328 markings/sec, 370 secs
lola: 42655932 markings, 74866656 edges, 100159 markings/sec, 375 secs
lola: 43190500 markings, 75845128 edges, 106914 markings/sec, 380 secs
lola: 43757023 markings, 76890094 edges, 113305 markings/sec, 385 secs
lola: 44316683 markings, 77908445 edges, 111932 markings/sec, 390 secs
lola: 44870572 markings, 78940046 edges, 110778 markings/sec, 395 secs
lola: 45412640 markings, 79945539 edges, 108414 markings/sec, 400 secs
lola: 45945636 markings, 80935260 edges, 106599 markings/sec, 405 secs
lola: 46468311 markings, 81916888 edges, 104535 markings/sec, 410 secs
lola: 47041111 markings, 82867103 edges, 114560 markings/sec, 415 secs
lola: 47589057 markings, 83847639 edges, 109589 markings/sec, 420 secs
lola: 48131935 markings, 84843220 edges, 108576 markings/sec, 425 secs
lola: 48667799 markings, 85824614 edges, 107173 markings/sec, 430 secs
lola: 49196748 markings, 86808473 edges, 105790 markings/sec, 435 secs
lola: 49722424 markings, 87789282 edges, 105135 markings/sec, 440 secs
lola: 50251878 markings, 88771652 edges, 105891 markings/sec, 445 secs
lola: 50772239 markings, 89752548 edges, 104072 markings/sec, 450 secs
lola: 51306033 markings, 90742534 edges, 106759 markings/sec, 455 secs
lola: 51835135 markings, 91744259 edges, 105820 markings/sec, 460 secs
lola: 52363570 markings, 92750499 edges, 105687 markings/sec, 465 secs
lola: 52901211 markings, 93738941 edges, 107528 markings/sec, 470 secs
lola: 53432725 markings, 94748199 edges, 106303 markings/sec, 475 secs
lola: 53961933 markings, 95747836 edges, 105842 markings/sec, 480 secs
lola: 54535778 markings, 96791792 edges, 114769 markings/sec, 485 secs
lola: 55078318 markings, 97792710 edges, 108508 markings/sec, 490 secs
lola: 55633494 markings, 98834087 edges, 111035 markings/sec, 495 secs
lola: 56186528 markings, 99863219 edges, 110607 markings/sec, 500 secs
lola: 56724379 markings, 100870073 edges, 107570 markings/sec, 505 secs
lola: 57252825 markings, 101853418 edges, 105689 markings/sec, 510 secs
lola: 57806457 markings, 102843189 edges, 110726 markings/sec, 515 secs
lola: 58368965 markings, 103820890 edges, 112502 markings/sec, 520 secs
lola: 58914160 markings, 104808867 edges, 109039 markings/sec, 525 secs
lola: 59450557 markings, 105804140 edges, 107279 markings/sec, 530 secs
lola: 59983800 markings, 106795332 edges, 106649 markings/sec, 535 secs
lola: 60515684 markings, 107783575 edges, 106377 markings/sec, 540 secs
lola: 61049157 markings, 108777735 edges, 106695 markings/sec, 545 secs
lola: 61573467 markings, 109764506 edges, 104862 markings/sec, 550 secs
lola: 62092126 markings, 110762394 edges, 103732 markings/sec, 555 secs
lola: 62625305 markings, 111746636 edges, 106636 markings/sec, 560 secs
lola: 63154226 markings, 112748281 edges, 105784 markings/sec, 565 secs
lola: 63669493 markings, 113737302 edges, 103053 markings/sec, 570 secs
lola: 64210563 markings, 114736525 edges, 108214 markings/sec, 575 secs
lola: 64735381 markings, 115734729 edges, 104964 markings/sec, 580 secs
lola: 65262319 markings, 116733801 edges, 105388 markings/sec, 585 secs
lola: 65794431 markings, 117749897 edges, 106422 markings/sec, 590 secs
lola: 66316646 markings, 118742491 edges, 104443 markings/sec, 595 secs
lola: 66890067 markings, 119804392 edges, 114684 markings/sec, 600 secs
lola: 67431801 markings, 120814600 edges, 108347 markings/sec, 605 secs
lola: 67963546 markings, 121797828 edges, 106349 markings/sec, 610 secs
lola: 68512953 markings, 122847669 edges, 109881 markings/sec, 615 secs
lola: 69058360 markings, 123869669 edges, 109081 markings/sec, 620 secs
lola: 69586555 markings, 124877010 edges, 105639 markings/sec, 625 secs
lola: 70114929 markings, 125880932 edges, 105675 markings/sec, 630 secs
lola: 70636672 markings, 126868997 edges, 104349 markings/sec, 635 secs
lola: 71223782 markings, 127844526 edges, 117422 markings/sec, 640 secs
lola: 71778185 markings, 128837058 edges, 110881 markings/sec, 645 secs
lola: 72275921 markings, 129754276 edges, 99547 markings/sec, 650 secs
lola: 72324826 markings, 129847344 edges, 9781 markings/sec, 655 secs
lola: Child process aborted or communication problem between parent and child process
lola: ========================================
lola: ...considering subproblem: A (G ((X (G ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) ... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (G ((X (G ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) ... (shortened)
lola: processed formula length: 3890
lola: 31 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 5 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: The Boolean predicate is false.
lola: ========================================

FORMULA PermAdmissibility-PT-50-LTLFireability-6 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: RESULT
lola:
SUMMARY: no yes no no no no no no no no no no no no no no
lola:
preliminary result: no yes no no no no no no no no no no no no no no
lola: memory consumption: 14620 KB
lola: time consumption: 1110 seconds

BK_STOP 1553041350641

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-50"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="win2018"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool win2018"
echo " Input is PermAdmissibility-PT-50, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r110-oct2-155272242300156"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-50.tgz
mv PermAdmissibility-PT-50 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;