Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272231200565.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is Peterson-PT-6, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272231200565
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.2M
-rw-r--r-- 1 mcc users 65K Feb 12 04:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 180K Feb 12 04:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 54K Feb 8 03:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 176K Feb 8 03:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 100 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 338 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 47K Feb 5 00:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 117K Feb 5 00:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 32K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 111K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 125K Feb 4 08:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 331K Feb 4 08:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 83K Feb 1 02:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 274K Feb 1 02:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 27K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 54K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 1.5M Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-6-LTLFireability-00
FORMULA_NAME Peterson-PT-6-LTLFireability-01
FORMULA_NAME Peterson-PT-6-LTLFireability-02
FORMULA_NAME Peterson-PT-6-LTLFireability-03
FORMULA_NAME Peterson-PT-6-LTLFireability-04
FORMULA_NAME Peterson-PT-6-LTLFireability-05
FORMULA_NAME Peterson-PT-6-LTLFireability-06
FORMULA_NAME Peterson-PT-6-LTLFireability-07
FORMULA_NAME Peterson-PT-6-LTLFireability-08
FORMULA_NAME Peterson-PT-6-LTLFireability-09
FORMULA_NAME Peterson-PT-6-LTLFireability-10
FORMULA_NAME Peterson-PT-6-LTLFireability-11
FORMULA_NAME Peterson-PT-6-LTLFireability-12
FORMULA_NAME Peterson-PT-6-LTLFireability-13
FORMULA_NAME Peterson-PT-6-LTLFireability-14
FORMULA_NAME Peterson-PT-6-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552939319159

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0>=1)||(IsEndLoop_2_0_4>=1))||(IsEndLoop_1_0_4>=1))||(IsEndLoop_4_0_4>=1))||(IsEndLoop_3_0_4>=1))||(IsEndLoop_5_0_3>=1))||(IsEndLoop_4_0_3>=1))||(IsEndLoop_0_0_4>=1))||(IsEndLoop_6_0_3>=1))||(IsEndLoop_1_0_3>=1))||(IsEndLoop_0_0_3>=1))||(IsEndLoop_3_0_3>=1))||(IsEndLoop_2_0_3>=1))||(IsEndLoop_4_0_2>=1))||(IsEndLoop_3_0_2>=1))||(IsEndLoop_6_0_2>=1))||(IsEndLoop_5_0_2>=1))||(IsEndLoop_6_0_1>=1))||(IsEndLoop_0_0_2>=1))||(IsEndLoop_1_0_2>=1))||(IsEndLoop_2_0_2>=1))||(IsEndLoop_2_0_1>=1))||(IsEndLoop_3_0_1>=1))||(IsEndLoop_4_0_1>=1))||(IsEndLoop_5_0_1>=1))||(IsEndLoop_5_0_0>=1))||(IsEndLoop_6_0_0>=1))||(IsEndLoop_0_0_1>=1))||(IsEndLoop_1_0_1>=1))||(IsEndLoop_1_0_0>=1))||(IsEndLoop_2_0_0>=1))||(IsEndLoop_3_0_0>=1))||(IsEndLoop_4_0_0>=1))||(IsEndLoop_0_2_5>=1))||(IsEndLoop_1_2_5>=1))||(IsEndLoop_5_2_4>=1))||(IsEndLoop_6_2_4>=1))||(IsEndLoop_3_2_4>=1))||(IsEndLoop_4_2_4>=1))||(IsEndLoop_1_2_4>=1))||(IsEndLoop_2_2_4>=1))||(IsEndLoop_1_3_0>=1))||(IsEndLoop_2_3_0>=1))||(IsEndLoop_6_2_5>=1))||(IsEndLoop_0_3_0>=1))||(IsEndLoop_4_2_5>=1))||(IsEndLoop_5_2_5>=1))||(IsEndLoop_2_2_5>=1))||(IsEndLoop_3_2_5>=1))||(IsEndLoop_6_2_2>=1))||(IsEndLoop_5_2_2>=1))||(IsEndLoop_4_2_2>=1))||(IsEndLoop_3_2_2>=1))||(IsEndLoop_2_2_2>=1))||(IsEndLoop_1_2_2>=1))||(IsEndLoop_0_2_2>=1))||(IsEndLoop_6_2_1>=1))||(IsEndLoop_0_2_4>=1))||(IsEndLoop_6_2_3>=1))||(IsEndLoop_5_2_3>=1))||(IsEndLoop_4_2_3>=1))||(IsEndLoop_3_2_3>=1))||(IsEndLoop_2_2_3>=1))||(IsEndLoop_1_2_3>=1))||(IsEndLoop_0_2_3>=1))||(IsEndLoop_2_3_3>=1))||(IsEndLoop_3_3_3>=1))||(IsEndLoop_4_3_3>=1))||(IsEndLoop_5_3_3>=1))||(IsEndLoop_5_3_2>=1))||(IsEndLoop_6_3_2>=1))||(IsEndLoop_0_3_3>=1))||(IsEndLoop_1_3_3>=1))||(IsEndLoop_3_3_4>=1))||(IsEndLoop_4_3_4>=1))||(IsEndLoop_5_3_4>=1))||(IsEndLoop_6_3_4>=1))||(IsEndLoop_6_3_3>=1))||(IsEndLoop_0_3_4>=1))||(IsEndLoop_1_3_4>=1))||(IsEndLoop_2_3_4>=1))||(IsEndLoop_1_3_1>=1))||(IsEndLoop_0_3_1>=1))||(IsEndLoop_3_3_1>=1))||(IsEndLoop_2_3_1>=1))||(IsEndLoop_4_3_0>=1))||(IsEndLoop_3_3_0>=1))||(IsEndLoop_6_3_0>=1))||(IsEndLoop_5_3_0>=1))||(IsEndLoop_2_3_2>=1))||(IsEndLoop_1_3_2>=1))||(IsEndLoop_4_3_2>=1))||(IsEndLoop_3_3_2>=1))||(IsEndLoop_5_3_1>=1))||(IsEndLoop_4_3_1>=1))||(IsEndLoop_0_3_2>=1))||(IsEndLoop_6_3_1>=1))||(IsEndLoop_2_1_1>=1))||(IsEndLoop_3_1_1>=1))||(IsEndLoop_0_1_1>=1))||(IsEndLoop_1_1_1>=1))||(IsEndLoop_6_1_1>=1))||(IsEndLoop_0_1_2>=1))||(IsEndLoop_4_1_1>=1))||(IsEndLoop_5_1_1>=1))||(IsEndLoop_3_1_2>=1))||(IsEndLoop_4_1_2>=1))||(IsEndLoop_1_1_2>=1))||(IsEndLoop_2_1_2>=1))||(IsEndLoop_0_1_3>=1))||(IsEndLoop_1_1_3>=1))||(IsEndLoop_5_1_2>=1))||(IsEndLoop_6_1_2>=1))||(IsEndLoop_1_0_5>=1))||(IsEndLoop_0_0_5>=1))||(IsEndLoop_6_0_4>=1))||(IsEndLoop_5_0_4>=1))||(IsEndLoop_5_0_5>=1))||(IsEndLoop_4_0_5>=1))||(IsEndLoop_3_0_5>=1))||(IsEndLoop_2_0_5>=1))||(IsEndLoop_2_1_0>=1))||(IsEndLoop_1_1_0>=1))||(IsEndLoop_0_1_0>=1))||(IsEndLoop_6_0_5>=1))||(IsEndLoop_6_1_0>=1))||(IsEndLoop_5_1_0>=1))||(IsEndLoop_4_1_0>=1))||(IsEndLoop_3_1_0>=1))||(IsEndLoop_4_1_5>=1))||(IsEndLoop_5_1_5>=1))||(IsEndLoop_6_1_5>=1))||(IsEndLoop_0_2_0>=1))||(IsEndLoop_1_2_0>=1))||(IsEndLoop_2_2_0>=1))||(IsEndLoop_3_2_0>=1))||(IsEndLoop_4_2_0>=1))||(IsEndLoop_5_2_0>=1))||(IsEndLoop_6_2_0>=1))||(IsEndLoop_0_2_1>=1))||(IsEndLoop_1_2_1>=1))||(IsEndLoop_2_2_1>=1))||(IsEndLoop_3_2_1>=1))||(IsEndLoop_4_2_1>=1))||(IsEndLoop_5_2_1>=1))||(IsEndLoop_3_1_3>=1))||(IsEndLoop_2_1_3>=1))||(IsEndLoop_5_1_3>=1))||(IsEndLoop_4_1_3>=1))||(IsEndLoop_0_1_4>=1))||(IsEndLoop_6_1_3>=1))||(IsEndLoop_2_1_4>=1))||(IsEndLoop_1_1_4>=1))||(IsEndLoop_4_1_4>=1))||(IsEndLoop_3_1_4>=1))||(IsEndLoop_6_1_4>=1))||(IsEndLoop_5_1_4>=1))||(IsEndLoop_1_1_5>=1))||(IsEndLoop_0_1_5>=1))||(IsEndLoop_3_1_5>=1))||(IsEndLoop_2_1_5>=1))||(IsEndLoop_2_5_3>=1))||(IsEndLoop_3_5_3>=1))||(IsEndLoop_4_5_3>=1))||(IsEndLoop_5_5_3>=1))||(IsEndLoop_6_5_3>=1))||(IsEndLoop_0_5_4>=1))||(IsEndLoop_1_5_4>=1))||(IsEndLoop_2_5_4>=1))||(IsEndLoop_1_5_2>=1))||(IsEndLoop_2_5_2>=1))||(IsEndLoop_3_5_2>=1))||(IsEndLoop_4_5_2>=1))||(IsEndLoop_5_5_2>=1))||(IsEndLoop_6_5_2>=1))||(IsEndLoop_0_5_3>=1))||(IsEndLoop_1_5_3>=1))||(IsEndLoop_5_5_5>=1))||(IsEndLoop_4_5_5>=1))||(IsEndLoop_6_5_5>=1))||(IsEndLoop_4_5_4>=1))||(IsEndLoop_3_5_4>=1))||(IsEndLoop_6_5_4>=1))||(IsEndLoop_5_5_4>=1))||(IsEndLoop_1_5_5>=1))||(IsEndLoop_0_5_5>=1))||(IsEndLoop_3_5_5>=1))||(IsEndLoop_2_5_5>=1))||(IsEndLoop_4_4_5>=1))||(IsEndLoop_5_4_5>=1))||(IsEndLoop_2_4_5>=1))||(IsEndLoop_3_4_5>=1))||(IsEndLoop_0_4_5>=1))||(IsEndLoop_1_4_5>=1))||(IsEndLoop_5_4_4>=1))||(IsEndLoop_6_4_4>=1))||(IsEndLoop_3_4_4>=1))||(IsEndLoop_4_4_4>=1))||(IsEndLoop_1_4_4>=1))||(IsEndLoop_2_4_4>=1))||(IsEndLoop_6_4_3>=1))||(IsEndLoop_0_4_4>=1))||(IsEndLoop_4_4_3>=1))||(IsEndLoop_5_4_3>=1))||(IsEndLoop_0_5_2>=1))||(IsEndLoop_6_5_1>=1))||(IsEnd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Formula 0 simplified : !F"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0>=1)||(IsEndLoop_2_0_4>=1))||(IsEndLoop_1_0_4>=1))||(IsEndLoop_4_0_4>=1))||(IsEndLoop_3_0_4>=1))||(IsEndLoop_5_0_3>=1))||(IsEndLoop_4_0_3>=1))||(IsEndLoop_0_0_4>=1))||(IsEndLoop_6_0_3>=1))||(IsEndLoop_1_0_3>=1))||(IsEndLoop_0_0_3>=1))||(IsEndLoop_3_0_3>=1))||(IsEndLoop_2_0_3>=1))||(IsEndLoop_4_0_2>=1))||(IsEndLoop_3_0_2>=1))||(IsEndLoop_6_0_2>=1))||(IsEndLoop_5_0_2>=1))||(IsEndLoop_6_0_1>=1))||(IsEndLoop_0_0_2>=1))||(IsEndLoop_1_0_2>=1))||(IsEndLoop_2_0_2>=1))||(IsEndLoop_2_0_1>=1))||(IsEndLoop_3_0_1>=1))||(IsEndLoop_4_0_1>=1))||(IsEndLoop_5_0_1>=1))||(IsEndLoop_5_0_0>=1))||(IsEndLoop_6_0_0>=1))||(IsEndLoop_0_0_1>=1))||(IsEndLoop_1_0_1>=1))||(IsEndLoop_1_0_0>=1))||(IsEndLoop_2_0_0>=1))||(IsEndLoop_3_0_0>=1))||(IsEndLoop_4_0_0>=1))||(IsEndLoop_0_2_5>=1))||(IsEndLoop_1_2_5>=1))||(IsEndLoop_5_2_4>=1))||(IsEndLoop_6_2_4>=1))||(IsEndLoop_3_2_4>=1))||(IsEndLoop_4_2_4>=1))||(IsEndLoop_1_2_4>=1))||(IsEndLoop_2_2_4>=1))||(IsEndLoop_1_3_0>=1))||(IsEndLoop_2_3_0>=1))||(IsEndLoop_6_2_5>=1))||(IsEndLoop_0_3_0>=1))||(IsEndLoop_4_2_5>=1))||(IsEndLoop_5_2_5>=1))||(IsEndLoop_2_2_5>=1))||(IsEndLoop_3_2_5>=1))||(IsEndLoop_6_2_2>=1))||(IsEndLoop_5_2_2>=1))||(IsEndLoop_4_2_2>=1))||(IsEndLoop_3_2_2>=1))||(IsEndLoop_2_2_2>=1))||(IsEndLoop_1_2_2>=1))||(IsEndLoop_0_2_2>=1))||(IsEndLoop_6_2_1>=1))||(IsEndLoop_0_2_4>=1))||(IsEndLoop_6_2_3>=1))||(IsEndLoop_5_2_3>=1))||(IsEndLoop_4_2_3>=1))||(IsEndLoop_3_2_3>=1))||(IsEndLoop_2_2_3>=1))||(IsEndLoop_1_2_3>=1))||(IsEndLoop_0_2_3>=1))||(IsEndLoop_2_3_3>=1))||(IsEndLoop_3_3_3>=1))||(IsEndLoop_4_3_3>=1))||(IsEndLoop_5_3_3>=1))||(IsEndLoop_5_3_2>=1))||(IsEndLoop_6_3_2>=1))||(IsEndLoop_0_3_3>=1))||(IsEndLoop_1_3_3>=1))||(IsEndLoop_3_3_4>=1))||(IsEndLoop_4_3_4>=1))||(IsEndLoop_5_3_4>=1))||(IsEndLoop_6_3_4>=1))||(IsEndLoop_6_3_3>=1))||(IsEndLoop_0_3_4>=1))||(IsEndLoop_1_3_4>=1))||(IsEndLoop_2_3_4>=1))||(IsEndLoop_1_3_1>=1))||(IsEndLoop_0_3_1>=1))||(IsEndLoop_3_3_1>=1))||(IsEndLoop_2_3_1>=1))||(IsEndLoop_4_3_0>=1))||(IsEndLoop_3_3_0>=1))||(IsEndLoop_6_3_0>=1))||(IsEndLoop_5_3_0>=1))||(IsEndLoop_2_3_2>=1))||(IsEndLoop_1_3_2>=1))||(IsEndLoop_4_3_2>=1))||(IsEndLoop_3_3_2>=1))||(IsEndLoop_5_3_1>=1))||(IsEndLoop_4_3_1>=1))||(IsEndLoop_0_3_2>=1))||(IsEndLoop_6_3_1>=1))||(IsEndLoop_2_1_1>=1))||(IsEndLoop_3_1_1>=1))||(IsEndLoop_0_1_1>=1))||(IsEndLoop_1_1_1>=1))||(IsEndLoop_6_1_1>=1))||(IsEndLoop_0_1_2>=1))||(IsEndLoop_4_1_1>=1))||(IsEndLoop_5_1_1>=1))||(IsEndLoop_3_1_2>=1))||(IsEndLoop_4_1_2>=1))||(IsEndLoop_1_1_2>=1))||(IsEndLoop_2_1_2>=1))||(IsEndLoop_0_1_3>=1))||(IsEndLoop_1_1_3>=1))||(IsEndLoop_5_1_2>=1))||(IsEndLoop_6_1_2>=1))||(IsEndLoop_1_0_5>=1))||(IsEndLoop_0_0_5>=1))||(IsEndLoop_6_0_4>=1))||(IsEndLoop_5_0_4>=1))||(IsEndLoop_5_0_5>=1))||(IsEndLoop_4_0_5>=1))||(IsEndLoop_3_0_5>=1))||(IsEndLoop_2_0_5>=1))||(IsEndLoop_2_1_0>=1))||(IsEndLoop_1_1_0>=1))||(IsEndLoop_0_1_0>=1))||(IsEndLoop_6_0_5>=1))||(IsEndLoop_6_1_0>=1))||(IsEndLoop_5_1_0>=1))||(IsEndLoop_4_1_0>=1))||(IsEndLoop_3_1_0>=1))||(IsEndLoop_4_1_5>=1))||(IsEndLoop_5_1_5>=1))||(IsEndLoop_6_1_5>=1))||(IsEndLoop_0_2_0>=1))||(IsEndLoop_1_2_0>=1))||(IsEndLoop_2_2_0>=1))||(IsEndLoop_3_2_0>=1))||(IsEndLoop_4_2_0>=1))||(IsEndLoop_5_2_0>=1))||(IsEndLoop_6_2_0>=1))||(IsEndLoop_0_2_1>=1))||(IsEndLoop_1_2_1>=1))||(IsEndLoop_2_2_1>=1))||(IsEndLoop_3_2_1>=1))||(IsEndLoop_4_2_1>=1))||(IsEndLoop_5_2_1>=1))||(IsEndLoop_3_1_3>=1))||(IsEndLoop_2_1_3>=1))||(IsEndLoop_5_1_3>=1))||(IsEndLoop_4_1_3>=1))||(IsEndLoop_0_1_4>=1))||(IsEndLoop_6_1_3>=1))||(IsEndLoop_2_1_4>=1))||(IsEndLoop_1_1_4>=1))||(IsEndLoop_4_1_4>=1))||(IsEndLoop_3_1_4>=1))||(IsEndLoop_6_1_4>=1))||(IsEndLoop_5_1_4>=1))||(IsEndLoop_1_1_5>=1))||(IsEndLoop_0_1_5>=1))||(IsEndLoop_3_1_5>=1))||(IsEndLoop_2_1_5>=1))||(IsEndLoop_2_5_3>=1))||(IsEndLoop_3_5_3>=1))||(IsEndLoop_4_5_3>=1))||(IsEndLoop_5_5_3>=1))||(IsEndLoop_6_5_3>=1))||(IsEndLoop_0_5_4>=1))||(IsEndLoop_1_5_4>=1))||(IsEndLoop_2_5_4>=1))||(IsEndLoop_1_5_2>=1))||(IsEndLoop_2_5_2>=1))||(IsEndLoop_3_5_2>=1))||(IsEndLoop_4_5_2>=1))||(IsEndLoop_5_5_2>=1))||(IsEndLoop_6_5_2>=1))||(IsEndLoop_0_5_3>=1))||(IsEndLoop_1_5_3>=1))||(IsEndLoop_5_5_5>=1))||(IsEndLoop_4_5_5>=1))||(IsEndLoop_6_5_5>=1))||(IsEndLoop_4_5_4>=1))||(IsEndLoop_3_5_4>=1))||(IsEndLoop_6_5_4>=1))||(IsEndLoop_5_5_4>=1))||(IsEndLoop_1_5_5>=1))||(IsEndLoop_0_5_5>=1))||(IsEndLoop_3_5_5>=1))||(IsEndLoop_2_5_5>=1))||(IsEndLoop_4_4_5>=1))||(IsEndLoop_5_4_5>=1))||(IsEndLoop_2_4_5>=1))||(IsEndLoop_3_4_5>=1))||(IsEndLoop_0_4_5>=1))||(IsEndLoop_1_4_5>=1))||(IsEndLoop_5_4_4>=1))||(IsEndLoop_6_4_4>=1))||(IsEndLoop_3_4_4>=1))||(IsEndLoop_4_4_4>=1))||(IsEndLoop_1_4_4>=1))||(IsEndLoop_2_4_4>=1))||(IsEndLoop_6_4_3>=1))||(IsEndLoop_0_4_4>=1))||(IsEndLoop_4_4_3>=1))||(IsEndLoop_5_4_3>=1))||(IsEndLoop_0_5_2>=1))||(IsEndLoop_6_5_1>=1))||(IsEndLoo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Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 17190 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 74 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 197440 ms.
FORMULA Peterson-PT-6-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](X(X((LTLAP1==true)))))U(X(((LTLAP2==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17949 ms.
FORMULA Peterson-PT-6-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(X(<>((LTLAP0==true)))))U(<>(X(X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18601 ms.
FORMULA Peterson-PT-6-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>((X((LTLAP4==true)))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3877 ms.
FORMULA Peterson-PT-6-LTLFireability-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](<>([]((LTLAP6==true)))))U(<>(<>([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](<>([]((LTLAP6==true)))))U(<>(<>([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>(<>((LTLAP7==true))))U([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5851 ms.
FORMULA Peterson-PT-6-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP8==true))U([]((LTLAP0==true))))U(<>([]((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP8==true))U([]((LTLAP0==true))))U(<>([]((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP7==true)))))U((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP7==true)))))U((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(((LTLAP10==true))U((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5902 ms.
FORMULA Peterson-PT-6-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(<>(X(X((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6756 ms.
FORMULA Peterson-PT-6-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP15==true))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP15==true))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((X(<>((LTLAP17==true))))U((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20234 ms.
FORMULA Peterson-PT-6-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(<>(<>((LTLAP19==true)))))U((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4921 ms.
FORMULA Peterson-PT-6-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP21==true)))))U((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP21==true)))))U((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](<>([]((LTLAP6==true)))))U(<>(<>([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 40 groups
LTSmin run took 304357 ms.
FORMULA Peterson-PT-6-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP8==true))U([]((LTLAP0==true))))U(<>([]((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 234336 ms.
FORMULA Peterson-PT-6-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP7==true)))))U((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 233139 ms.
FORMULA Peterson-PT-6-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 269974 ms.
FORMULA Peterson-PT-6-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 270143 ms.
FORMULA Peterson-PT-6-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP15==true))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 273444 ms.
FORMULA Peterson-PT-6-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([]([]([]((LTLAP21==true)))))U((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 8:02:00 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 8:02:00 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 8:02:01 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 247 ms
Mar 18, 2019 8:02:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1330 places.
Mar 18, 2019 8:02:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2030 transitions.
Mar 18, 2019 8:02:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 521 ms
Mar 18, 2019 8:02:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 60 ms
Mar 18, 2019 8:02:02 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 18 ms
Mar 18, 2019 8:02:03 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2030 transitions.
Mar 18, 2019 8:02:03 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2030) to apply POR reductions. Disabling POR matrices.
Mar 18, 2019 8:02:03 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 833ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-6"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is Peterson-PT-6, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272231200565"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-6.tgz
mv Peterson-PT-6 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;