Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272231100547.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is Peterson-PT-4, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272231100547
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 41K Feb 12 04:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 121K Feb 12 04:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 8 03:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 8 03:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 100 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 338 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 15K Feb 5 00:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 5 00:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 30K Feb 4 07:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 4 07:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 1 02:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 1 02:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 6.9K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 15K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 511K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-LTLFireability-00
FORMULA_NAME Peterson-PT-4-LTLFireability-01
FORMULA_NAME Peterson-PT-4-LTLFireability-02
FORMULA_NAME Peterson-PT-4-LTLFireability-03
FORMULA_NAME Peterson-PT-4-LTLFireability-04
FORMULA_NAME Peterson-PT-4-LTLFireability-05
FORMULA_NAME Peterson-PT-4-LTLFireability-06
FORMULA_NAME Peterson-PT-4-LTLFireability-07
FORMULA_NAME Peterson-PT-4-LTLFireability-08
FORMULA_NAME Peterson-PT-4-LTLFireability-09
FORMULA_NAME Peterson-PT-4-LTLFireability-10
FORMULA_NAME Peterson-PT-4-LTLFireability-11
FORMULA_NAME Peterson-PT-4-LTLFireability-12
FORMULA_NAME Peterson-PT-4-LTLFireability-13
FORMULA_NAME Peterson-PT-4-LTLFireability-14
FORMULA_NAME Peterson-PT-4-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552937045783

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X((F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0>=1)||(BeginLoop_3_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_3_0_1>=1))||(BeginLoop_2_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_4_0_3>=1))||(BeginLoop_0_0_4>=1))||(BeginLoop_2_0_3>=1))||(BeginLoop_3_0_3>=1))||(BeginLoop_3_0_4>=1))||(BeginLoop_4_0_4>=1))||(BeginLoop_1_0_4>=1))||(BeginLoop_2_0_4>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_4_0_1>=1))||(BeginLoop_0_0_2>=1))||(BeginLoop_0_0_3>=1))||(BeginLoop_1_0_3>=1))||(BeginLoop_3_0_2>=1))||(BeginLoop_4_0_2>=1))||(BeginLoop_3_3_0>=1))||(BeginLoop_2_3_0>=1))||(BeginLoop_0_3_1>=1))||(BeginLoop_4_3_0>=1))||(BeginLoop_4_2_4>=1))||(BeginLoop_3_2_4>=1))||(BeginLoop_1_3_0>=1))||(BeginLoop_0_3_0>=1))||(BeginLoop_1_3_2>=1))||(BeginLoop_0_3_2>=1))||(BeginLoop_3_3_2>=1))||(BeginLoop_2_3_2>=1))||(BeginLoop_2_3_1>=1))||(BeginLoop_1_3_1>=1))||(BeginLoop_4_3_1>=1))||(BeginLoop_3_3_1>=1))||(BeginLoop_1_2_2>=1))||(BeginLoop_2_2_2>=1))||(BeginLoop_3_2_2>=1))||(BeginLoop_4_2_2>=1))||(BeginLoop_2_2_1>=1))||(BeginLoop_3_2_1>=1))||(BeginLoop_4_2_1>=1))||(BeginLoop_0_2_2>=1))||(BeginLoop_4_2_3>=1))||(BeginLoop_0_2_4>=1))||(BeginLoop_1_2_4>=1))||(BeginLoop_2_2_4>=1))||(BeginLoop_0_2_3>=1))||(BeginLoop_1_2_3>=1))||(BeginLoop_2_2_3>=1))||(BeginLoop_3_2_3>=1))||(BeginLoop_3_1_4>=1))||(BeginLoop_2_1_4>=1))||(BeginLoop_1_1_4>=1))||(BeginLoop_0_1_4>=1))||(BeginLoop_4_1_3>=1))||(BeginLoop_3_1_3>=1))||(BeginLoop_2_1_3>=1))||(BeginLoop_1_1_3>=1))||(BeginLoop_1_2_1>=1))||(BeginLoop_0_2_1>=1))||(BeginLoop_4_2_0>=1))||(BeginLoop_3_2_0>=1))||(BeginLoop_2_2_0>=1))||(BeginLoop_1_2_0>=1))||(BeginLoop_0_2_0>=1))||(BeginLoop_4_1_4>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_4_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_3_1_0>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_4_1_2>=1))||(BeginLoop_0_1_3>=1))||(BeginLoop_2_1_2>=1))||(BeginLoop_3_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_3_1_1>=1))||(BeginLoop_4_1_1>=1))||(BeginLoop_1_3_3>=1))||(BeginLoop_2_3_3>=1))||(BeginLoop_4_3_2>=1))||(BeginLoop_0_3_3>=1))||(BeginLoop_0_3_4>=1))||(BeginLoop_1_3_4>=1))||(BeginLoop_3_3_3>=1))||(BeginLoop_4_3_3>=1))||(BeginLoop_4_3_4>=1))||(BeginLoop_2_3_4>=1))||(BeginLoop_3_3_4>=1))"))U(("(((((((((((((((EndTurn_3_0>=1)||(EndTurn_2_0>=1))||(EndTurn_1_0>=1))||(EndTurn_0_0>=1))||(EndTurn_0_1>=1))||(EndTurn_4_0>=1))||(EndTurn_2_1>=1))||(EndTurn_1_1>=1))||(EndTurn_4_1>=1))||(EndTurn_3_1>=1))||(EndTurn_1_2>=1))||(EndTurn_0_2>=1))||(EndTurn_3_2>=1))||(EndTurn_2_2>=1))||(EndTurn_4_2>=1))")U("(((((((((((((((EndTurn_3_0>=1)||(EndTurn_2_0>=1))||(EndTurn_1_0>=1))||(EndTurn_0_0>=1))||(EndTurn_0_1>=1))||(EndTurn_4_0>=1))||(EndTurn_2_1>=1))||(EndTurn_1_1>=1))||(EndTurn_4_1>=1))||(EndTurn_3_1>=1))||(EndTurn_1_2>=1))||(EndTurn_0_2>=1))||(EndTurn_3_2>=1))||(EndTurn_2_2>=1))||(EndTurn_4_2>=1))")))))
Formula 0 simplified : !X(F"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0>=1)||(BeginLoop_3_0_0>=1))||(BeginLoop_2_0_0>=1))||(BeginLoop_1_0_0>=1))||(BeginLoop_3_0_1>=1))||(BeginLoop_2_0_1>=1))||(BeginLoop_1_0_1>=1))||(BeginLoop_0_0_1>=1))||(BeginLoop_0_0_0>=1))||(BeginLoop_4_0_3>=1))||(BeginLoop_0_0_4>=1))||(BeginLoop_2_0_3>=1))||(BeginLoop_3_0_3>=1))||(BeginLoop_3_0_4>=1))||(BeginLoop_4_0_4>=1))||(BeginLoop_1_0_4>=1))||(BeginLoop_2_0_4>=1))||(BeginLoop_1_0_2>=1))||(BeginLoop_2_0_2>=1))||(BeginLoop_4_0_1>=1))||(BeginLoop_0_0_2>=1))||(BeginLoop_0_0_3>=1))||(BeginLoop_1_0_3>=1))||(BeginLoop_3_0_2>=1))||(BeginLoop_4_0_2>=1))||(BeginLoop_3_3_0>=1))||(BeginLoop_2_3_0>=1))||(BeginLoop_0_3_1>=1))||(BeginLoop_4_3_0>=1))||(BeginLoop_4_2_4>=1))||(BeginLoop_3_2_4>=1))||(BeginLoop_1_3_0>=1))||(BeginLoop_0_3_0>=1))||(BeginLoop_1_3_2>=1))||(BeginLoop_0_3_2>=1))||(BeginLoop_3_3_2>=1))||(BeginLoop_2_3_2>=1))||(BeginLoop_2_3_1>=1))||(BeginLoop_1_3_1>=1))||(BeginLoop_4_3_1>=1))||(BeginLoop_3_3_1>=1))||(BeginLoop_1_2_2>=1))||(BeginLoop_2_2_2>=1))||(BeginLoop_3_2_2>=1))||(BeginLoop_4_2_2>=1))||(BeginLoop_2_2_1>=1))||(BeginLoop_3_2_1>=1))||(BeginLoop_4_2_1>=1))||(BeginLoop_0_2_2>=1))||(BeginLoop_4_2_3>=1))||(BeginLoop_0_2_4>=1))||(BeginLoop_1_2_4>=1))||(BeginLoop_2_2_4>=1))||(BeginLoop_0_2_3>=1))||(BeginLoop_1_2_3>=1))||(BeginLoop_2_2_3>=1))||(BeginLoop_3_2_3>=1))||(BeginLoop_3_1_4>=1))||(BeginLoop_2_1_4>=1))||(BeginLoop_1_1_4>=1))||(BeginLoop_0_1_4>=1))||(BeginLoop_4_1_3>=1))||(BeginLoop_3_1_3>=1))||(BeginLoop_2_1_3>=1))||(BeginLoop_1_1_3>=1))||(BeginLoop_1_2_1>=1))||(BeginLoop_0_2_1>=1))||(BeginLoop_4_2_0>=1))||(BeginLoop_3_2_0>=1))||(BeginLoop_2_2_0>=1))||(BeginLoop_1_2_0>=1))||(BeginLoop_0_2_0>=1))||(BeginLoop_4_1_4>=1))||(BeginLoop_1_1_1>=1))||(BeginLoop_2_1_1>=1))||(BeginLoop_4_1_0>=1))||(BeginLoop_0_1_1>=1))||(BeginLoop_2_1_0>=1))||(BeginLoop_3_1_0>=1))||(BeginLoop_0_1_0>=1))||(BeginLoop_1_1_0>=1))||(BeginLoop_4_1_2>=1))||(BeginLoop_0_1_3>=1))||(BeginLoop_2_1_2>=1))||(BeginLoop_3_1_2>=1))||(BeginLoop_0_1_2>=1))||(BeginLoop_1_1_2>=1))||(BeginLoop_3_1_1>=1))||(BeginLoop_4_1_1>=1))||(BeginLoop_1_3_3>=1))||(BeginLoop_2_3_3>=1))||(BeginLoop_4_3_2>=1))||(BeginLoop_0_3_3>=1))||(BeginLoop_0_3_4>=1))||(BeginLoop_1_3_4>=1))||(BeginLoop_3_3_3>=1))||(BeginLoop_4_3_3>=1))||(BeginLoop_4_3_4>=1))||(BeginLoop_2_3_4>=1))||(BeginLoop_3_3_4>=1))" U "(((((((((((((((EndTurn_3_0>=1)||(EndTurn_2_0>=1))||(EndTurn_1_0>=1))||(EndTurn_0_0>=1))||(EndTurn_0_1>=1))||(EndTurn_4_0>=1))||(EndTurn_2_1>=1))||(EndTurn_1_1>=1))||(EndTurn_4_1>=1))||(EndTurn_3_1>=1))||(EndTurn_1_2>=1))||(EndTurn_0_2>=1))||(EndTurn_3_2>=1))||(EndTurn_2_2>=1))||(EndTurn_4_2>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6950 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 75 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP0==true)))U(((LTLAP1==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1321 ms.
FORMULA Peterson-PT-4-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8083 ms.
FORMULA Peterson-PT-4-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6412 ms.
FORMULA Peterson-PT-4-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((X([]((LTLAP4==true))))U((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2010 ms.
FORMULA Peterson-PT-4-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (([]((LTLAP2==true)))U([]((LTLAP6==true))))U(<>(((LTLAP1==true))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5313 ms.
FORMULA Peterson-PT-4-LTLFireability-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5804 ms.
FORMULA Peterson-PT-4-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((((LTLAP1==true))U((LTLAP1==true)))U(X((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3137 ms.
FORMULA Peterson-PT-4-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4314 ms.
FORMULA Peterson-PT-4-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(X(<>((LTLAP9==true)))))U((<>((LTLAP10==true)))U(<>((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 727 ms.
FORMULA Peterson-PT-4-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X([](X(X((LTLAP12==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3304 ms.
FORMULA Peterson-PT-4-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>([](<>((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 800 ms.
FORMULA Peterson-PT-4-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP14==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4920 ms.
FORMULA Peterson-PT-4-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(X([]((LTLAP15==true)))))U(([]((LTLAP16==true)))U(<>((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1428 ms.
FORMULA Peterson-PT-4-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(([]((LTLAP18==true)))U([]((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 930 ms.
FORMULA Peterson-PT-4-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP20==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6882 ms.
FORMULA Peterson-PT-4-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP21==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3562 ms.
FORMULA Peterson-PT-4-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552937331524

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 113 ms
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 480 places.
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 690 transitions.
Mar 18, 2019 7:24:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
Mar 18, 2019 7:24:07 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 120 ms
Mar 18, 2019 7:24:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 6 ms
Mar 18, 2019 7:24:07 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Mar 18, 2019 7:24:08 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
Mar 18, 2019 7:24:08 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 179 ms
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 1035 ms
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 690 transitions.
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/690 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 49 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 690 transitions.
Mar 18, 2019 7:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 23 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:24:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 690 transitions.
Mar 18, 2019 7:24:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/690) took 60 ms. Total solver calls (SAT/UNSAT): 137(0/137)
Mar 18, 2019 7:24:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/690) took 3819 ms. Total solver calls (SAT/UNSAT): 8555(8/8547)
Mar 18, 2019 7:24:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/690) took 6837 ms. Total solver calls (SAT/UNSAT): 9361(38/9323)
Mar 18, 2019 7:24:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/690) took 10522 ms. Total solver calls (SAT/UNSAT): 10141(74/10067)
Mar 18, 2019 7:24:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/690) took 13546 ms. Total solver calls (SAT/UNSAT): 11501(101/11400)
Mar 18, 2019 7:24:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/690) took 17410 ms. Total solver calls (SAT/UNSAT): 12585(131/12454)
Mar 18, 2019 7:24:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/690) took 20423 ms. Total solver calls (SAT/UNSAT): 15333(146/15187)
Mar 18, 2019 7:24:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/690) took 25306 ms. Total solver calls (SAT/UNSAT): 18829(194/18635)
Mar 18, 2019 7:24:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/690) took 28759 ms. Total solver calls (SAT/UNSAT): 19077(226/18851)
Mar 18, 2019 7:24:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/690) took 31776 ms. Total solver calls (SAT/UNSAT): 27687(226/27461)
Mar 18, 2019 7:24:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/690) took 35220 ms. Total solver calls (SAT/UNSAT): 28532(267/28265)
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(247/690) took 38233 ms. Total solver calls (SAT/UNSAT): 28833(306/28527)
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/690) took 42996 ms. Total solver calls (SAT/UNSAT): 29129(342/28787)
Mar 18, 2019 7:25:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(253/690) took 46207 ms. Total solver calls (SAT/UNSAT): 29424(379/29045)
Mar 18, 2019 7:25:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(255/690) took 49742 ms. Total solver calls (SAT/UNSAT): 29622(406/29216)
Mar 18, 2019 7:25:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(258/690) took 52788 ms. Total solver calls (SAT/UNSAT): 29910(440/29470)
Mar 18, 2019 7:25:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/690) took 55926 ms. Total solver calls (SAT/UNSAT): 30105(465/29640)
Mar 18, 2019 7:25:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/690) took 59801 ms. Total solver calls (SAT/UNSAT): 30390(498/29892)
Mar 18, 2019 7:25:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/690) took 63561 ms. Total solver calls (SAT/UNSAT): 30763(538/30225)
Mar 18, 2019 7:25:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/690) took 68087 ms. Total solver calls (SAT/UNSAT): 31131(576/30555)
Mar 18, 2019 7:25:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(278/690) took 71327 ms. Total solver calls (SAT/UNSAT): 31723(593/31130)
Mar 18, 2019 7:25:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/690) took 75297 ms. Total solver calls (SAT/UNSAT): 32156(623/31533)
Mar 18, 2019 7:25:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(287/690) took 78875 ms. Total solver calls (SAT/UNSAT): 32504(654/31850)
Mar 18, 2019 7:25:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(291/690) took 82490 ms. Total solver calls (SAT/UNSAT): 32845(681/32164)
Mar 18, 2019 7:25:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(295/690) took 85913 ms. Total solver calls (SAT/UNSAT): 33182(707/32475)
Mar 18, 2019 7:25:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(299/690) took 89525 ms. Total solver calls (SAT/UNSAT): 33522(740/32782)
Mar 18, 2019 7:25:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(302/690) took 92606 ms. Total solver calls (SAT/UNSAT): 33773(762/33011)
Mar 18, 2019 7:25:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/690) took 96848 ms. Total solver calls (SAT/UNSAT): 34281(813/33468)
Mar 18, 2019 7:25:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(311/690) took 100636 ms. Total solver calls (SAT/UNSAT): 34542(844/33698)
Mar 18, 2019 7:26:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/690) took 104689 ms. Total solver calls (SAT/UNSAT): 34887(886/34001)
Mar 18, 2019 7:26:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/690) took 108710 ms. Total solver calls (SAT/UNSAT): 35228(928/34300)
Mar 18, 2019 7:26:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(322/690) took 112366 ms. Total solver calls (SAT/UNSAT): 35481(958/34523)
Mar 18, 2019 7:26:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(326/690) took 116384 ms. Total solver calls (SAT/UNSAT): 35806(991/34815)
Mar 18, 2019 7:26:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(330/690) took 119477 ms. Total solver calls (SAT/UNSAT): 36127(1022/35105)
Mar 18, 2019 7:26:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(334/690) took 122890 ms. Total solver calls (SAT/UNSAT): 36448(1056/35392)
Mar 18, 2019 7:26:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(338/690) took 125897 ms. Total solver calls (SAT/UNSAT): 36763(1086/35677)
Mar 18, 2019 7:26:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(346/690) took 128926 ms. Total solver calls (SAT/UNSAT): 37337(1117/36220)
Mar 18, 2019 7:26:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(353/690) took 132284 ms. Total solver calls (SAT/UNSAT): 37831(1146/36685)
Mar 18, 2019 7:26:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(358/690) took 136250 ms. Total solver calls (SAT/UNSAT): 38206(1184/37022)
Mar 18, 2019 7:26:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(364/690) took 139376 ms. Total solver calls (SAT/UNSAT): 38627(1215/37412)
Mar 18, 2019 7:26:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(380/690) took 142902 ms. Total solver calls (SAT/UNSAT): 39667(1249/38418)
Mar 18, 2019 7:26:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(402/690) took 146078 ms. Total solver calls (SAT/UNSAT): 40993(1271/39722)
Mar 18, 2019 7:26:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(411/690) took 149185 ms. Total solver calls (SAT/UNSAT): 41536(1301/40235)
Mar 18, 2019 7:26:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(422/690) took 152212 ms. Total solver calls (SAT/UNSAT): 42178(1336/40842)
Mar 18, 2019 7:26:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(498/690) took 155540 ms. Total solver calls (SAT/UNSAT): 45681(1354/44327)
Mar 18, 2019 7:26:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(502/690) took 158709 ms. Total solver calls (SAT/UNSAT): 45983(1382/44601)
Mar 18, 2019 7:26:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(509/690) took 161848 ms. Total solver calls (SAT/UNSAT): 46488(1427/45061)
Mar 18, 2019 7:27:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(515/690) took 165165 ms. Total solver calls (SAT/UNSAT): 46896(1468/45428)
Mar 18, 2019 7:27:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(524/690) took 168497 ms. Total solver calls (SAT/UNSAT): 47488(1526/45962)
Mar 18, 2019 7:27:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(533/690) took 171831 ms. Total solver calls (SAT/UNSAT): 48060(1586/46474)
Mar 18, 2019 7:27:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(541/690) took 175143 ms. Total solver calls (SAT/UNSAT): 48569(1638/46931)
Mar 18, 2019 7:27:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(555/690) took 178558 ms. Total solver calls (SAT/UNSAT): 49096(1669/47427)
Mar 18, 2019 7:27:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(571/690) took 181817 ms. Total solver calls (SAT/UNSAT): 49795(1726/48069)
Mar 18, 2019 7:27:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(583/690) took 185717 ms. Total solver calls (SAT/UNSAT): 50205(1756/48449)
Mar 18, 2019 7:27:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(594/690) took 188874 ms. Total solver calls (SAT/UNSAT): 50659(1800/48859)
Mar 18, 2019 7:27:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(609/690) took 191985 ms. Total solver calls (SAT/UNSAT): 51099(1824/49275)
Mar 18, 2019 7:27:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(619/690) took 195094 ms. Total solver calls (SAT/UNSAT): 51309(1847/49462)
Mar 18, 2019 7:27:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(626/690) took 198353 ms. Total solver calls (SAT/UNSAT): 51552(1881/49671)
Mar 18, 2019 7:27:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(644/690) took 201371 ms. Total solver calls (SAT/UNSAT): 51948(1918/50030)
Mar 18, 2019 7:27:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(662/690) took 204449 ms. Total solver calls (SAT/UNSAT): 52261(1954/50307)
Mar 18, 2019 7:27:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(687/690) took 207503 ms. Total solver calls (SAT/UNSAT): 52464(1999/50465)
Mar 18, 2019 7:27:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 207664 ms. Total solver calls (SAT/UNSAT): 52465(2000/50465)
Mar 18, 2019 7:27:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 690 transitions.
Mar 18, 2019 7:27:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 186 ms. Total solver calls (SAT/UNSAT): 80(0/80)
Mar 18, 2019 7:27:45 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 217090ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is Peterson-PT-4, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272231100547"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;