About the Execution of ITS-Tools for Peterson-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2257.820 | 79318.00 | 216386.00 | 91.20 | FFFFFFFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fko/mcc2019-input.r107-oct2-155272231100538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is Peterson-PT-3, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272231100538
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 716K
-rw-r--r-- 1 mcc users 18K Feb 12 04:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 55K Feb 12 04:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K Feb 8 03:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 8 03:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 100 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 338 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 12K Feb 5 00:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Feb 5 00:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 4 07:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 39K Feb 4 07:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 23K Feb 1 02:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 1 02:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.5K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 248K Mar 10 17:31 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-3-LTLFireability-00
FORMULA_NAME Peterson-PT-3-LTLFireability-01
FORMULA_NAME Peterson-PT-3-LTLFireability-02
FORMULA_NAME Peterson-PT-3-LTLFireability-03
FORMULA_NAME Peterson-PT-3-LTLFireability-04
FORMULA_NAME Peterson-PT-3-LTLFireability-05
FORMULA_NAME Peterson-PT-3-LTLFireability-06
FORMULA_NAME Peterson-PT-3-LTLFireability-07
FORMULA_NAME Peterson-PT-3-LTLFireability-08
FORMULA_NAME Peterson-PT-3-LTLFireability-09
FORMULA_NAME Peterson-PT-3-LTLFireability-10
FORMULA_NAME Peterson-PT-3-LTLFireability-11
FORMULA_NAME Peterson-PT-3-LTLFireability-12
FORMULA_NAME Peterson-PT-3-LTLFireability-13
FORMULA_NAME Peterson-PT-3-LTLFireability-14
FORMULA_NAME Peterson-PT-3-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1552936894953
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F((("(((((((((((((TestTurn_3_2>=1)&&(Turn_2_3>=1))||((TestTurn_2_2>=1)&&(Turn_2_2>=1)))||((TestTurn_1_2>=1)&&(Turn_2_1>=1)))||((TestTurn_0_2>=1)&&(Turn_2_0>=1)))||((TestTurn_3_1>=1)&&(Turn_1_3>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((Turn_0_3>=1)&&(TestTurn_3_0>=1)))||((TestTurn_2_0>=1)&&(Turn_0_2>=1)))||((TestTurn_1_0>=1)&&(Turn_0_1>=1)))||((TestTurn_0_0>=1)&&(Turn_0_0>=1)))")U("((((((((((((IsEndLoop_3_1_3>=1)||(IsEndLoop_0_2_3>=1))||(IsEndLoop_1_1_3>=1))||(IsEndLoop_2_1_3>=1))||(IsEndLoop_3_0_3>=1))||(IsEndLoop_0_1_3>=1))||(IsEndLoop_1_0_3>=1))||(IsEndLoop_2_0_3>=1))||(IsEndLoop_0_0_3>=1))||(IsEndLoop_3_2_3>=1))||(IsEndLoop_1_2_3>=1))||(IsEndLoop_2_2_3>=1))"))U(G("((((((((((((TestIdentity_0_0_0>=1)||(TestIdentity_3_1_3>=1))||(TestIdentity_0_2_0>=1))||(TestIdentity_1_1_1>=1))||(TestIdentity_2_1_2>=1))||(TestIdentity_3_0_3>=1))||(TestIdentity_0_1_0>=1))||(TestIdentity_1_0_1>=1))||(TestIdentity_2_0_2>=1))||(TestIdentity_3_2_3>=1))||(TestIdentity_2_2_2>=1))||(TestIdentity_1_2_1>=1))")))))
Formula 0 simplified : !F(("(((((((((((((TestTurn_3_2>=1)&&(Turn_2_3>=1))||((TestTurn_2_2>=1)&&(Turn_2_2>=1)))||((TestTurn_1_2>=1)&&(Turn_2_1>=1)))||((TestTurn_0_2>=1)&&(Turn_2_0>=1)))||((TestTurn_3_1>=1)&&(Turn_1_3>=1)))||((TestTurn_2_1>=1)&&(Turn_1_2>=1)))||((TestTurn_1_1>=1)&&(Turn_1_1>=1)))||((TestTurn_0_1>=1)&&(Turn_1_0>=1)))||((Turn_0_3>=1)&&(TestTurn_3_0>=1)))||((TestTurn_2_0>=1)&&(Turn_0_2>=1)))||((TestTurn_1_0>=1)&&(Turn_0_1>=1)))||((TestTurn_0_0>=1)&&(Turn_0_0>=1)))" U "((((((((((((IsEndLoop_3_1_3>=1)||(IsEndLoop_0_2_3>=1))||(IsEndLoop_1_1_3>=1))||(IsEndLoop_2_1_3>=1))||(IsEndLoop_3_0_3>=1))||(IsEndLoop_0_1_3>=1))||(IsEndLoop_1_0_3>=1))||(IsEndLoop_2_0_3>=1))||(IsEndLoop_0_0_3>=1))||(IsEndLoop_3_2_3>=1))||(IsEndLoop_1_2_3>=1))||(IsEndLoop_2_2_3>=1))") U G"((((((((((((TestIdentity_0_0_0>=1)||(TestIdentity_3_1_3>=1))||(TestIdentity_0_2_0>=1))||(TestIdentity_1_1_1>=1))||(TestIdentity_2_1_2>=1))||(TestIdentity_3_0_3>=1))||(TestIdentity_0_1_0>=1))||(TestIdentity_1_0_1>=1))||(TestIdentity_2_0_2>=1))||(TestIdentity_3_2_3>=1))||(TestIdentity_2_2_2>=1))||(TestIdentity_1_2_1>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 308
// Phase 1: matrix 308 rows 244 cols
invariant :Turn_2_1 + Turn_2_2 + Turn_2_0 + Turn_2_3 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :WantSection_2_F + -1'Idle_2 = 0
invariant :WantSection_1_T + Idle_1 = 1
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_2_3 + EndTurn_0_0 + EndTurn_0_1 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_2_0 + BeginLoop_0_1_0 + BeginLoop_0_1_1 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_2_1 + BeginLoop_0_2_2 + BeginLoop_0_1_2 + BeginLoop_0_1_3 + BeginLoop_0_0_3 + BeginLoop_0_2_3 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_2 + TestAlone_0_0_1 + TestAlone_0_1_1 + TestAlone_0_2_1 + TestAlone_0_2_3 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestIdentity_0_1_0 + TestIdentity_0_2_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestIdentity_0_2_1 + TestIdentity_0_0_2 + TestIdentity_0_0_1 + TestIdentity_0_1_1 + TestIdentity_0_1_3 + TestIdentity_0_0_3 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_2_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 + CS_0 = 1
invariant :Turn_1_2 + Turn_1_0 + Turn_1_1 + Turn_1_3 = 1
invariant :WantSection_3_T + Idle_3 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_0_3 + IsEndLoop_2_1_3 + IsEndLoop_2_2_3 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + BeginLoop_2_1_0 + BeginLoop_2_0_0 + BeginLoop_2_0_1 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_2_2 + BeginLoop_2_2_3 + BeginLoop_2_1_3 + TestAlone_2_2_0 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_1_1 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestTurn_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestIdentity_2_0_0 + TestIdentity_2_1_0 + TestTurn_2_1 + TestTurn_2_2 + TestIdentity_2_1_1 + TestIdentity_2_2_1 + TestIdentity_2_2_0 + TestIdentity_2_0_1 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_1_2 + TestIdentity_2_0_2 + TestIdentity_2_2_3 + TestIdentity_2_1_3 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 + AskForSection_2_2 = 1
invariant :Turn_0_2 + Turn_0_1 + Turn_0_0 + Turn_0_3 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_0_3 + IsEndLoop_3_1_3 + IsEndLoop_3_2_3 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + BeginLoop_3_1_0 + BeginLoop_3_0_0 + BeginLoop_3_0_1 + BeginLoop_3_2_0 + BeginLoop_3_2_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_2_2 + BeginLoop_3_2_3 + BeginLoop_3_1_3 + TestAlone_3_2_0 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_2_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_0_1 + TestAlone_3_1_1 + TestTurn_3_0 + TestAlone_3_2_2 + TestIdentity_3_0_0 + TestIdentity_3_1_0 + TestTurn_3_1 + TestTurn_3_2 + TestIdentity_3_1_1 + TestIdentity_3_2_1 + TestIdentity_3_2_0 + TestIdentity_3_0_1 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_2_3 + TestIdentity_3_1_3 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 + AskForSection_3_2 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_0_3 + IsEndLoop_1_1_3 + IsEndLoop_1_2_3 + EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + BeginLoop_1_1_0 + BeginLoop_1_0_0 + BeginLoop_1_0_1 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_2_2 + BeginLoop_1_2_3 + BeginLoop_1_1_3 + TestAlone_1_0_0 + TestAlone_1_2_0 + TestAlone_1_1_0 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_3 + TestTurn_1_0 + TestAlone_1_2_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestIdentity_1_0_0 + TestIdentity_1_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestIdentity_1_1_1 + TestIdentity_1_2_1 + TestIdentity_1_2_0 + TestIdentity_1_0_1 + TestIdentity_1_0_3 + TestIdentity_1_2_2 + TestIdentity_1_1_2 + TestIdentity_1_0_2 + TestIdentity_1_2_3 + TestIdentity_1_1_3 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 + CS_1 + AskForSection_1_2 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :WantSection_2_T + Idle_2 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3124 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 56 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((((LTLAP0==true))U((LTLAP1==true)))U([]((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1459 ms.
FORMULA Peterson-PT-3-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1739 ms.
FORMULA Peterson-PT-3-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1665 ms.
FORMULA Peterson-PT-3-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](X((LTLAP1==true))))U(X(<>((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 922 ms.
FORMULA Peterson-PT-3-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(<>(<>([]((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 888 ms.
FORMULA Peterson-PT-3-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](<>([](X((LTLAP5==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions BecomeIdle_0, UpdateTurn_1_3_2, UpdateTurn_2_3_2, UpdateTurn_3_3_2, BecomeIdle_1, BecomeIdle_2, BecomeIdle_3, EndLoop_3_1, EndLoop_1_1, EndLoop_2_1, EndLoop_3_0, EndLoop_0_1, EndLoop_1_0, EndLoop_2_0, EndLoop_0_0, NotAlone_2_3_0, NotAlone_1_3_0, NotAlone_0_3_0, NotAlone_3_2_0, NotAlone_1_2_0, NotAlone_0_2_0, NotAlone_3_1_0, NotAlone_3_2_1, NotAlone_1_2_1, NotAlone_0_2_1, NotAlone_3_1_1, NotAlone_2_1_1, NotAlone_2_1_0, NotAlone_2_1_2, NotAlone_0_3_1, NotAlone_1_3_1, NotAlone_2_3_1, NotAlone_0_3_2, NotAlone_1_3_2, NotAlone_2_3_2, NotAlone_3_1_2, NotAlone_0_2_2, NotAlone_1_2_2, NotAlone_3_2_2, UpdateTurn_3_2_0, UpdateTurn_0_3_0, UpdateTurn_1_2_0, UpdateTurn_2_2_0, UpdateTurn_3_1_0, UpdateTurn_0_2_0, UpdateTurn_1_1_0, UpdateTurn_2_1_0, UpdateTurn_3_0_0, UpdateTurn_0_1_0, UpdateTurn_1_0_0, UpdateTurn_2_0_0, UpdateTurn_0_0_0, UpdateTurn_1_2_2, UpdateTurn_2_2_2, UpdateTurn_3_2_2, UpdateTurn_0_3_2, UpdateTurn_1_1_2, UpdateTurn_2_1_2, UpdateTurn_3_1_2, UpdateTurn_0_2_2, UpdateTurn_1_0_2, UpdateTurn_2_0_2, UpdateTurn_3_0_2, UpdateTurn_0_1_2, UpdateTurn_1_3_1, UpdateTurn_2_3_1, UpdateTurn_3_3_1, UpdateTurn_0_0_2, UpdateTurn_2_2_1, UpdateTurn_1_2_1, UpdateTurn_0_3_1, UpdateTurn_3_2_1, UpdateTurn_2_1_1, UpdateTurn_1_1_1, UpdateTurn_0_2_1, UpdateTurn_3_1_1, UpdateTurn_2_0_1, UpdateTurn_1_0_1, UpdateTurn_0_1_1, UpdateTurn_3_0_1, UpdateTurn_2_3_0, UpdateTurn_1_3_0, UpdateTurn_0_0_1, UpdateTurn_3_3_0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/248/84/332
LTSmin run took 1095 ms.
FORMULA Peterson-PT-3-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(<>(X((LTLAP6==true)))))U(X([]([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 891 ms.
FORMULA Peterson-PT-3-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](<>(X((LTLAP6==true)))))U(X((LTLAP7==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 565 ms.
FORMULA Peterson-PT-3-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2319 ms.
FORMULA Peterson-PT-3-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2194 ms.
FORMULA Peterson-PT-3-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2432 ms.
FORMULA Peterson-PT-3-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2638 ms.
FORMULA Peterson-PT-3-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([](((LTLAP12==true))U((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2319 ms.
FORMULA Peterson-PT-3-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP14==true))U(<>((LTLAP15==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2029 ms.
FORMULA Peterson-PT-3-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2135 ms.
FORMULA Peterson-PT-3-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1647 ms.
FORMULA Peterson-PT-3-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1552936974271
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 46 ms
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 244 places.
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 332 transitions.
Mar 18, 2019 7:21:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 46 ms
Mar 18, 2019 7:21:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
Mar 18, 2019 7:21:36 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 18, 2019 7:21:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 332 transitions.
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 15 place invariants in 84 ms
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 244 variables to be positive in 595 ms
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 332 transitions.
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/332 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 332 transitions.
Mar 18, 2019 7:21:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:21:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 332 transitions.
Mar 18, 2019 7:21:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/332) took 36 ms. Total solver calls (SAT/UNSAT): 82(0/82)
Mar 18, 2019 7:21:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/332) took 3196 ms. Total solver calls (SAT/UNSAT): 5136(51/5085)
Mar 18, 2019 7:21:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/332) took 6212 ms. Total solver calls (SAT/UNSAT): 6755(51/6704)
Mar 18, 2019 7:21:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/332) took 9361 ms. Total solver calls (SAT/UNSAT): 7862(87/7775)
Mar 18, 2019 7:21:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/332) took 12524 ms. Total solver calls (SAT/UNSAT): 8551(156/8395)
Mar 18, 2019 7:21:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/332) took 15928 ms. Total solver calls (SAT/UNSAT): 9380(205/9175)
Mar 18, 2019 7:22:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/332) took 19206 ms. Total solver calls (SAT/UNSAT): 9995(260/9735)
Mar 18, 2019 7:22:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/332) took 22269 ms. Total solver calls (SAT/UNSAT): 10634(304/10330)
Mar 18, 2019 7:22:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/332) took 25395 ms. Total solver calls (SAT/UNSAT): 11486(320/11166)
Mar 18, 2019 7:22:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/332) took 28402 ms. Total solver calls (SAT/UNSAT): 12432(345/12087)
Mar 18, 2019 7:22:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(238/332) took 31427 ms. Total solver calls (SAT/UNSAT): 13056(362/12694)
Mar 18, 2019 7:22:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/332) took 34646 ms. Total solver calls (SAT/UNSAT): 13815(456/13359)
Mar 18, 2019 7:22:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/332) took 37699 ms. Total solver calls (SAT/UNSAT): 14506(535/13971)
Mar 18, 2019 7:22:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/332) took 40734 ms. Total solver calls (SAT/UNSAT): 14944(585/14359)
Mar 18, 2019 7:22:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 42614 ms. Total solver calls (SAT/UNSAT): 15088(612/14476)
Mar 18, 2019 7:22:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 332 transitions.
Mar 18, 2019 7:22:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 45 ms. Total solver calls (SAT/UNSAT): 36(0/36)
Mar 18, 2019 7:22:23 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 47114ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-3"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is Peterson-PT-3, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272231100538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-3.tgz
mv Peterson-PT-3 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;