fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r107-oct2-155272230700368
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for PermAdmissibility-COL-01

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
811.180 34420.00 30009.00 129.40 TFFTFFTFFTFFTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272230700368.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is PermAdmissibility-COL-01, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272230700368
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.6K Feb 12 04:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 12 04:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Feb 8 03:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 8 03:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.4K Feb 5 00:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 4 07:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 4 07:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 1 02:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 1 02:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:22 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 54K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552924349895

15:52:56.400 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
15:52:56.405 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-00 with value :(((!((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=3))||(!(c6_0>=2)))||((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=1))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-01 with value :(((!((((((((aux5_0+aux5_1)+aux5_2)+aux5_3)+aux5_4)+aux5_5)+aux5_6)+aux5_7)<=c14_0))&&((c16_0>=3)||(c11_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))))&&(c8_0>=3))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-02 with value :(((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)>=3)&&(c16_0<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7)))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-03 with value :(((((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=(((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7))||(c13_0<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7)))||(((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)>=2)||((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=3)))||((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=3))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-04 with value :(c11_0>=3)
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-05 with value :(((((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7)<=(((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7))&&((((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c9_0)||(c20_0<=(((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)))||((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)<=(((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7))))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-06 with value :(!((!((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)))&&(((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=1)&&((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=c20_0))))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-07 with value :((!(((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=(((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7))&&((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=c8_0)))&&((!((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=3))&&((c9_0>=1)&&((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=3))))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-08 with value :(!((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)>=1))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-09 with value :(!(((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=c6_0)||(!(c12_0<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)))))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-10 with value :(((!((((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)<=c110_0))&&(((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=2)&&(c6_0<=(((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7))))&&(!((c16_0<=c8_0)&&(c6_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)))))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-11 with value :(((!(c16_0<=(((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)))||(((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=1)||((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c15_0)))||((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)>=2))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-12 with value :((!((((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7)<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))||(c13_0<=(((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)))
Read [invariant] property : PermAdmissibility-COL-01-ReachabilityCardinality-13 with value :(((((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=1)&&((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=(((((((aux5_0+aux5_1)+aux5_2)+aux5_3)+aux5_4)+aux5_5)+aux5_6)+aux5_7)))&&((c9_0<=c12_0)||((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7))))||((((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))||((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=1))||(!(c20_0>=3))))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-14 with value :(!((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)<=(((((((aux7_0+aux7_1)+aux7_2)+aux7_3)+aux7_4)+aux7_5)+aux7_6)+aux7_7)))
Read [reachable] property : PermAdmissibility-COL-01-ReachabilityCardinality-15 with value :(((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)>=1)&&(!(c13_0<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7))))
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-00 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :c20_0 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -1'aux5_2 + 2'c110_0 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :c18_0 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + aux8_0 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_2 + -1'aux7_2 + -2'c9_0 + -1'aux5_2 + -1'c12_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :aux9_1 + aux10_1 + aux11_1 + aux12_1 + in1_1 + in3_1 + in2_1 + in4_1 + aux8_1 + aux6_1 + aux7_1 + aux5_1 + aux16_1 + aux13_1 + aux15_1 + aux14_1 + -1'out1_0 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out5_1 + out4_1 + out3_1 + out2_0 + 2'out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_1 + out7_1 + out6_1 = 1
invariant :4'c16_0 + 4'c13_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_2 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + aux13_0 + aux13_1 + 3'aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + 4'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + out3_0 + out3_1 + 3'out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + 3'out2_0 + 3'out2_1 + 5'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-10'c16_0 + aux9_0 + aux9_1 + -2'aux9_2 + 3'aux9_3 + 3'aux9_4 + aux9_5 + aux9_6 + 3'aux9_7 + -2'aux10_0 + -2'aux10_1 + -5'aux10_2 + -2'aux10_5 + -2'aux10_6 + 3'aux11_0 + 3'aux11_1 + 5'aux11_3 + 5'aux11_4 + 3'aux11_5 + 3'aux11_6 + 5'aux11_7 + -2'aux12_0 + -2'aux12_1 + -5'aux12_2 + -2'aux12_5 + -2'aux12_6 + -3'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_7 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -7'in3_2 + -2'in3_3 + -2'in3_4 + -4'in3_5 + -4'in3_6 + -2'in3_7 + -3'in2_2 + 2'in2_3 + 2'in2_4 + 2'in2_7 + 4'in4_0 + 4'in4_1 + in4_2 + 6'in4_3 + 6'in4_4 + 4'in4_5 + 4'in4_6 + 6'in4_7 + -3'aux8_2 + 2'aux8_3 + 2'aux8_4 + 2'aux8_7 + -3'aux6_2 + 2'aux6_3 + 2'aux6_4 + 2'aux6_7 + -3'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 4'c9_0 + -2'aux5_0 + -2'aux5_1 + -5'aux5_2 + -2'aux5_5 + -2'aux5_6 + -4'c12_0 + 2'c11_0 + -3'aux16_2 + 2'aux16_3 + 2'aux16_4 + 2'aux16_7 + 2'aux13_0 + 2'aux13_1 + -1'aux13_2 + 4'aux13_3 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -14'c17_0 + 3'aux15_0 + 3'aux15_1 + 5'aux15_3 + 5'aux15_4 + 3'aux15_5 + 3'aux15_6 + 5'aux15_7 + 2'aux14_0 + 2'aux14_1 + -1'aux14_2 + 4'aux14_3 + 4'aux14_4 + 2'aux14_5 + 2'aux14_6 + 4'aux14_7 + -3'out1_2 + 2'out1_3 + 2'out1_4 + 2'out1_7 + -2'out5_0 + -2'out5_1 + -5'out5_2 + -2'out5_5 + -2'out5_6 + 3'out4_0 + 3'out4_1 + 5'out4_3 + 5'out4_4 + 3'out4_5 + 3'out4_6 + 5'out4_7 + 2'out3_0 + 2'out3_1 + -1'out3_2 + 4'out3_3 + 4'out3_4 + 2'out3_5 + 2'out3_6 + 4'out3_7 + -9'out2_0 + -9'out2_1 + -12'out2_2 + -7'out2_3 + -7'out2_4 + -9'out2_5 + -9'out2_6 + -7'out2_7 + -2'out8_0 + -2'out8_1 + -5'out8_2 + -2'out8_5 + -2'out8_6 + 4'out7_0 + 4'out7_1 + out7_2 + 6'out7_3 + 6'out7_4 + 4'out7_5 + 4'out7_6 + 6'out7_7 + 4'out6_0 + 4'out6_1 + out6_2 + 6'out6_3 + 6'out6_4 + 4'out6_5 + 4'out6_6 + 6'out6_7 = 3
invariant :2'c16_0 + 2'aux9_0 + aux9_1 + 2'aux9_2 + aux9_3 + aux9_4 + aux9_5 + aux9_6 + aux9_7 + aux10_0 + aux10_2 + -1'aux11_1 + -1'aux11_3 + -1'aux11_4 + -1'aux11_5 + -1'aux11_6 + -1'aux11_7 + aux12_0 + aux12_2 + in1_0 + in1_2 + in3_0 + in3_2 + in2_0 + in2_2 + in4_0 + in4_2 + -1'aux8_1 + -1'aux8_3 + -1'aux8_4 + -1'aux8_5 + -1'aux8_6 + -1'aux8_7 + aux6_0 + aux6_2 + aux7_0 + aux7_2 + 2'c9_0 + aux5_0 + aux5_2 + c12_0 + -1'aux16_1 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + aux13_0 + aux13_2 + 4'c17_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_2 + out1_0 + out1_2 + out5_0 + out5_2 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_0 + out3_2 + 4'out2_0 + 3'out2_1 + 4'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + out8_0 + out8_2 + -1'out7_1 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_1 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + -2'aux9_5 + -2'aux9_6 + -2'aux9_7 + 2'c6_0 + 4'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -4'in4_0 + -4'in4_1 + -4'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -4'c9_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = -4
invariant :-2'c16_0 + -2'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_0 + -1'aux10_2 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_0 + -1'aux12_2 + -1'in1_0 + -1'in1_2 + -1'in3_0 + -1'in3_2 + in2_1 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -2'in4_0 + -1'in4_1 + -2'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_0 + -1'aux6_2 + -1'aux7_0 + -1'aux7_2 + -2'c9_0 + -1'aux5_0 + -1'aux5_2 + -1'c12_0 + aux16_1 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -1'aux13_0 + -1'aux13_2 + -4'c17_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_2 + -1'out1_0 + -1'out1_2 + -1'out5_0 + -1'out5_2 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_2 + -4'out2_0 + -3'out2_1 + -4'out2_2 + -3'out2_3 + -3'out2_4 + -3'out2_5 + -3'out2_6 + -3'out2_7 + -1'out8_0 + -1'out8_2 + out7_1 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_1 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = -2
invariant :-2'c16_0 + 3'aux9_0 + 3'aux9_1 + 2'aux9_2 + 3'aux9_3 + 3'aux9_4 + 3'aux9_5 + 3'aux9_6 + 3'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + 4'in4_0 + 4'in4_1 + 3'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + -1'aux8_2 + -1'aux6_2 + 2'aux7_0 + 2'aux7_1 + aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c9_0 + -1'aux5_2 + 2'c11_0 + -1'aux16_2 + 2'aux13_0 + 2'aux13_1 + aux13_2 + 2'aux13_3 + 2'aux13_4 + 2'aux13_5 + 2'aux13_6 + 2'aux13_7 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + 2'aux14_0 + 2'aux14_1 + aux14_2 + 2'aux14_3 + 2'aux14_4 + 2'aux14_5 + 2'aux14_6 + 2'aux14_7 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + 2'out3_0 + 2'out3_1 + out3_2 + 2'out3_3 + 2'out3_4 + 2'out3_5 + 2'out3_6 + 2'out3_7 + out2_0 + out2_1 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out8_2 + 2'out7_0 + 2'out7_1 + out7_2 + 2'out7_3 + 2'out7_4 + 2'out7_5 + 2'out7_6 + 2'out7_7 + 2'out6_0 + 2'out6_1 + out6_2 + 2'out6_3 + 2'out6_4 + 2'out6_5 + 2'out6_6 + 2'out6_7 = 7
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + in3_3 + in2_3 + in4_3 + aux8_3 + aux6_3 + aux7_3 + aux5_3 + aux16_3 + aux13_3 + aux15_3 + aux14_3 + out1_3 + out5_3 + out4_3 + out3_3 + out2_3 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 + out7_0 + out7_1 + out7_2 + 2'out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_3 = 1
invariant :6'c16_0 + aux9_0 + -1'aux9_1 + 2'aux9_2 + -1'aux9_3 + -1'aux9_4 + aux9_5 + aux9_6 + -1'aux9_7 + 2'aux10_0 + 3'aux10_2 + 2'aux10_5 + 2'aux10_6 + -1'aux11_0 + -3'aux11_1 + -3'aux11_3 + -3'aux11_4 + -1'aux11_5 + -1'aux11_6 + -3'aux11_7 + 2'aux12_0 + 3'aux12_2 + 2'aux12_5 + 2'aux12_6 + -2'in1_1 + in1_2 + -2'in1_3 + -2'in1_4 + -2'in1_7 + 4'in3_0 + 2'in3_1 + 5'in3_2 + 2'in3_3 + 2'in3_4 + 4'in3_5 + 4'in3_6 + 2'in3_7 + -2'in2_1 + in2_2 + -2'in2_3 + -2'in2_4 + -2'in2_7 + -2'in4_1 + in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_7 + -2'aux8_1 + aux8_2 + -2'aux8_3 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 3'aux6_2 + 2'aux6_5 + 2'aux6_6 + -2'aux7_1 + aux7_2 + -2'aux7_3 + -2'aux7_4 + -2'aux7_7 + 2'aux5_0 + 3'aux5_2 + 2'aux5_5 + 2'aux5_6 + 2'c12_0 + -2'c11_0 + -2'aux16_1 + aux16_2 + -2'aux16_3 + -2'aux16_4 + -2'aux16_7 + -2'aux13_1 + aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 10'c17_0 + -1'aux15_0 + -3'aux15_1 + -3'aux15_3 + -3'aux15_4 + -1'aux15_5 + -1'aux15_6 + -3'aux15_7 + -2'aux14_1 + aux14_2 + -2'aux14_3 + -2'aux14_4 + -2'aux14_7 + 2'out1_0 + 3'out1_2 + 2'out1_5 + 2'out1_6 + 2'out5_0 + 3'out5_2 + 2'out5_5 + 2'out5_6 + -1'out4_0 + -3'out4_1 + -3'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -3'out4_7 + -2'out3_1 + out3_2 + -2'out3_3 + -2'out3_4 + -2'out3_7 + 7'out2_0 + 5'out2_1 + 8'out2_2 + 5'out2_3 + 5'out2_4 + 7'out2_5 + 7'out2_6 + 5'out2_7 + 2'out8_0 + 3'out8_2 + 2'out8_5 + 2'out8_6 + -2'out7_0 + -4'out7_1 + -1'out7_2 + -4'out7_3 + -4'out7_4 + -2'out7_5 + -2'out7_6 + -4'out7_7 + -2'out6_0 + -4'out6_1 + -1'out6_2 + -4'out6_3 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 = 1
invariant :aux9_7 + aux10_7 + aux11_7 + aux12_7 + in1_7 + in3_7 + in2_7 + in4_7 + aux8_7 + aux6_7 + aux7_7 + aux5_7 + aux16_7 + aux13_7 + aux15_7 + aux14_7 + out1_7 + out5_7 + out4_7 + out3_7 + out2_7 + out8_7 + out7_7 + out6_7 = 1
invariant :2'c16_0 + 2'c15_0 + 2'c17_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_3 + 2'out2_4 + 2'out2_5 + 2'out2_6 + 2'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + 4'c7_0 + 4'in3_0 + 4'in3_1 + 3'in3_2 + 4'in3_3 + 4'in3_4 + 4'in3_5 + 4'in3_6 + 4'in3_7 + -1'in2_2 + -4'in4_0 + -4'in4_1 + -5'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -4'c9_0 + 2'aux5_0 + 2'aux5_1 + aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :6'c16_0 + 2'aux9_2 + -2'aux9_3 + -2'aux9_7 + 2'aux10_0 + 2'aux10_1 + 4'aux10_2 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + -2'aux11_0 + -2'aux11_1 + -4'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -4'aux11_7 + 2'aux12_2 + -2'aux12_3 + -2'aux12_7 + 2'in1_2 + -2'in1_3 + -2'in1_7 + 2'in3_2 + -2'in3_3 + -2'in3_7 + 2'in2_2 + -2'in2_3 + -2'in2_7 + 2'in4_2 + -2'in4_3 + -2'in4_7 + 2'aux8_2 + -2'aux8_3 + -2'aux8_7 + 2'aux6_2 + -2'aux6_3 + -2'aux6_7 + 2'aux7_2 + -2'aux7_3 + -2'aux7_7 + 2'aux5_2 + -2'aux5_3 + -2'aux5_7 + -4'c11_0 + 2'aux16_2 + -2'aux16_3 + -2'aux16_7 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -3'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -3'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -4'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -3'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + 2'out1_2 + -2'out1_3 + -2'out1_7 + 2'out5_2 + -2'out5_3 + -2'out5_7 + -2'out4_0 + -2'out4_1 + -4'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -4'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -3'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -3'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 3'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 3'out2_7 + 2'out8_0 + 2'out8_1 + 4'out8_2 + 2'out8_4 + 2'out8_5 + 2'out8_6 + -3'out7_0 + -3'out7_1 + -1'out7_2 + -5'out7_3 + -3'out7_4 + -3'out7_5 + -3'out7_6 + -5'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -3'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -3'out6_7 = -2
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 4'c5_0 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -4'in3_2 + -4'in3_3 + -4'in3_4 + -4'in3_5 + -4'in3_6 + -4'in3_7 + 4'in4_0 + 4'in4_1 + 4'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -2'c17_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 2'c8_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in3_5 + in2_5 + in4_5 + aux8_5 + aux6_5 + aux7_5 + aux5_5 + aux16_5 + aux13_5 + aux15_5 + aux14_5 + out1_5 + out5_5 + out4_5 + out3_5 + out2_5 + out8_5 + out7_5 + out6_5 = 1
invariant :c19_0 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c14_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c16_0 + aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in3_2 + in2_2 + in4_2 + aux8_2 + aux6_2 + aux7_2 + aux5_2 + aux16_2 + aux13_2 + 2'c17_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_2 + out1_2 + out5_2 + -1'out4_0 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_2 + out2_0 + out2_1 + 2'out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_2 + out7_2 + out6_2 = 1
invariant :6'c16_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 5'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 5'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-1'aux9_5 + -1'aux10_5 + -1'aux11_5 + -1'aux12_5 + in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -2'in3_5 + -1'in3_6 + -1'in3_7 + -1'in2_5 + -1'in4_5 + -1'aux8_5 + -1'aux6_5 + -1'aux7_5 + -1'aux5_5 + -1'aux16_5 + -1'aux13_5 + -1'aux15_5 + -1'aux14_5 + -1'out1_5 + -1'out5_5 + -1'out4_5 + -1'out3_5 + -1'out2_5 + -1'out8_5 + -1'out7_5 + -1'out6_5 = -1
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :c20_0 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -1'aux5_2 + 2'c110_0 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :c18_0 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + aux8_0 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_2 + -1'aux7_2 + -2'c9_0 + -1'aux5_2 + -1'c12_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :aux9_1 + aux10_1 + aux11_1 + aux12_1 + in1_1 + in3_1 + in2_1 + in4_1 + aux8_1 + aux6_1 + aux7_1 + aux5_1 + aux16_1 + aux13_1 + aux15_1 + aux14_1 + -1'out1_0 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out5_1 + out4_1 + out3_1 + out2_0 + 2'out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_1 + out7_1 + out6_1 = 1
invariant :4'c16_0 + 4'c13_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_2 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + aux13_0 + aux13_1 + 3'aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + 4'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + out3_0 + out3_1 + 3'out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + 3'out2_0 + 3'out2_1 + 5'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-10'c16_0 + aux9_0 + aux9_1 + -2'aux9_2 + 3'aux9_3 + 3'aux9_4 + aux9_5 + aux9_6 + 3'aux9_7 + -2'aux10_0 + -2'aux10_1 + -5'aux10_2 + -2'aux10_5 + -2'aux10_6 + 3'aux11_0 + 3'aux11_1 + 5'aux11_3 + 5'aux11_4 + 3'aux11_5 + 3'aux11_6 + 5'aux11_7 + -2'aux12_0 + -2'aux12_1 + -5'aux12_2 + -2'aux12_5 + -2'aux12_6 + -3'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_7 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -7'in3_2 + -2'in3_3 + -2'in3_4 + -4'in3_5 + -4'in3_6 + -2'in3_7 + -3'in2_2 + 2'in2_3 + 2'in2_4 + 2'in2_7 + 4'in4_0 + 4'in4_1 + in4_2 + 6'in4_3 + 6'in4_4 + 4'in4_5 + 4'in4_6 + 6'in4_7 + -3'aux8_2 + 2'aux8_3 + 2'aux8_4 + 2'aux8_7 + -3'aux6_2 + 2'aux6_3 + 2'aux6_4 + 2'aux6_7 + -3'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 4'c9_0 + -2'aux5_0 + -2'aux5_1 + -5'aux5_2 + -2'aux5_5 + -2'aux5_6 + -4'c12_0 + 2'c11_0 + -3'aux16_2 + 2'aux16_3 + 2'aux16_4 + 2'aux16_7 + 2'aux13_0 + 2'aux13_1 + -1'aux13_2 + 4'aux13_3 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -14'c17_0 + 3'aux15_0 + 3'aux15_1 + 5'aux15_3 + 5'aux15_4 + 3'aux15_5 + 3'aux15_6 + 5'aux15_7 + 2'aux14_0 + 2'aux14_1 + -1'aux14_2 + 4'aux14_3 + 4'aux14_4 + 2'aux14_5 + 2'aux14_6 + 4'aux14_7 + -3'out1_2 + 2'out1_3 + 2'out1_4 + 2'out1_7 + -2'out5_0 + -2'out5_1 + -5'out5_2 + -2'out5_5 + -2'out5_6 + 3'out4_0 + 3'out4_1 + 5'out4_3 + 5'out4_4 + 3'out4_5 + 3'out4_6 + 5'out4_7 + 2'out3_0 + 2'out3_1 + -1'out3_2 + 4'out3_3 + 4'out3_4 + 2'out3_5 + 2'out3_6 + 4'out3_7 + -9'out2_0 + -9'out2_1 + -12'out2_2 + -7'out2_3 + -7'out2_4 + -9'out2_5 + -9'out2_6 + -7'out2_7 + -2'out8_0 + -2'out8_1 + -5'out8_2 + -2'out8_5 + -2'out8_6 + 4'out7_0 + 4'out7_1 + out7_2 + 6'out7_3 + 6'out7_4 + 4'out7_5 + 4'out7_6 + 6'out7_7 + 4'out6_0 + 4'out6_1 + out6_2 + 6'out6_3 + 6'out6_4 + 4'out6_5 + 4'out6_6 + 6'out6_7 = 3
invariant :2'c16_0 + 2'aux9_0 + aux9_1 + 2'aux9_2 + aux9_3 + aux9_4 + aux9_5 + aux9_6 + aux9_7 + aux10_0 + aux10_2 + -1'aux11_1 + -1'aux11_3 + -1'aux11_4 + -1'aux11_5 + -1'aux11_6 + -1'aux11_7 + aux12_0 + aux12_2 + in1_0 + in1_2 + in3_0 + in3_2 + in2_0 + in2_2 + in4_0 + in4_2 + -1'aux8_1 + -1'aux8_3 + -1'aux8_4 + -1'aux8_5 + -1'aux8_6 + -1'aux8_7 + aux6_0 + aux6_2 + aux7_0 + aux7_2 + 2'c9_0 + aux5_0 + aux5_2 + c12_0 + -1'aux16_1 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + aux13_0 + aux13_2 + 4'c17_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_2 + out1_0 + out1_2 + out5_0 + out5_2 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_0 + out3_2 + 4'out2_0 + 3'out2_1 + 4'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + out8_0 + out8_2 + -1'out7_1 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_1 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + -2'aux9_5 + -2'aux9_6 + -2'aux9_7 + 2'c6_0 + 4'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -4'in4_0 + -4'in4_1 + -4'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -4'c9_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = -4
invariant :-2'c16_0 + -2'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_0 + -1'aux10_2 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_0 + -1'aux12_2 + -1'in1_0 + -1'in1_2 + -1'in3_0 + -1'in3_2 + in2_1 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -2'in4_0 + -1'in4_1 + -2'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_0 + -1'aux6_2 + -1'aux7_0 + -1'aux7_2 + -2'c9_0 + -1'aux5_0 + -1'aux5_2 + -1'c12_0 + aux16_1 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -1'aux13_0 + -1'aux13_2 + -4'c17_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_2 + -1'out1_0 + -1'out1_2 + -1'out5_0 + -1'out5_2 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_2 + -4'out2_0 + -3'out2_1 + -4'out2_2 + -3'out2_3 + -3'out2_4 + -3'out2_5 + -3'out2_6 + -3'out2_7 + -1'out8_0 + -1'out8_2 + out7_1 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_1 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = -2
invariant :-2'c16_0 + 3'aux9_0 + 3'aux9_1 + 2'aux9_2 + 3'aux9_3 + 3'aux9_4 + 3'aux9_5 + 3'aux9_6 + 3'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + 4'in4_0 + 4'in4_1 + 3'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + -1'aux8_2 + -1'aux6_2 + 2'aux7_0 + 2'aux7_1 + aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c9_0 + -1'aux5_2 + 2'c11_0 + -1'aux16_2 + 2'aux13_0 + 2'aux13_1 + aux13_2 + 2'aux13_3 + 2'aux13_4 + 2'aux13_5 + 2'aux13_6 + 2'aux13_7 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + 2'aux14_0 + 2'aux14_1 + aux14_2 + 2'aux14_3 + 2'aux14_4 + 2'aux14_5 + 2'aux14_6 + 2'aux14_7 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + 2'out3_0 + 2'out3_1 + out3_2 + 2'out3_3 + 2'out3_4 + 2'out3_5 + 2'out3_6 + 2'out3_7 + out2_0 + out2_1 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out8_2 + 2'out7_0 + 2'out7_1 + out7_2 + 2'out7_3 + 2'out7_4 + 2'out7_5 + 2'out7_6 + 2'out7_7 + 2'out6_0 + 2'out6_1 + out6_2 + 2'out6_3 + 2'out6_4 + 2'out6_5 + 2'out6_6 + 2'out6_7 = 7
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + in3_3 + in2_3 + in4_3 + aux8_3 + aux6_3 + aux7_3 + aux5_3 + aux16_3 + aux13_3 + aux15_3 + aux14_3 + out1_3 + out5_3 + out4_3 + out3_3 + out2_3 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 + out7_0 + out7_1 + out7_2 + 2'out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_3 = 1
invariant :6'c16_0 + aux9_0 + -1'aux9_1 + 2'aux9_2 + -1'aux9_3 + -1'aux9_4 + aux9_5 + aux9_6 + -1'aux9_7 + 2'aux10_0 + 3'aux10_2 + 2'aux10_5 + 2'aux10_6 + -1'aux11_0 + -3'aux11_1 + -3'aux11_3 + -3'aux11_4 + -1'aux11_5 + -1'aux11_6 + -3'aux11_7 + 2'aux12_0 + 3'aux12_2 + 2'aux12_5 + 2'aux12_6 + -2'in1_1 + in1_2 + -2'in1_3 + -2'in1_4 + -2'in1_7 + 4'in3_0 + 2'in3_1 + 5'in3_2 + 2'in3_3 + 2'in3_4 + 4'in3_5 + 4'in3_6 + 2'in3_7 + -2'in2_1 + in2_2 + -2'in2_3 + -2'in2_4 + -2'in2_7 + -2'in4_1 + in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_7 + -2'aux8_1 + aux8_2 + -2'aux8_3 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 3'aux6_2 + 2'aux6_5 + 2'aux6_6 + -2'aux7_1 + aux7_2 + -2'aux7_3 + -2'aux7_4 + -2'aux7_7 + 2'aux5_0 + 3'aux5_2 + 2'aux5_5 + 2'aux5_6 + 2'c12_0 + -2'c11_0 + -2'aux16_1 + aux16_2 + -2'aux16_3 + -2'aux16_4 + -2'aux16_7 + -2'aux13_1 + aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 10'c17_0 + -1'aux15_0 + -3'aux15_1 + -3'aux15_3 + -3'aux15_4 + -1'aux15_5 + -1'aux15_6 + -3'aux15_7 + -2'aux14_1 + aux14_2 + -2'aux14_3 + -2'aux14_4 + -2'aux14_7 + 2'out1_0 + 3'out1_2 + 2'out1_5 + 2'out1_6 + 2'out5_0 + 3'out5_2 + 2'out5_5 + 2'out5_6 + -1'out4_0 + -3'out4_1 + -3'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -3'out4_7 + -2'out3_1 + out3_2 + -2'out3_3 + -2'out3_4 + -2'out3_7 + 7'out2_0 + 5'out2_1 + 8'out2_2 + 5'out2_3 + 5'out2_4 + 7'out2_5 + 7'out2_6 + 5'out2_7 + 2'out8_0 + 3'out8_2 + 2'out8_5 + 2'out8_6 + -2'out7_0 + -4'out7_1 + -1'out7_2 + -4'out7_3 + -4'out7_4 + -2'out7_5 + -2'out7_6 + -4'out7_7 + -2'out6_0 + -4'out6_1 + -1'out6_2 + -4'out6_3 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 = 1
invariant :aux9_7 + aux10_7 + aux11_7 + aux12_7 + in1_7 + in3_7 + in2_7 + in4_7 + aux8_7 + aux6_7 + aux7_7 + aux5_7 + aux16_7 + aux13_7 + aux15_7 + aux14_7 + out1_7 + out5_7 + out4_7 + out3_7 + out2_7 + out8_7 + out7_7 + out6_7 = 1
invariant :2'c16_0 + 2'c15_0 + 2'c17_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_3 + 2'out2_4 + 2'out2_5 + 2'out2_6 + 2'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + 4'c7_0 + 4'in3_0 + 4'in3_1 + 3'in3_2 + 4'in3_3 + 4'in3_4 + 4'in3_5 + 4'in3_6 + 4'in3_7 + -1'in2_2 + -4'in4_0 + -4'in4_1 + -5'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -4'c9_0 + 2'aux5_0 + 2'aux5_1 + aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -1
invariant :6'c16_0 + 2'aux9_2 + -2'aux9_3 + -2'aux9_7 + 2'aux10_0 + 2'aux10_1 + 4'aux10_2 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + -2'aux11_0 + -2'aux11_1 + -4'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -4'aux11_7 + 2'aux12_2 + -2'aux12_3 + -2'aux12_7 + 2'in1_2 + -2'in1_3 + -2'in1_7 + 2'in3_2 + -2'in3_3 + -2'in3_7 + 2'in2_2 + -2'in2_3 + -2'in2_7 + 2'in4_2 + -2'in4_3 + -2'in4_7 + 2'aux8_2 + -2'aux8_3 + -2'aux8_7 + 2'aux6_2 + -2'aux6_3 + -2'aux6_7 + 2'aux7_2 + -2'aux7_3 + -2'aux7_7 + 2'aux5_2 + -2'aux5_3 + -2'aux5_7 + -4'c11_0 + 2'aux16_2 + -2'aux16_3 + -2'aux16_7 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -3'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -3'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -4'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -3'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + 2'out1_2 + -2'out1_3 + -2'out1_7 + 2'out5_2 + -2'out5_3 + -2'out5_7 + -2'out4_0 + -2'out4_1 + -4'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -4'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -3'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -3'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 3'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 3'out2_7 + 2'out8_0 + 2'out8_1 + 4'out8_2 + 2'out8_4 + 2'out8_5 + 2'out8_6 + -3'out7_0 + -3'out7_1 + -1'out7_2 + -5'out7_3 + -3'out7_4 + -3'out7_5 + -3'out7_6 + -5'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -3'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -3'out6_7 = -2
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 4'c5_0 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -4'in3_2 + -4'in3_3 + -4'in3_4 + -4'in3_5 + -4'in3_6 + -4'in3_7 + 4'in4_0 + 4'in4_1 + 4'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -2'c17_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 2'c8_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 4
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in3_5 + in2_5 + in4_5 + aux8_5 + aux6_5 + aux7_5 + aux5_5 + aux16_5 + aux13_5 + aux15_5 + aux14_5 + out1_5 + out5_5 + out4_5 + out3_5 + out2_5 + out8_5 + out7_5 + out6_5 = 1
invariant :c19_0 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c14_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c16_0 + aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in3_2 + in2_2 + in4_2 + aux8_2 + aux6_2 + aux7_2 + aux5_2 + aux16_2 + aux13_2 + 2'c17_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_2 + out1_2 + out5_2 + -1'out4_0 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_2 + out2_0 + out2_1 + 2'out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_2 + out7_2 + out6_2 = 1
invariant :6'c16_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 5'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 5'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 2
invariant :-1'aux9_5 + -1'aux10_5 + -1'aux11_5 + -1'aux12_5 + in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -2'in3_5 + -1'in3_6 + -1'in3_7 + -1'in2_5 + -1'in4_5 + -1'aux8_5 + -1'aux6_5 + -1'aux7_5 + -1'aux5_5 + -1'aux16_5 + -1'aux13_5 + -1'aux15_5 + -1'aux14_5 + -1'out1_5 + -1'out5_5 + -1'out4_5 + -1'out3_5 + -1'out2_5 + -1'out8_5 + -1'out7_5 + -1'out6_5 = -1
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 = 0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility\_COL\_01\_flat\_flat,52537,2.8774,84816,2,97783,5,337388,6,0,1766,88724,0
Total reachable state count : 52537

Verifying 16 reachability properties.
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-00 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-00,0,2.96129,84848,1,0,5,337388,7,0,1779,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-01 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-01,0,3.08036,84912,1,0,5,337388,8,0,1813,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-02 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-02,0,3.1962,84912,1,0,5,337388,9,0,1843,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-03 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-03,0,3.39461,84912,1,0,5,337388,10,0,1946,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-04 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-04,0,3.52521,84912,1,0,5,337388,11,0,1947,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-05 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-05,2,3.72066,84912,2,212,6,337388,12,0,2064,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-06 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-06,0,3.88062,84912,1,0,6,337388,13,0,2152,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-07 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-07,0,3.8833,84912,1,0,6,337388,14,0,2174,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-08 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-08,288,3.88464,84912,2,2026,7,337388,15,0,2183,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-09 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-09,1,3.88807,84912,2,209,8,337388,16,0,2204,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-10 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-10,0,4.09298,84912,1,0,8,337388,17,0,2278,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-11 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-11,28032,4.37914,84912,2,37833,9,337388,18,0,2351,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-12 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-12,0,4.51026,84912,1,0,9,337388,19,0,2422,88724,0
Invariant property PermAdmissibility-COL-01-ReachabilityCardinality-13 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-13,0,4.5972,84912,1,0,9,337388,20,0,2455,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-14 is true.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-14,2,4.59863,84912,2,212,9,337388,21,0,2471,88724,0
Reachability property PermAdmissibility-COL-01-ReachabilityCardinality-15 does not hold.
FORMULA PermAdmissibility-COL-01-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : PermAdmissibility-COL-01-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-ReachabilityCardinality-15,0,4.60528,84912,1,0,9,337388,22,0,2490,88724,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1552924384315

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 3:52:31 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 3:52:31 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 3:52:32 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 24846 ms
Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in3,in2,in4,aux8,aux6,aux7,aux5,aux16,aux13,aux15,aux14,out1,out5,out4,out3,out2,out8,out7,out6,
Dot->c16,c15,c14,c13,c6,c5,c8,c7,c9,c12,c110,c11,c17,c20,c18,c19,

Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
Mar 18, 2019 3:52:56 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 18, 2019 3:52:56 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Mar 18, 2019 3:52:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 117 ms
Mar 18, 2019 3:52:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
Mar 18, 2019 3:52:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 112 ms
Mar 18, 2019 3:52:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 28 ms
Mar 18, 2019 3:52:58 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 25 ms.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 6 ms.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable PermAdmissibility-COL-01-ReachabilityCardinality-00
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 931 ms.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-01(UNSAT) depth K=0 took 24 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-02(UNSAT) depth K=0 took 32 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 270 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-03(UNSAT) depth K=0 took 14 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-04(UNSAT) depth K=0 took 13 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-05(UNSAT) depth K=0 took 10 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-06(UNSAT) depth K=0 took 13 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 4 ms.
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-07(UNSAT) depth K=0 took 8 ms
Mar 18, 2019 3:52:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-08(UNSAT) depth K=0 took 10 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-09(UNSAT) depth K=0 took 15 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-10(UNSAT) depth K=0 took 3 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-12(UNSAT) depth K=0 took 12 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-14(UNSAT) depth K=0 took 12 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-15(UNSAT) depth K=0 took 8 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-01(UNSAT) depth K=1 took 19 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-02(UNSAT) depth K=1 took 26 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-03(UNSAT) depth K=1 took 18 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-04(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-05(UNSAT) depth K=1 took 17 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-06(UNSAT) depth K=1 took 18 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-07(UNSAT) depth K=1 took 4 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-08(UNSAT) depth K=1 took 1 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-09(UNSAT) depth K=1 took 3 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-10(UNSAT) depth K=1 took 9 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-11(UNSAT) depth K=1 took 5 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-12(UNSAT) depth K=1 took 3 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-13(UNSAT) depth K=1 took 10 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-14(UNSAT) depth K=1 took 14 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-15(UNSAT) depth K=1 took 5 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 114 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-01(UNSAT) depth K=2 took 159 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-02(UNSAT) depth K=2 took 49 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-03(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-04(UNSAT) depth K=2 took 56 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-05(UNSAT) depth K=2 took 104 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-06(UNSAT) depth K=2 took 149 ms
Mar 18, 2019 3:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-07(UNSAT) depth K=2 took 112 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-08(UNSAT) depth K=2 took 70 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-09(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-10(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-11(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-12(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-13(UNSAT) depth K=2 took 53 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-14(UNSAT) depth K=2 took 60 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-15(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-01(UNSAT) depth K=3 took 138 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-02(UNSAT) depth K=3 took 159 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-03(UNSAT) depth K=3 took 131 ms
Mar 18, 2019 3:53:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-04(UNSAT) depth K=3 took 141 ms
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2476 ms
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 81 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 42 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:53:02 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2288 ms
Mar 18, 2019 3:53:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-05(UNSAT) depth K=3 took 1112 ms
Mar 18, 2019 3:53:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-06(UNSAT) depth K=3 took 194 ms
Mar 18, 2019 3:53:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-07(UNSAT) depth K=3 took 186 ms
Mar 18, 2019 3:53:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-08(UNSAT) depth K=3 took 185 ms
Mar 18, 2019 3:53:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-01-ReachabilityCardinality-09(UNSAT) depth K=3 took 224 ms
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying PermAdmissibility-COL-01-ReachabilityCardinality-10 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying PermAdmissibility-COL-01-ReachabilityCardinality-02 K-induction depth 0
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:766)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:502)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 16 properties. Interrupting other analysis methods.
Mar 18, 2019 3:53:04 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 5243ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-01"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-01, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272230700368"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-01.tgz
mv PermAdmissibility-COL-01 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;