Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272230400247.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is PaceMaker-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272230400247
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 328K
-rw-r--r-- 1 mcc users 4.0K Feb 12 03:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 12 03:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Feb 8 02:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 8 02:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.5K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 104 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 342 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 00:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 5 00:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 4 07:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 4 07:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Feb 1 01:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 1 01:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 158K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-00
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-01
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-02
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-03
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-04
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-05
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-06
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-07
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-08
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-09
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-10
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-11
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-12
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-13
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-14
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1552922061351

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLCardinality.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLCardinality.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLCardinality.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLCardinality.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,0.473779,21392,2,1248,5,78057,6,0,1071,89663,0


Converting to forward existential form...Done !
original formula: !((AG(!((SIG_Vbeat>=2))) + !(EG((SIG_Aget<=SIG_VgetOut)))))
=> equivalent forward existential formula: [FwdG((Init * !(!(E(TRUE U !(!((SIG_Vbeat>=2))))))),(SIG_Aget<=SIG_VgetOut))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions EMPTY_APOut, EMPTY_NextVtrBeat, EMPTY_VPOut, I950_L_Wait4VSynch, I702_L_Wait4VBeat, I881_S_retroAVJ_L_Retro, I880_S_retroAVJ_L_Ante_L_Retro, I879_S_retroAVJ_L_Empty_L_Retro, I878_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_a_dvHigh, I877_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_a_dVLow, I876_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_Recovery_L_a_dVLow, I875_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_Recovery_L_a_dvHigh, I874_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_AVJAnteReachedHigh_L_a_dvHigh, I873_S_tr_AVJ_L_Ante_S_AVJAnteReached_AVJAnteReached_L_a_dVLow, I872_S_Abeat_S_a_dVSetLow_L_Wait4ABeat, I869_S_Abeat_S_a_dVSetHigh_L_a_dVLow_L_q0, I868_S_Abeat_L_Excitable_S_a_dVSetLow_L_Wait4ABeat, I865_S_Abeat_L_Excitable_S_a_dVSetHigh_L_a_dVLow_L_q0, I864_S_NextAtrBeat_L_ASynch_NextAtrBeat, I863_S_NextAtrBeat_L_ASynch_L_Wait4ASynch, I706_L_Wait4ABeat, I855_S_VtrAnteReached_L_Ante, I852_S_vrg_L_GenerateRetroWave_L_Empty, I851_S_vrg_L_GenerateRetroWave_L_Ante, I843_S_AVJRetroReached_L_Retro, I842_S_AVJRetroReached_L_Recovery_L_Retro, I841_S_AVJRetroReached_AVJRetroReached_L_Retro, I840_S_anteAVJ_L_Ante, I839_S_anteAVJ_L_Ante_L_Empty, I838_S_anteAVJ_L_Ante_L_Retro, I829_S_AVJRetroExit_L_Retro, I828_S_AVJAnteExit_L_Ante, I827_S_AVJRetroExit_L_Retro, I826_S_AVJAnteExit_L_Ante, I700_init, I696_L_Refractory, I694_L_Refractory, I692_L_Refractory, I311_L_VsenseAnte, I309_L_Vsense, I849_S_AtrRetroReached_L_Retro, I846_S_arg_L_GenerateAnteWave_L_Empty, I845_S_arg_L_GenerateAnteWave_L_Retro, I307_L_AsenseRetro, I616_L_Asense, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164
(forward)formula 0,0,1.14278,40140,1,0,357,268570,356,166,5746,164703,334
FORMULA PaceMaker-PT-none-CTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(((!(A_SIG_VgetOut>=2))||((RAConductor<=SIG_IncrClk)||(A_AVJOut>=1))) U ((!(A_Atrium<=A_VRGEctopic))&&((SIG_VP<=A_VtrNoiseGenerator)&&(A_SANode<=A_SIG_VP))))
=> equivalent forward existential formula: [(FwdU(Init,((!(A_SIG_VgetOut>=2))||((RAConductor<=SIG_IncrClk)||(A_AVJOut>=1)))) * ((!(A_Atrium<=A_VRGEctopic))&&((SIG_VP<=A_VtrNoiseGenerator)&&(A_SANode<=A_SIG_VP))))] != FALSE
(forward)formula 1,0,1.14641,40404,1,0,357,268610,357,166,5760,164710,334
FORMULA PaceMaker-PT-none-CTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: ((!(AF((A_SIG_VP>=3))) + (SIG_VgetOut>=3)) * ((AF((VRGEctopic>=3)) + ((SIG_APOut<=SIG_VPOut)&&((A_VtrNoiseGenerator>=3)&&(A_RVConductor>=1)))) * E((RVConductor>=3) U (PVARP<=A_A_dV))))
=> equivalent forward existential formula: ([((Init * !((SIG_VgetOut>=3))) * !(EG(!((A_SIG_VP>=3)))))] = FALSE * ([FwdG((Init * !(((SIG_APOut<=SIG_VPOut)&&((A_VtrNoiseGenerator>=3)&&(A_RVConductor>=1))))),!((VRGEctopic>=3)))] = FALSE * [(Init * !(E((RVConductor>=3) U (PVARP<=A_A_dV))))] = FALSE))
(forward)formula 2,0,1.15065,40668,1,0,357,268610,359,167,5776,164777,336
FORMULA PaceMaker-PT-none-CTLCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF(AG(((A_AVJ<=A_URIState)||(AVJOut<=A_AVJOut))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(((A_AVJ<=A_URIState)||(AVJOut<=A_AVJOut))))))] != FALSE
(forward)formula 3,1,10.1191,280516,1,0,392,1.50993e+06,363,186,5904,1.45672e+06,382
FORMULA PaceMaker-PT-none-CTLCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF(((((A_LRI>=1)||(A_VRG>=2))&&(!(A_AVJOut>=1))) * EF((SIG_VP>=3))))
=> equivalent forward existential formula: [(FwdU((FwdU(Init,TRUE) * (((A_LRI>=1)||(A_VRG>=2))&&(!(A_AVJOut>=1)))),TRUE) * (SIG_VP>=3))] != FALSE
(forward)formula 4,0,10.1195,280780,1,0,392,1.50993e+06,364,186,5905,1.45672e+06,382
FORMULA PaceMaker-PT-none-CTLCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF(((!(A_RVConductor>=2))&&(((A_SIG_VP<=A_SIG_Aget)&&(AVI<=A_SANodeEctopic))||((URIState>=3)||(A_URIState<=SIG_State)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((!(A_RVConductor>=2))&&(((A_SIG_VP<=A_SIG_Aget)&&(AVI<=A_SANodeEctopic))||((URIState>=3)||(A_URIState<=SIG_State)))))] != FALSE
(forward)formula 5,0,10.1205,280780,1,0,392,1.50993e+06,365,186,5914,1.45672e+06,382
FORMULA PaceMaker-PT-none-CTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AX((EX((A_VRGEctopic<=A_VRG)) * EF((A_SANodeEctopic<=SIG_AP))))
=> equivalent forward existential formula: ([(EY(Init) * !(EX((A_VRGEctopic<=A_VRG))))] = FALSE * [(EY(Init) * !(E(TRUE U (A_SANodeEctopic<=SIG_AP))))] = FALSE)
(forward)formula 6,0,10.1233,280780,1,0,393,1.51007e+06,366,187,5919,1.45688e+06,384
FORMULA PaceMaker-PT-none-CTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF(!((A_LRI<=PVARP)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !((A_LRI<=PVARP)))] != FALSE
(forward)formula 7,0,10.1253,281044,1,0,393,1.51007e+06,368,187,5935,1.45688e+06,384
FORMULA PaceMaker-PT-none-CTLCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(((!(VRGEctopic<=RAConductor))||((A_Atrium>=2)&&(SIG_VS<=VRP))) U ((!(VRGEctopic>=1))&&((A_SIG_VS>=2)||(AVI>=1))))
=> equivalent forward existential formula: [(FwdU(Init,((!(VRGEctopic<=RAConductor))||((A_Atrium>=2)&&(SIG_VS<=VRP)))) * ((!(VRGEctopic>=1))&&((A_SIG_VS>=2)||(AVI>=1))))] != FALSE
(forward)formula 8,0,10.1256,281044,1,0,393,1.51007e+06,369,187,5940,1.45688e+06,384
FORMULA PaceMaker-PT-none-CTLCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AF((AG((A_SANode>=2)) + EG((AVJOut<=RAConductor))))
=> equivalent forward existential formula: [FwdG(Init,!((!(E(TRUE U !((A_SANode>=2)))) + EG((AVJOut<=RAConductor)))))] = FALSE
(forward)formula 9,1,10.2923,285796,1,0,397,1.53798e+06,379,190,5993,1.49844e+06,393
FORMULA PaceMaker-PT-none-CTLCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF((!(((A_VtrNoiseGenerator>=2)&&(RAConductor>=2))) * AF((A_SIG_APOut>=2))))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * !(((A_VtrNoiseGenerator>=2)&&(RAConductor>=2)))) * !(EG(!((A_SIG_APOut>=2)))))] != FALSE
(forward)formula 10,0,10.3238,286588,1,0,399,1.54137e+06,382,192,5995,1.51073e+06,399
FORMULA PaceMaker-PT-none-CTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E((((Ventricle>=3)&&(SIG_Vbeat>=2))||(!(SIG_Vget>=3))) U EF((A_VRP<=SIG_AP)))
=> equivalent forward existential formula: [(FwdU(FwdU(Init,(((Ventricle>=3)&&(SIG_Vbeat>=2))||(!(SIG_Vget>=3)))),TRUE) * (A_VRP<=SIG_AP))] != FALSE
(forward)formula 11,0,10.3267,287116,1,0,399,1.54137e+06,383,192,6006,1.51073e+06,399
FORMULA PaceMaker-PT-none-CTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (A(((SIG_VPOut>=3)||(AVJOut>=1)) U ((URI>=3)&&(SIG_Vbeat<=A_SIG_VP))) * AG((A_LRI>=1)))
=> equivalent forward existential formula: (([(FwdU(Init,!(((URI>=3)&&(SIG_Vbeat<=A_SIG_VP)))) * (!(((SIG_VPOut>=3)||(AVJOut>=1))) * !(((URI>=3)&&(SIG_Vbeat<=A_SIG_VP)))))] = FALSE * [FwdG(Init,!(((URI>=3)&&(SIG_Vbeat<=A_SIG_VP))))] = FALSE) * [(FwdU(Init,TRUE) * !((A_LRI>=1)))] = FALSE)
(forward)formula 12,1,10.3295,287644,1,0,400,1.54138e+06,396,193,6026,1.51102e+06,400
FORMULA PaceMaker-PT-none-CTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 3:14:22 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 3:14:22 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 3:14:22 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 57 ms
Mar 18, 2019 3:14:22 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 70 places.
Mar 18, 2019 3:14:23 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 164 transitions.
Mar 18, 2019 3:14:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
Mar 18, 2019 3:14:23 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 66 ms
Mar 18, 2019 3:14:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLCardinality.pnml.gal : 3 ms
Mar 18, 2019 3:14:23 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLCardinality.ctl : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PaceMaker-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is PaceMaker-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272230400247"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PaceMaker-PT-none.tgz
mv PaceMaker-PT-none execution
cd execution
if [ "CTLCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "CTLCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;