Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r096-smll-155246587200161.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r096-smll-155246587200161
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.6K Feb 11 22:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 11 22:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 7 23:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 7 23:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.6K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.8K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Jan 31 23:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 31 23:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 42K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552761921189

18:45:24.046 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
18:45:24.050 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(!(((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)&&(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-01 with value :((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=2)&&((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-02 with value :((!((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)||(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))&&((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-03 with value :((!(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)))&&(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6))||(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=1)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=2)&&(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-05 with value :(((!(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)>=3))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))||(!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)||(((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=3))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-06 with value :(((!(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2))&&((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6))))&&(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=3))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-07 with value :(true)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-08 with value :(((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)&&(!(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=1)))||(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-09 with value :(!((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-10 with value :(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=2)
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-12 with value :((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))||(!(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-13 with value :((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))||(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)>=2))&&((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)>=1)&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-15 with value :(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6772 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 57 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 17313 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 189064 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 1573 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 1433 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 1362 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 64216 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 1905 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 1367 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality11==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 16, 2019 6:45:23 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 16, 2019 6:45:23 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 16, 2019 6:45:23 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1034 ms
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 16, 2019 6:45:24 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 10 ms
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 15.0 instantiations of transitions. Total transitions/syncs built is 423
Mar 16, 2019 6:45:24 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 150 ms
Mar 16, 2019 6:45:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 63 ms
Mar 16, 2019 6:45:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 16, 2019 6:45:25 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 16, 2019 6:45:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 69 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 11 ms.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 18 ms.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 838 ms.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 23 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 23 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 16 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 18 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 6 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 12 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 8 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 28 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 16 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 8 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 14 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 10 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 241 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 12 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 22 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 13 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 13 ms
Mar 16, 2019 6:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 13 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 23 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 25 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 9 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 12 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 16 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 12 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 16 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 88 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 497 ms
Mar 16, 2019 6:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 100 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 551 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 204 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 115 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2150 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 70 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 234 ms
Mar 16, 2019 6:45:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 167 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 195 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2270 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 284 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 182 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 127 ms
Mar 16, 2019 6:45:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 140 ms
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 140 ms
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=0 took 632 ms
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 206 ms
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 94 ms
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 16, 2019 6:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=0 took 714 ms
Mar 16, 2019 6:45:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 1849 ms
Mar 16, 2019 6:45:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-02
Mar 16, 2019 6:45:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-02
Mar 16, 2019 6:45:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(FALSE) depth K=0 took 1690 ms
Mar 16, 2019 6:45:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-03
Mar 16, 2019 6:45:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-03
Mar 16, 2019 6:45:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(FALSE) depth K=0 took 647 ms
Mar 16, 2019 6:45:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 1836 ms
Mar 16, 2019 6:45:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 16, 2019 6:45:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=0 took 1097 ms
Mar 16, 2019 6:45:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 16, 2019 6:45:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=0 took 2588 ms
Mar 16, 2019 6:45:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 16, 2019 6:45:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=0 took 887 ms
Mar 16, 2019 6:45:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 16, 2019 6:45:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=0 took 501 ms
Mar 16, 2019 6:45:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-09
Mar 16, 2019 6:45:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-09
Mar 16, 2019 6:45:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(FALSE) depth K=0 took 1506 ms
Mar 16, 2019 6:45:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 16, 2019 6:45:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=0 took 515 ms
Mar 16, 2019 6:45:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 16, 2019 6:45:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=0 took 552 ms
Mar 16, 2019 6:45:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 16, 2019 6:45:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=0 took 819 ms
Mar 16, 2019 6:45:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=3 took 11205 ms
Mar 16, 2019 6:45:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 3021 ms
Mar 16, 2019 6:45:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-6-ReachabilityCardinality-13
Mar 16, 2019 6:45:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-13
Mar 16, 2019 6:45:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(TRUE) depth K=0 took 8851 ms
Mar 16, 2019 6:45:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 16, 2019 6:45:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=0 took 550 ms
Mar 16, 2019 6:45:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 16, 2019 6:45:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=0 took 2449 ms
Mar 16, 2019 6:45:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 9083 ms
Mar 16, 2019 6:46:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 9648 ms
Mar 16, 2019 6:46:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 1422 ms
Mar 16, 2019 6:46:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 1409 ms
Mar 16, 2019 6:46:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 16, 2019 6:46:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=1 took 16609 ms
Mar 16, 2019 6:46:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 16, 2019 6:46:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=1 took 3732 ms
Mar 16, 2019 6:46:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
Mar 16, 2019 6:46:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 587 ms. Total solver calls (SAT/UNSAT): 65(0/65)
Mar 16, 2019 6:46:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 14482 ms
Mar 16, 2019 6:46:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 16, 2019 6:46:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=1 took 10680 ms
Mar 16, 2019 6:46:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 16, 2019 6:46:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=1 took 1657 ms
Mar 16, 2019 6:46:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/420) took 4151 ms. Total solver calls (SAT/UNSAT): 452(18/434)
Mar 16, 2019 6:46:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/420) took 7687 ms. Total solver calls (SAT/UNSAT): 839(36/803)
Mar 16, 2019 6:46:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 16, 2019 6:46:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=1 took 6566 ms
Mar 16, 2019 6:46:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/420) took 10829 ms. Total solver calls (SAT/UNSAT): 1184(47/1137)
Mar 16, 2019 6:46:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 11019 ms
Mar 16, 2019 6:46:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/420) took 14663 ms. Total solver calls (SAT/UNSAT): 1598(74/1524)
Mar 16, 2019 6:46:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 2874 ms
Mar 16, 2019 6:46:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/420) took 18335 ms. Total solver calls (SAT/UNSAT): 2003(87/1916)
Mar 16, 2019 6:46:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 3556 ms
Mar 16, 2019 6:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 16, 2019 6:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=1 took 11068 ms
Mar 16, 2019 6:46:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/420) took 21945 ms. Total solver calls (SAT/UNSAT): 2399(117/2282)
Mar 16, 2019 6:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 3691 ms
Mar 16, 2019 6:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 1122 ms
Mar 16, 2019 6:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 1611 ms
Mar 16, 2019 6:46:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/420) took 25487 ms. Total solver calls (SAT/UNSAT): 2786(138/2648)
Mar 16, 2019 6:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 16, 2019 6:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=1 took 5003 ms
Mar 16, 2019 6:46:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/420) took 28905 ms. Total solver calls (SAT/UNSAT): 3164(159/3005)
Mar 16, 2019 6:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/420) took 32268 ms. Total solver calls (SAT/UNSAT): 3533(183/3350)
Mar 16, 2019 6:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 16, 2019 6:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=1 took 7186 ms
Mar 16, 2019 6:46:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/420) took 35615 ms. Total solver calls (SAT/UNSAT): 3893(200/3693)
Mar 16, 2019 6:47:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 16, 2019 6:47:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=1 took 4648 ms
Mar 16, 2019 6:47:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/420) took 38841 ms. Total solver calls (SAT/UNSAT): 4244(227/4017)
Mar 16, 2019 6:47:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/420) took 42009 ms. Total solver calls (SAT/UNSAT): 4586(240/4346)
Mar 16, 2019 6:47:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/420) took 45971 ms. Total solver calls (SAT/UNSAT): 5028(278/4750)
Mar 16, 2019 6:47:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 16, 2019 6:47:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=1 took 9798 ms
Mar 16, 2019 6:47:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 16, 2019 6:47:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=1 took 2124 ms
Mar 16, 2019 6:47:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/420) took 49879 ms. Total solver calls (SAT/UNSAT): 5454(302/5152)
Mar 16, 2019 6:47:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 26600 ms
Mar 16, 2019 6:47:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/420) took 53485 ms. Total solver calls (SAT/UNSAT): 5864(336/5528)
Mar 16, 2019 6:47:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/420) took 56849 ms. Total solver calls (SAT/UNSAT): 6258(363/5895)
Mar 16, 2019 6:47:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/420) took 60119 ms. Total solver calls (SAT/UNSAT): 6636(393/6243)
Mar 16, 2019 6:47:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/420) took 63955 ms. Total solver calls (SAT/UNSAT): 7083(393/6690)
Mar 16, 2019 6:47:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/420) took 67707 ms. Total solver calls (SAT/UNSAT): 7526(393/7133)
Mar 16, 2019 6:47:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/420) took 71507 ms. Total solver calls (SAT/UNSAT): 7965(393/7572)
Mar 16, 2019 6:47:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/420) took 75201 ms. Total solver calls (SAT/UNSAT): 8400(439/7961)
Mar 16, 2019 6:47:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/420) took 78883 ms. Total solver calls (SAT/UNSAT): 8831(485/8346)
Mar 16, 2019 6:47:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/420) took 82465 ms. Total solver calls (SAT/UNSAT): 9258(531/8727)
Mar 16, 2019 6:47:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/420) took 86147 ms. Total solver calls (SAT/UNSAT): 9681(575/9106)
Mar 16, 2019 6:47:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/420) took 89837 ms. Total solver calls (SAT/UNSAT): 10100(619/9481)
Mar 16, 2019 6:47:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 39320 ms
Mar 16, 2019 6:47:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/420) took 93407 ms. Total solver calls (SAT/UNSAT): 10515(663/9852)
Mar 16, 2019 6:48:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/420) took 96933 ms. Total solver calls (SAT/UNSAT): 10926(705/10221)
Mar 16, 2019 6:48:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 16, 2019 6:48:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=2 took 49397 ms
Mar 16, 2019 6:48:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/420) took 100439 ms. Total solver calls (SAT/UNSAT): 11333(747/10586)
Mar 16, 2019 6:48:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/420) took 103893 ms. Total solver calls (SAT/UNSAT): 11736(789/10947)
Mar 16, 2019 6:48:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/420) took 107295 ms. Total solver calls (SAT/UNSAT): 12135(829/11306)
Mar 16, 2019 6:48:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/420) took 110671 ms. Total solver calls (SAT/UNSAT): 12530(869/11661)
Mar 16, 2019 6:48:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/420) took 114049 ms. Total solver calls (SAT/UNSAT): 12921(909/12012)
Mar 16, 2019 6:48:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/420) took 117359 ms. Total solver calls (SAT/UNSAT): 13308(947/12361)
Mar 16, 2019 6:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/420) took 120617 ms. Total solver calls (SAT/UNSAT): 13691(985/12706)
Mar 16, 2019 6:48:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/420) took 123917 ms. Total solver calls (SAT/UNSAT): 14070(1023/13047)
Mar 16, 2019 6:48:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/420) took 127091 ms. Total solver calls (SAT/UNSAT): 14445(1059/13386)
Mar 16, 2019 6:48:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/420) took 130283 ms. Total solver calls (SAT/UNSAT): 14816(1095/13721)
Mar 16, 2019 6:48:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/420) took 133391 ms. Total solver calls (SAT/UNSAT): 15183(1131/14052)
Mar 16, 2019 6:48:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/420) took 136441 ms. Total solver calls (SAT/UNSAT): 15530(1149/14381)
Mar 16, 2019 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/420) took 139535 ms. Total solver calls (SAT/UNSAT): 15827(1167/14660)
Mar 16, 2019 6:48:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/420) took 143005 ms. Total solver calls (SAT/UNSAT): 16235(1196/15039)
Mar 16, 2019 6:48:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 53194 ms
Mar 16, 2019 6:48:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/420) took 146043 ms. Total solver calls (SAT/UNSAT): 16590(1251/15339)
Mar 16, 2019 6:48:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 149207 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
Mar 16, 2019 6:48:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 153681 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
Mar 16, 2019 6:49:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 158021 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
Mar 16, 2019 6:49:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 162179 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
Mar 16, 2019 6:49:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/420) took 165569 ms. Total solver calls (SAT/UNSAT): 18800(1449/17351)
Mar 16, 2019 6:49:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/420) took 169717 ms. Total solver calls (SAT/UNSAT): 19286(1449/17837)
Mar 16, 2019 6:49:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/420) took 173907 ms. Total solver calls (SAT/UNSAT): 19763(1483/18280)
Mar 16, 2019 6:49:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/420) took 177893 ms. Total solver calls (SAT/UNSAT): 20231(1534/18697)
Mar 16, 2019 6:49:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 181875 ms. Total solver calls (SAT/UNSAT): 20690(1584/19106)
Mar 16, 2019 6:49:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/420) took 185723 ms. Total solver calls (SAT/UNSAT): 21140(1632/19508)
Mar 16, 2019 6:49:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 189529 ms. Total solver calls (SAT/UNSAT): 21581(1680/19901)
Mar 16, 2019 6:49:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=4 took 48761 ms
Mar 16, 2019 6:49:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/420) took 193217 ms. Total solver calls (SAT/UNSAT): 22013(1725/20288)
Mar 16, 2019 6:49:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/420) took 196813 ms. Total solver calls (SAT/UNSAT): 22436(1770/20666)
Mar 16, 2019 6:49:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/420) took 200311 ms. Total solver calls (SAT/UNSAT): 22850(1813/21037)
Mar 16, 2019 6:49:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
Mar 16, 2019 6:49:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=2 took 103473 ms
Mar 16, 2019 6:49:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/420) took 203803 ms. Total solver calls (SAT/UNSAT): 23255(1855/21400)
Mar 16, 2019 6:49:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/420) took 207215 ms. Total solver calls (SAT/UNSAT): 23651(1896/21755)
Mar 16, 2019 6:49:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(171/420) took 210495 ms. Total solver calls (SAT/UNSAT): 24038(1935/22103)
Mar 16, 2019 6:49:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
Mar 16, 2019 6:49:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=2 took 8765 ms
Mar 16, 2019 6:49:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/420) took 213739 ms. Total solver calls (SAT/UNSAT): 24416(1974/22442)
Mar 16, 2019 6:50:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/420) took 216975 ms. Total solver calls (SAT/UNSAT): 24785(2010/22775)
Mar 16, 2019 6:50:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/420) took 220051 ms. Total solver calls (SAT/UNSAT): 25145(2046/23099)
Mar 16, 2019 6:50:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/420) took 223445 ms. Total solver calls (SAT/UNSAT): 25557(2076/23481)
Mar 16, 2019 6:50:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(191/420) took 226979 ms. Total solver calls (SAT/UNSAT): 25968(2091/23877)
Mar 16, 2019 6:50:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/420) took 230261 ms. Total solver calls (SAT/UNSAT): 26343(2106/24237)
Mar 16, 2019 6:50:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/420) took 233685 ms. Total solver calls (SAT/UNSAT): 26735(2123/24612)
Mar 16, 2019 6:50:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(212/420) took 237071 ms. Total solver calls (SAT/UNSAT): 27123(2139/24984)
Mar 16, 2019 6:50:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 45220 ms
Mar 16, 2019 6:50:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/420) took 240205 ms. Total solver calls (SAT/UNSAT): 27483(2166/25317)
Mar 16, 2019 6:50:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/420) took 243252 ms. Total solver calls (SAT/UNSAT): 27812(2187/25625)
Mar 16, 2019 6:50:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/420) took 246439 ms. Total solver calls (SAT/UNSAT): 28132(2205/25927)
Mar 16, 2019 6:50:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/420) took 249668 ms. Total solver calls (SAT/UNSAT): 28471(2225/26246)
Mar 16, 2019 6:50:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(266/420) took 252734 ms. Total solver calls (SAT/UNSAT): 28793(2299/26494)
Mar 16, 2019 6:50:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(279/420) took 255837 ms. Total solver calls (SAT/UNSAT): 29117(2369/26748)
Mar 16, 2019 6:50:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=4 took 19925 ms
Mar 16, 2019 6:50:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(293/420) took 258961 ms. Total solver calls (SAT/UNSAT): 29442(2415/27027)
Mar 16, 2019 6:50:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(303/420) took 262765 ms. Total solver calls (SAT/UNSAT): 29858(2415/27443)
Mar 16, 2019 6:50:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(307/420) took 266149 ms. Total solver calls (SAT/UNSAT): 30240(2427/27813)
Mar 16, 2019 6:50:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(311/420) took 269549 ms. Total solver calls (SAT/UNSAT): 30606(2471/28135)
Mar 16, 2019 6:50:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/420) took 272649 ms. Total solver calls (SAT/UNSAT): 30956(2514/28442)
Mar 16, 2019 6:50:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/420) took 275701 ms. Total solver calls (SAT/UNSAT): 31290(2554/28736)
Mar 16, 2019 6:51:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(324/420) took 279092 ms. Total solver calls (SAT/UNSAT): 31685(2601/29084)
Mar 16, 2019 6:51:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(329/420) took 282301 ms. Total solver calls (SAT/UNSAT): 32055(2645/29410)
Mar 16, 2019 6:51:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(335/420) took 285865 ms. Total solver calls (SAT/UNSAT): 32466(2693/29773)
Mar 16, 2019 6:51:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(341/420) took 289125 ms. Total solver calls (SAT/UNSAT): 32841(2735/30106)
Mar 16, 2019 6:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-05
Mar 16, 2019 6:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(SAT) depth K=2 took 80858 ms
Mar 16, 2019 6:51:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(348/420) took 292497 ms. Total solver calls (SAT/UNSAT): 33233(2772/30461)
Mar 16, 2019 6:51:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(361/420) took 295821 ms. Total solver calls (SAT/UNSAT): 33609(2778/30831)
Mar 16, 2019 6:51:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(370/420) took 299021 ms. Total solver calls (SAT/UNSAT): 33978(2813/31165)
Mar 16, 2019 6:51:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(381/420) took 302097 ms. Total solver calls (SAT/UNSAT): 34319(2853/31466)
Mar 16, 2019 6:51:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(407/420) took 305101 ms. Total solver calls (SAT/UNSAT): 34644(2883/31761)
Mar 16, 2019 6:51:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 305259 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
Mar 16, 2019 6:51:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
Mar 16, 2019 6:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=4 took 47820 ms
Mar 16, 2019 6:51:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 6122 ms. Total solver calls (SAT/UNSAT): 339(0/339)
Mar 16, 2019 6:51:34 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 368735ms conformant to PINS in folder :/home/mcc/execution
Mar 16, 2019 6:52:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=4 took 46985 ms
Mar 16, 2019 6:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
Mar 16, 2019 6:53:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=2 took 105062 ms
Mar 16, 2019 6:54:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=4 took 146279 ms
Mar 16, 2019 6:55:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
Mar 16, 2019 6:55:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=2 took 141946 ms
Mar 16, 2019 6:55:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
Mar 16, 2019 6:55:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=2 took 6414 ms
Mar 16, 2019 6:55:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 16, 2019 6:55:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=2 took 12595 ms
Mar 16, 2019 6:56:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=4 took 113315 ms
Mar 16, 2019 6:58:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=4 took 91538 ms
Mar 16, 2019 6:59:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
Mar 16, 2019 6:59:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=2 took 199664 ms
Mar 16, 2019 7:01:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 16, 2019 7:01:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=2 took 155215 ms
Mar 16, 2019 7:04:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
Mar 16, 2019 7:04:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=2 took 178142 ms
Mar 16, 2019 7:09:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 703870 ms
Mar 16, 2019 7:10:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 16, 2019 7:10:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=3 took 358792 ms
Mar 16, 2019 7:11:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 16, 2019 7:11:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=3 took 60162 ms
Mar 16, 2019 7:15:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 16, 2019 7:15:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=3 took 264946 ms
ITS-tools command line returned an error code 137
Mar 16, 2019 7:17:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=5 took 431810 ms
Mar 16, 2019 7:23:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=5 took 381177 ms
Mar 16, 2019 7:31:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
Mar 16, 2019 7:31:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=4 took 905064 ms
Mar 16, 2019 7:31:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
Mar 16, 2019 7:31:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=4 took 21676 ms
Mar 16, 2019 7:32:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=5 took 517286 ms
Mar 16, 2019 7:42:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=5 took 655161 ms
Mar 16, 2019 7:43:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
Mar 16, 2019 7:43:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=4 took 737330 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r096-smll-155246587200161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;