Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r096-smll-155246587200143.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is LamportFastMutEx-COL-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r096-smll-155246587200143
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 3.3K Feb 11 22:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 11 22:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 7 23:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 7 23:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 4 06:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 4 06:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Jan 31 23:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 31 23:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 40K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552752918548

16:15:22.094 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
16:15:22.098 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-00 with value :((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=1)&&(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)>=3))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-01 with value :((((((y_0+y_1)+y_2)+y_3)+y_4)>=2)||((!((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)<=((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)))||(((((x_0+x_1)+x_2)+x_3)+x_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-02 with value :(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))||(!(((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)>=3)))||((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)>=3)&&((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||(((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)>=3))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-03 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)&&((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)>=3))&&((((((y_0+y_1)+y_2)+y_3)+y_4)>=3)&&(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=1)))||(((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=1))&&((((((x_0+x_1)+x_2)+x_3)+x_4)>=2)||(((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)<=((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-04 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)||(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)<=((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)))&&((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=3)&&(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4))))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)>=2)&&(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)<=((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)))&&((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3)&&(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)>=1))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-05 with value :(!((!(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=3))||((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=1))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-06 with value :((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))||((!(((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)>=2))||(!(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-07 with value :(((!(((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)<=((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)))&&((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=3)||(((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=2)))||(((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)<=((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4))||(((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)<=((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)))||((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3)&&(((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=2))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-08 with value :(!((!(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)))&&(!(((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)<=((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-09 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=1)&&(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)>=2)))&&((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))||((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-10 with value :(true)
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-11 with value :((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)&&((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)>=1))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-12 with value :((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)>=1)&&(((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-13 with value :(((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)>=3)
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-14 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((y_0+y_1)+y_2)+y_3)+y_4))||(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1))&&((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4))&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=2)))&&(!((((((x_0+x_1)+x_2)+x_3)+x_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))||(((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-15 with value :(!(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=(((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 185
// Phase 1: matrix 185 rows 135 cols
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_19 + -1'P_await_13_3 + done_19 = 0
invariant :b_8 + b_9 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 = 1
invariant :wait_6 + -1'P_await_13_1 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 = 1
invariant :wait_16 + -1'P_await_13_3 + done_16 = 0
invariant :wait_24 + -1'P_await_13_4 + done_24 = 0
invariant :wait_17 + -1'P_await_13_3 + done_17 = 0
invariant :wait_21 + -1'P_await_13_4 + done_21 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_10 + done_10 = 0
invariant :wait_5 + done_5 = 0
invariant :wait_18 + -1'P_await_13_3 + done_18 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + -1'P_await_13_2 + done_14 = 0
invariant :b_0 + b_1 = 0
invariant :wait_12 + -1'P_await_13_2 + done_12 = 0
invariant :wait_11 + -1'P_await_13_2 + done_11 = 0
invariant :wait_20 + done_20 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_0 + done_0 = 0
invariant :wait_23 + -1'P_await_13_4 + done_23 = 0
invariant :wait_13 + -1'P_await_13_2 + done_13 = 0
invariant :b_6 + b_7 = 1
invariant :wait_22 + -1'P_await_13_4 + done_22 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_7 + -1'P_await_13_1 + done_7 = 0
invariant :b_4 + b_5 = 1
invariant :wait_15 + done_15 = 0
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 185
// Phase 1: matrix 185 rows 135 cols
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_19 + -1'P_await_13_3 + done_19 = 0
invariant :b_8 + b_9 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 = 1
invariant :wait_6 + -1'P_await_13_1 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 = 1
invariant :wait_16 + -1'P_await_13_3 + done_16 = 0
invariant :wait_24 + -1'P_await_13_4 + done_24 = 0
invariant :wait_17 + -1'P_await_13_3 + done_17 = 0
invariant :wait_21 + -1'P_await_13_4 + done_21 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_10 + done_10 = 0
invariant :wait_5 + done_5 = 0
invariant :wait_18 + -1'P_await_13_3 + done_18 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + -1'P_await_13_2 + done_14 = 0
invariant :b_0 + b_1 = 0
invariant :wait_12 + -1'P_await_13_2 + done_12 = 0
invariant :wait_11 + -1'P_await_13_2 + done_11 = 0
invariant :wait_20 + done_20 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_0 + done_0 = 0
invariant :wait_23 + -1'P_await_13_4 + done_23 = 0
invariant :wait_13 + -1'P_await_13_2 + done_13 = 0
invariant :b_6 + b_7 = 1
invariant :wait_22 + -1'P_await_13_4 + done_22 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_7 + -1'P_await_13_1 + done_7 = 0
invariant :b_4 + b_5 = 1
invariant :wait_15 + done_15 = 0
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-06 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx\_COL\_4\_flat\_flat,1.91478e+06,23.2389,454512,2,55083,5,1.57594e+06,6,0,787,2.10519e+06,0
Total reachable state count : 1914784

Verifying 16 reachability properties.
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-00 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-00,12,23.3032,454572,2,319,6,1.57594e+06,7,0,811,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-01 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-01,1,23.3135,454636,2,136,7,1.57594e+06,8,0,876,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-02 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-02,52,23.3541,454636,2,286,8,1.57594e+06,9,0,938,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-03 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-03,22692,23.6111,454636,2,14416,9,1.57594e+06,10,0,1143,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-04 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-04,588,23.7294,454636,2,3693,10,1.57594e+06,11,0,1348,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-05 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-05,0,23.7871,454636,1,0,10,1.57594e+06,12,0,1373,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-06 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-06,0,23.922,454636,1,0,10,1.57594e+06,13,0,1459,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-07 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-07,70884,24.7058,454636,2,29405,11,1.57594e+06,14,0,2537,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-08 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-08,3048,25.1303,454636,2,4812,12,1.57594e+06,15,0,3216,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-09 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-09,1,25.2812,454636,2,136,13,1.57594e+06,16,0,3424,2.10519e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-10 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-10,0,25.2821,454636,1,0,13,1.57594e+06,16,0,3424,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-11 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-11,0,25.3345,454636,1,0,13,1.57594e+06,17,0,3435,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-12 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-12,9153,25.4572,454636,2,6830,14,1.57594e+06,18,0,3506,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-13 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-13,1,25.4989,454636,2,136,15,1.57594e+06,19,0,3517,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-14,0,25.5802,454636,1,0,15,1.57594e+06,20,0,3609,2.10519e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-15 does not hold.
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-15,0,25.6592,454636,1,0,15,1.57594e+06,21,0,3649,2.10519e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1552752951533

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 16, 2019 4:15:21 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 16, 2019 4:15:21 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 16, 2019 4:15:21 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1059 ms
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 16, 2019 4:15:22 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 11.0 instantiations of transitions. Total transitions/syncs built is 253
Mar 16, 2019 4:15:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 128 ms
Mar 16, 2019 4:15:23 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Mar 16, 2019 4:15:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 18 ms
Mar 16, 2019 4:15:23 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 67 ms
Mar 16, 2019 4:15:23 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 69 transitions. Expanding to a total of 298 deterministic transitions.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 10 ms.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 69 transitions. Expanding to a total of 298 deterministic transitions.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 53 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 682 ms.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=0 took 14 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=0 took 0 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=0 took 16 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=0 took 16 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 69 transitions. Expanding to a total of 298 deterministic transitions.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=0 took 8 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=0 took 19 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=0 took 11 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=0 took 8 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=0 took 2 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=0 took 1 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=0 took 1 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=0 took 19 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=0 took 13 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=0 took 8 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=1 took 16 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=1 took 8 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=1 took 19 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=1 took 13 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=1 took 23 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=1 took 23 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=1 took 27 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=1 took 6 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 39 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=1 took 14 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=1 took 15 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=1 took 4 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=1 took 15 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=1 took 9 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=1 took 8 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=1 took 4 ms
Mar 16, 2019 4:15:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=2 took 32 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=2 took 113 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=2 took 64 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=2 took 50 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=2 took 85 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=2 took 44 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=2 took 36 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=2 took 123 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=2 took 48 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=2 took 39 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=2 took 60 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=2 took 47 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=2 took 37 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 1338 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 230 transitions.
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/230 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=2 took 56 ms
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 31 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 230 transitions.
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 23 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 4:15:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=2 took 155 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=3 took 225 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 1495 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-00
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(SAT) depth K=0 took 245 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-01
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(SAT) depth K=0 took 141 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-02
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(SAT) depth K=0 took 142 ms
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-03
Mar 16, 2019 4:15:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(SAT) depth K=0 took 194 ms
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-04
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(SAT) depth K=0 took 159 ms
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-05
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(SAT) depth K=0 took 153 ms
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-4-ReachabilityCardinality-06
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-06
Mar 16, 2019 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(TRUE) depth K=0 took 396 ms
Mar 16, 2019 4:15:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-07
Mar 16, 2019 4:15:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(SAT) depth K=0 took 679 ms
Mar 16, 2019 4:15:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=3 took 2336 ms
Mar 16, 2019 4:15:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-08
Mar 16, 2019 4:15:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(SAT) depth K=0 took 448 ms
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-09
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(SAT) depth K=0 took 326 ms
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-11
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(SAT) depth K=0 took 157 ms
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-12
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(SAT) depth K=0 took 344 ms
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=3 took 1289 ms
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-13
Mar 16, 2019 4:15:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(SAT) depth K=0 took 230 ms
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-4-ReachabilityCardinality-14
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-14
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(FALSE) depth K=0 took 310 ms
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-4-ReachabilityCardinality-15
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-15
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(FALSE) depth K=0 took 249 ms
Mar 16, 2019 4:15:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=3 took 1011 ms
Mar 16, 2019 4:15:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=3 took 1746 ms
Mar 16, 2019 4:15:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=3 took 262 ms
Mar 16, 2019 4:15:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=3 took 330 ms
Mar 16, 2019 4:15:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=3 took 387 ms
Mar 16, 2019 4:15:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-00
Mar 16, 2019 4:15:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(SAT) depth K=1 took 3218 ms
Mar 16, 2019 4:15:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-01
Mar 16, 2019 4:15:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(SAT) depth K=1 took 1196 ms
Mar 16, 2019 4:15:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=3 took 1483 ms
Mar 16, 2019 4:15:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=3 took 706 ms
Mar 16, 2019 4:15:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-02
Mar 16, 2019 4:15:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(SAT) depth K=1 took 1081 ms
Mar 16, 2019 4:15:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=3 took 2071 ms
Mar 16, 2019 4:15:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-03
Mar 16, 2019 4:15:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(SAT) depth K=1 took 1912 ms
Mar 16, 2019 4:15:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=3 took 482 ms
Mar 16, 2019 4:15:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=3 took 407 ms
Mar 16, 2019 4:15:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=3 took 1023 ms
Mar 16, 2019 4:15:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=3 took 973 ms
Mar 16, 2019 4:15:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-04
Mar 16, 2019 4:15:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(SAT) depth K=1 took 4801 ms
Mar 16, 2019 4:15:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-05
Mar 16, 2019 4:15:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(SAT) depth K=1 took 967 ms
Mar 16, 2019 4:15:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-07
Mar 16, 2019 4:15:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(SAT) depth K=1 took 3471 ms
Mar 16, 2019 4:15:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=4 took 7506 ms
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 16, 2019 4:15:50 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (and (and (>= (select s0 25) 1) (>= (select s0 7) 1)) (= (store (store (store (store s0 25 (- (select s0 25) 1)) 7 (- (select s0 7) 1)) 5 (+ (select s0 5) 1)) 35 (+ (select s0 35) 1)) s1))) with error (error "Failed to assert expression: java.io.IOException: Broken pipe (and (and (>= (select s0 25) 1) (>= (select s0 7) 1)) (= (store (store (store (store s0 25 (- (select s0 25) 1)) 7 (- (select s0 7) 1)) 5 (+ (select s0 5) 1)) 35 (+ (select s0 35) 1)) s1))")
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-COL-4-ReachabilityCardinality-01 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:755)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:512)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-COL-4-ReachabilityCardinality-08 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 4/ 16 properties. Interrupting other analysis methods.
Mar 16, 2019 4:15:50 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 26280ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-COL-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r096-smll-155246587200143"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-4.tgz
mv LamportFastMutEx-COL-4 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;