Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r085-csrt-155246553900061.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is FMS-PT-00200, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r085-csrt-155246553900061
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 188K
-rw-r--r-- 1 mcc users 3.3K Feb 10 23:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 10 23:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 6 20:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 6 20:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 99 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 337 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.3K Feb 4 23:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K Feb 4 22:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 3 08:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 3 08:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Jan 31 01:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Jan 31 01:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 4 22:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 0 Jan 29 09:34 model-fix.log
-rw-r--r-- 1 mcc users 17K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00200-LTLFireability-00
FORMULA_NAME FMS-PT-00200-LTLFireability-01
FORMULA_NAME FMS-PT-00200-LTLFireability-02
FORMULA_NAME FMS-PT-00200-LTLFireability-03
FORMULA_NAME FMS-PT-00200-LTLFireability-04
FORMULA_NAME FMS-PT-00200-LTLFireability-05
FORMULA_NAME FMS-PT-00200-LTLFireability-06
FORMULA_NAME FMS-PT-00200-LTLFireability-07
FORMULA_NAME FMS-PT-00200-LTLFireability-08
FORMULA_NAME FMS-PT-00200-LTLFireability-09
FORMULA_NAME FMS-PT-00200-LTLFireability-10
FORMULA_NAME FMS-PT-00200-LTLFireability-11
FORMULA_NAME FMS-PT-00200-LTLFireability-12
FORMULA_NAME FMS-PT-00200-LTLFireability-13
FORMULA_NAME FMS-PT-00200-LTLFireability-14
FORMULA_NAME FMS-PT-00200-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552767330771

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X("(P2M2>=1)")))
Formula 0 simplified : !X"(P2M2>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 20 rows 22 cols
invariant :P12M3 + M3 = 2
invariant :P12 + P2wM2 + P2 + P2M2 + P12wM3 + P12s + -1'M3 + P2wP1 + P2d + P2s = 198
invariant :P1d + P1s + P1wP2 + P12 + P1 + P1wM1 + -1'M1 + P12wM3 + P12s + -1'M3 = 195
invariant :P3s + P3M2 + P3 = 200
invariant :M2 + P2M2 = 1
invariant :P1M1 + M1 = 3
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 548 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 100 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3020 ms.
FORMULA FMS-PT-00200-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 478 ms.
FORMULA FMS-PT-00200-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(((LTLAP2==true))U(<>(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1255 ms.
FORMULA FMS-PT-00200-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(<>([]([]((LTLAP6==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 246 ms.
FORMULA FMS-PT-00200-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 472 ms.
FORMULA FMS-PT-00200-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 371 ms.
FORMULA FMS-PT-00200-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X(<>((LTLAP8==true))))U(((LTLAP7==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 584 ms.
FORMULA FMS-PT-00200-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([]([](<>((LTLAP0==true)))))U(X((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 310 ms.
FORMULA FMS-PT-00200-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 481 ms.
FORMULA FMS-PT-00200-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>(<>((LTLAP0==true))))U(((LTLAP7==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 433 ms.
FORMULA FMS-PT-00200-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP9==true))U(<>(<>([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 472 ms.
FORMULA FMS-PT-00200-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>(<>(<>((LTLAP4==true)))))U([]([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 437 ms.
FORMULA FMS-PT-00200-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([]((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 573 ms.
FORMULA FMS-PT-00200-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP12==true))U((LTLAP13==true))))U(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 289 ms.
FORMULA FMS-PT-00200-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 512 ms.
FORMULA FMS-PT-00200-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
75048 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,750.5,4134500,1,0,7,2.22507e+07,14,0,3532,2.03439e+07,9
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((P3M2>=1)&&(M2>=1))"))
Formula 1 simplified : !"((P3M2>=1)&&(M2>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
13276 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,883.262,4134920,1,0,7,2.22507e+07,18,0,3592,2.03439e+07,17
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F(("(P2d>=1)")U(F(F("((P2wM2>=1)&&(M2>=1))"))))))
Formula 2 simplified : !F("(P2d>=1)" U F"((P2wM2>=1)&&(M2>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
58729 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1470.55,4525860,1,0,1677,2.80024e+07,14,835,1889,2.84364e+07,4182
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((G((G(X("(P3s>=1)")))U(X(F("(P1>=1)"))))))
Formula 3 simplified : !G(GX"(P3s>=1)" U XF"(P1>=1)")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
58066 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2051.21,7320980,1,0,1677,4.53962e+07,20,835,3532,4.60506e+07,20
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA FMS-PT-00200-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((G(X(F(G(G("((P12wM3>=1)&&(M3>=1))")))))))
Formula 4 simplified : !GXFG"((P12wM3>=1)&&(M3>=1))"

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 31 ms
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 22 places.
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 20 transitions.
Mar 16, 2019 8:15:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 22 ms
Mar 16, 2019 8:15:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Mar 16, 2019 8:15:33 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 16, 2019 8:15:33 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 20 transitions.
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 7 ms
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 22 variables to be positive in 842 ms
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 20 transitions.
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/20 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 20 transitions.
Mar 16, 2019 8:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 16, 2019 8:15:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 20 transitions.
Mar 16, 2019 8:15:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/20) took 1679 ms. Total solver calls (SAT/UNSAT): 82(80/2)
Mar 16, 2019 8:15:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 1680 ms. Total solver calls (SAT/UNSAT): 82(80/2)
Mar 16, 2019 8:15:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 20 transitions.
Mar 16, 2019 8:15:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 508 ms. Total solver calls (SAT/UNSAT): 24(0/24)
Mar 16, 2019 8:15:38 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 4521ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 6/ 8), 0.000: library has no initializer
pins2lts-mc( 6/ 8), 0.000: loading model GAL
pins2lts-mc( 6/ 8), 0.001: completed loading model GAL
pins2lts-mc( 6/ 8), 0.001: LTL layer: formula: [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true)))))
pins2lts-mc( 6/ 8), 0.001: "[](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true)))))" is not a file, parsing as formula...
pins2lts-mc( 6/ 8), 0.001: Using Spin LTL semantics
pins2lts-mc( 2/ 8), 0.010: library has no initializer
pins2lts-mc( 2/ 8), 0.010: loading model GAL
pins2lts-mc( 2/ 8), 0.010: completed loading model GAL
pins2lts-mc( 7/ 8), 0.010: library has no initializer
pins2lts-mc( 7/ 8), 0.010: loading model GAL
pins2lts-mc( 7/ 8), 0.010: completed loading model GAL
pins2lts-mc( 5/ 8), 0.010: library has no initializer
pins2lts-mc( 5/ 8), 0.010: loading model GAL
pins2lts-mc( 5/ 8), 0.010: completed loading model GAL
pins2lts-mc( 3/ 8), 0.010: library has no initializer
pins2lts-mc( 3/ 8), 0.010: loading model GAL
pins2lts-mc( 3/ 8), 0.011: completed loading model GAL
pins2lts-mc( 1/ 8), 0.010: library has no initializer
pins2lts-mc( 1/ 8), 0.010: loading model GAL
pins2lts-mc( 1/ 8), 0.010: completed loading model GAL
pins2lts-mc( 0/ 8), 0.011: Loading model from ./gal.so
pins2lts-mc( 0/ 8), 0.011: library has no initializer
pins2lts-mc( 0/ 8), 0.011: loading model GAL
pins2lts-mc( 0/ 8), 0.011: completed loading model GAL
pins2lts-mc( 4/ 8), 0.010: library has no initializer
pins2lts-mc( 4/ 8), 0.010: loading model GAL
pins2lts-mc( 4/ 8), 0.011: completed loading model GAL
pins2lts-mc( 0/ 8), 0.012: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc( 0/ 8), 0.035: DFS-FIFO for weak LTL, using special progress label 35
pins2lts-mc( 0/ 8), 0.035: There are 36 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 0.035: State length is 23, there are 23 groups
pins2lts-mc( 0/ 8), 0.035: Running dfsfifo using 8 cores
pins2lts-mc( 0/ 8), 0.035: Using a tree table with 2^27 elements
pins2lts-mc( 0/ 8), 0.035: Successor permutation: rr
pins2lts-mc( 0/ 8), 0.035: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc( 1/ 8), 1.010: ~1 levels ~960 states ~5312 transitions
pins2lts-mc( 1/ 8), 1.129: ~1 levels ~1920 states ~11208 transitions
pins2lts-mc( 1/ 8), 1.206: ~1 levels ~3840 states ~22808 transitions
pins2lts-mc( 1/ 8), 1.312: ~1 levels ~7680 states ~47352 transitions
pins2lts-mc( 1/ 8), 1.561: ~1 levels ~15360 states ~99280 transitions
pins2lts-mc( 7/ 8), 1.951: ~1 levels ~30720 states ~225984 transitions
pins2lts-mc( 7/ 8), 2.608: ~1 levels ~61440 states ~464504 transitions
pins2lts-mc( 7/ 8), 3.929: ~1 levels ~122880 states ~946024 transitions
pins2lts-mc( 7/ 8), 5.835: ~1 levels ~245760 states ~1940896 transitions
pins2lts-mc( 7/ 8), 8.529: ~1 levels ~491520 states ~3994752 transitions
pins2lts-mc( 7/ 8), 11.841: ~1 levels ~983040 states ~8294872 transitions
pins2lts-mc( 1/ 8), 16.614: ~1 levels ~1966080 states ~16394496 transitions
pins2lts-mc( 1/ 8), 24.257: ~1 levels ~3932160 states ~33528520 transitions
pins2lts-mc( 1/ 8), 34.975: ~1 levels ~7864320 states ~68894968 transitions
pins2lts-mc( 1/ 8), 59.854: ~1 levels ~15728640 states ~141093448 transitions
pins2lts-mc( 1/ 8), 118.501: ~1 levels ~31457280 states ~286468560 transitions
pins2lts-mc( 2/ 8), 230.757: ~1 levels ~62914560 states ~600367112 transitions
pins2lts-mc( 6/ 8), 483.969: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 484.032:
pins2lts-mc( 0/ 8), 484.032: mean standard work distribution: 7.5% (states) 7.6% (transitions)
pins2lts-mc( 0/ 8), 484.032:
pins2lts-mc( 0/ 8), 484.032: Explored 105051891 states 1023910130 transitions, fanout: 9.747
pins2lts-mc( 0/ 8), 484.032: Total exploration time 483.950 sec (483.840 sec minimum, 483.901 sec on average)
pins2lts-mc( 0/ 8), 484.032: States per second: 217072, Transitions per second: 2115735
pins2lts-mc( 0/ 8), 484.032:
pins2lts-mc( 0/ 8), 484.032: Progress states detected: 134217100
pins2lts-mc( 0/ 8), 484.032: Redundant explorations: -21.7300
pins2lts-mc( 0/ 8), 484.032:
pins2lts-mc( 0/ 8), 484.032: Queue width: 8B, total height: 58356168, memory: 445.22MB
pins2lts-mc( 0/ 8), 484.032: Tree memory: 1033.0MB, 8.1 B/state, compr.: 8.6%
pins2lts-mc( 0/ 8), 484.032: Tree fill ratio (roots/leafs): 99.0%/3.0%
pins2lts-mc( 0/ 8), 484.032: Stored 20 string chucks using 0MB
pins2lts-mc( 0/ 8), 484.032: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 484.032: Est. total memory use: 1478.3MB (~1469.2MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](([](X((LTLAP4==true))))U(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00200"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is FMS-PT-00200, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r085-csrt-155246553900061"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00200.tgz
mv FMS-PT-00200 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;