Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r052-oct2-155234410400736.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is DNAwalker-PT-16redondantChoiceR, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r052-oct2-155234410400736
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 4.3K Feb 10 20:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 10 20:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 6 15:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 6 15:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 118 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 356 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.5K Feb 4 23:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K Feb 4 22:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 3 06:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 3 06:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Jan 30 22:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 12K Jan 30 22:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 4 22:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 19 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 211K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-00
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-01
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-02
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-03
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-04
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-05
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-06
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-07
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-08
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-09
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-10
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-11
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-12
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-13
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-14
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552646673165

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G((X(G("((A25>=2)&&(A31>=1))")))U(F("((A28>=2)&&(A20>=1))")))))
Formula 0 simplified : !G(XG"((A25>=2)&&(A31>=1))" U F"((A28>=2)&&(A20>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 489
// Phase 1: matrix 489 rows 43 cols
Reverse transition relation is NOT exact ! Due to transitions tb5, tAb5, tb6, tAb6, tb13, tAb13, tb14, tAb14, tb15, tAb15, tb16, tAb16, tb28, tAb28, tb29, tAb29, tb30, tAb30, tb31, tAb31, t1_2, t1_3, t1_4, t1_5, t1_9, t2_3, t2_4, t2_5, t2_6, t2_9, t2_10, t3_2, t3_4, t3_5, t3_6, t3_7, t3_9, t3_10, t3_11, t4_2, t4_3, t4_5, t4_6, t4_7, t4_8, t4_9, t4_10, t4_11, t4_12, t4_23, t4_24, t4_28, t4_29, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_10, t5_11, t5_13, t5_23, t5_24, t5_25, t5_28, t5_29, t6_2, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_13, t6_14, t6_23, t6_24, t6_25, t6_29, t6_30, t7_3, t7_4, t7_5, t7_6, t7_8, t7_9, t7_13, t7_14, t7_15, t7_23, t7_24, t7_25, t7_30, t7_31, t8_4, t8_5, t8_6, t8_7, t8_13, t8_14, t8_15, t8_16, t8_23, t8_24, t8_25, t8_29, t8_30, t8_31, t9_2, t9_3, t9_4, t9_5, t9_6, t9_7, t9_10, t9_11, t9_12, t9_18, t9_23, t9_24, t9_25, t9_28, t9_29, t10_2, t10_3, t10_4, t10_5, t10_6, t10_9, t10_11, t10_12, t10_18, t10_19, t10_24, t10_25, t10_26, t10_28, t10_29, t11_3, t11_4, t11_5, t11_9, t11_10, t11_12, t11_18, t11_19, t11_20, t11_25, t11_26, t11_27, t11_28, t11_29, t12_4, t12_9, t12_10, t12_11, t12_18, t12_19, t12_20, t12_21, t12_24, t12_25, t12_26, t12_27, t12_28, t12_29, t13_5, t13_6, t13_7, t13_8, t13_14, t13_15, t13_16, t13_17, t13_23, t13_24, t13_25, t13_26, t13_29, t13_30, t13_31, t14_6, t14_7, t14_8, t14_13, t14_15, t14_16, t14_17, t14_23, t14_24, t14_25, t14_26, t14_29, t14_30, t14_31, t14_32, t15_7, t15_8, t15_13, t15_14, t15_16, t15_17, t15_23, t15_24, t15_25, t15_26, t15_29, t15_30, t15_31, t15_32, t16_8, t16_13, t16_14, t16_15, t16_17, t16_23, t16_24, t16_25, t16_26, t16_30, t16_31, t16_32, t17_13, t17_14, t17_15, t17_23, t17_24, t17_25, t17_30, t17_31, t18_9, t18_10, t18_11, t18_12, t18_19, t18_20, t18_21, t18_22, t18_24, t18_25, t18_26, t18_27, t18_28, t18_29, t18_30, t19_10, t19_11, t19_12, t19_18, t19_20, t19_21, t19_22, t19_24, t19_25, t19_26, t19_27, t19_28, t19_29, t19_30, t19_33, t20_11, t20_12, t20_18, t20_19, t20_21, t20_22, t20_24, t20_25, t20_26, t20_27, t20_28, t20_29, t20_30, t20_33, t21_12, t21_18, t21_19, t21_20, t21_25, t21_26, t21_27, t21_28, t21_29, t21_30, t21_33, t22_18, t22_19, t22_20, t22_25, t22_26, t22_27, t22_28, t22_29, t23_4, t23_5, t23_6, t23_7, t23_8, t23_9, t23_13, t23_14, t23_15, t23_16, t23_17, t23_24, t23_25, t23_26, t23_28, t23_29, t23_30, t23_31, t24_4, t24_5, t24_6, t24_7, t24_8, t24_9, t24_10, t24_12, t24_13, t24_14, t24_15, t24_16, t24_17, t24_18, t24_19, t24_20, t24_23, t24_25, t24_26, t24_27, t24_28, t24_29, t24_30, t24_31, t25_5, t25_6, t25_7, t25_8, t25_9, t25_10, t25_11, t25_12, t25_13, t25_14, t25_15, t25_16, t25_17, t25_18, t25_19, t25_20, t25_21, t25_22, t25_23, t25_24, t25_26, t25_27, t25_28, t25_29, t25_30, t25_31, t26_10, t26_11, t26_12, t26_13, t26_14, t26_15, t26_16, t26_18, t26_19, t26_20, t26_21, t26_22, t26_23, t26_24, t26_25, t26_27, t26_28, t26_29, t26_30, t26_31, t26_33, t27_11, t27_12, t27_18, t27_19, t27_20, t27_21, t27_22, t27_24, t27_25, t27_26, t27_28, t27_29, t27_30, t27_31, t27_33, t28_4, t28_5, t28_9, t28_10, t28_11, t28_12, t28_18, t28_19, t28_20, t28_21, t28_22, t28_23, t28_24, t28_25, t28_26, t28_27, t28_29, t28_30, t29_4, t29_5, t29_6, t29_8, t29_9, t29_10, t29_11, t29_12, t29_13, t29_14, t29_15, t29_18, t29_19, t29_20, t29_21, t29_22, t29_23, t29_24, t29_25, t29_26, t29_27, t29_28, t29_30, t29_31, t30_6, t30_7, t30_8, t30_13, t30_14, t30_15, t30_16, t30_17, t30_18, t30_19, t30_20, t30_21, t30_23, t30_24, t30_25, t30_26, t30_27, t30_28, t30_29, t30_31, t30_32, t31_7, t31_8, t31_13, t31_14, t31_15, t31_16, t31_17, t31_23, t31_24, t31_25, t31_26, t31_27, t31_29, t31_30, t31_32, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/7/478/490
Computing Next relation with stutter on 1.04294e+07 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4306 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 88 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((X([]((LTLAP0==true))))U(<>((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1231 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2670 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2598 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1877 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(((LTLAP5==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 291 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP7==true))U((LTLAP8==true))))U(<>(((LTLAP9==true))U((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 149 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2572 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(<>(X(<>((LTLAP12==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2257 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X((LTLAP13==true)))U(<>(X(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 517 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4651 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2944 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2716 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1272 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X([](<>(<>((LTLAP19==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 849 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([](([]((LTLAP20==true)))U((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1167 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []([]((X((LTLAP22==true)))U(<>((LTLAP23==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 934 ms.
FORMULA DNAwalker-PT-16redondantChoiceR-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552646931299

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 15, 2019 10:44:34 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 15, 2019 10:44:34 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 15, 2019 10:44:35 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 130 ms
Mar 15, 2019 10:44:35 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 43 places.
Mar 15, 2019 10:44:35 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 490 transitions.
Mar 15, 2019 10:44:35 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
Mar 15, 2019 10:44:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
Mar 15, 2019 10:44:35 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
Mar 15, 2019 10:44:35 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 15, 2019 10:44:35 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 490 transitions.
Mar 15, 2019 10:44:36 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 19 ms
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 43 variables to be positive in 783 ms
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 490 transitions.
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/490 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 53 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 490 transitions.
Mar 15, 2019 10:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 25 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:44:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 490 transitions.
Mar 15, 2019 10:44:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/490) took 20 ms. Total solver calls (SAT/UNSAT): 1(1/0)
Mar 15, 2019 10:44:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/490) took 3037 ms. Total solver calls (SAT/UNSAT): 574(574/0)
Mar 15, 2019 10:44:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/490) took 6093 ms. Total solver calls (SAT/UNSAT): 1431(1431/0)
Mar 15, 2019 10:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/490) took 9157 ms. Total solver calls (SAT/UNSAT): 3041(3041/0)
Mar 15, 2019 10:45:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/490) took 12272 ms. Total solver calls (SAT/UNSAT): 4461(4461/0)
Mar 15, 2019 10:45:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/490) took 15292 ms. Total solver calls (SAT/UNSAT): 5631(5631/0)
Mar 15, 2019 10:45:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/490) took 18297 ms. Total solver calls (SAT/UNSAT): 6736(6736/0)
Mar 15, 2019 10:45:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(226/490) took 22034 ms. Total solver calls (SAT/UNSAT): 8135(8135/0)
Mar 15, 2019 10:45:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(232/490) took 25598 ms. Total solver calls (SAT/UNSAT): 8278(8278/0)
Mar 15, 2019 10:45:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(236/490) took 29080 ms. Total solver calls (SAT/UNSAT): 8418(8418/0)
Mar 15, 2019 10:45:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/490) took 32318 ms. Total solver calls (SAT/UNSAT): 8582(8582/0)
Mar 15, 2019 10:45:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(246/490) took 35427 ms. Total solver calls (SAT/UNSAT): 8740(8740/0)
Mar 15, 2019 10:45:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(249/490) took 39275 ms. Total solver calls (SAT/UNSAT): 8878(8878/0)
Mar 15, 2019 10:45:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(252/490) took 42454 ms. Total solver calls (SAT/UNSAT): 9005(9005/0)
Mar 15, 2019 10:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/490) took 46023 ms. Total solver calls (SAT/UNSAT): 9182(9182/0)
Mar 15, 2019 10:45:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/490) took 49074 ms. Total solver calls (SAT/UNSAT): 9293(9293/0)
Mar 15, 2019 10:45:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/490) took 52110 ms. Total solver calls (SAT/UNSAT): 9428(9428/0)
Mar 15, 2019 10:45:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(266/490) took 55450 ms. Total solver calls (SAT/UNSAT): 9552(9552/0)
Mar 15, 2019 10:45:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/490) took 58506 ms. Total solver calls (SAT/UNSAT): 9932(9932/0)
Mar 15, 2019 10:45:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(316/490) took 61579 ms. Total solver calls (SAT/UNSAT): 11037(11037/0)
Mar 15, 2019 10:45:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/490) took 64866 ms. Total solver calls (SAT/UNSAT): 11162(11162/0)
Mar 15, 2019 10:45:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(322/490) took 68022 ms. Total solver calls (SAT/UNSAT): 11269(11269/0)
Mar 15, 2019 10:46:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(326/490) took 71663 ms. Total solver calls (SAT/UNSAT): 11391(11391/0)
Mar 15, 2019 10:46:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(330/490) took 75114 ms. Total solver calls (SAT/UNSAT): 11507(11507/0)
Mar 15, 2019 10:46:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(336/490) took 78352 ms. Total solver calls (SAT/UNSAT): 11657(11657/0)
Mar 15, 2019 10:46:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(342/490) took 82255 ms. Total solver calls (SAT/UNSAT): 11825(11825/0)
Mar 15, 2019 10:46:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(409/490) took 85262 ms. Total solver calls (SAT/UNSAT): 13432(13432/0)
Mar 15, 2019 10:46:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(450/490) took 88444 ms. Total solver calls (SAT/UNSAT): 14065(14065/0)
Mar 15, 2019 10:46:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(456/490) took 91813 ms. Total solver calls (SAT/UNSAT): 14181(14181/0)
Mar 15, 2019 10:46:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(468/490) took 94857 ms. Total solver calls (SAT/UNSAT): 14315(14315/0)
Mar 15, 2019 10:46:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(482/490) took 97922 ms. Total solver calls (SAT/UNSAT): 14437(14437/0)
Mar 15, 2019 10:46:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 98344 ms. Total solver calls (SAT/UNSAT): 14448(14448/0)
Mar 15, 2019 10:46:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 490 transitions.
Mar 15, 2019 10:48:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 110582 ms. Total solver calls (SAT/UNSAT): 3828(0/3828)
Mar 15, 2019 10:48:17 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 221999ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-16redondantChoiceR"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is DNAwalker-PT-16redondantChoiceR, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r052-oct2-155234410400736"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-16redondantChoiceR.tgz
mv DNAwalker-PT-16redondantChoiceR execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;