Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r052-oct2-155234410300682.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is DNAwalker-PT-10ringRL, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r052-oct2-155234410300682
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 276K
-rw-r--r-- 1 mcc users 3.5K Feb 10 20:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 10 20:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 6 15:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 6 15:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 108 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 346 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.3K Feb 4 23:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K Feb 4 22:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Feb 3 06:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 3 06:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Jan 30 22:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 30 22:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 9 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 112K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-00
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-01
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-02
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-03
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-04
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-05
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-06
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-07
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-08
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-09
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-10
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-11
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-12
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-13
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-14
FORMULA_NAME DNAwalker-PT-10ringRL-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552646009784

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(F("((A6>=2)&&(A5>=1))")))))
Formula 0 simplified : !F"((A6>=2)&&(A5>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 259
// Phase 1: matrix 259 rows 27 cols
Reverse transition relation is NOT exact ! Due to transitions tb4, tAb4, tb5, tAb5, tb12, tAb12, tb13, tAb13, tb14, tAb14, tb15, tAb15, t1_2, t1_3, t1_4, t1_5, t1_6, t1_7, t1_8, t1_9, t1_10, t1_11, t1_12, t1_13, t1_14, t1_15, t1_16, t1_17, t1_18, t1_19, t1_20, t1_21, t2_3, t2_4, t2_5, t2_6, t2_7, t2_8, t2_9, t2_10, t2_11, t2_12, t2_13, t2_14, t2_15, t2_16, t2_17, t2_18, t2_19, t2_20, t2_21, t3_2, t3_4, t3_5, t3_6, t3_7, t3_8, t3_13, t3_17, t3_18, t3_19, t3_20, t3_21, t4_2, t4_3, t4_5, t4_6, t4_7, t4_8, t4_13, t4_18, t4_19, t4_20, t4_21, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_13, t5_20, t5_21, t6_2, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_13, t6_21, t8_2, t8_3, t8_4, t8_5, t8_6, t8_7, t8_9, t8_10, t8_11, t8_12, t8_13, t8_14, t9_2, t9_5, t9_6, t9_7, t9_8, t9_10, t9_11, t9_12, t9_13, t9_14, t10_2, t10_6, t10_7, t10_8, t10_9, t10_11, t10_12, t10_13, t10_14, t10_15, t11_2, t11_7, t11_8, t11_9, t11_10, t11_12, t11_13, t11_14, t11_15, t11_16, t12_2, t12_7, t12_8, t12_9, t12_10, t12_11, t12_13, t12_14, t12_15, t12_16, t12_17, t12_18, t13_2, t13_3, t13_4, t13_5, t13_6, t13_7, t13_8, t13_9, t13_10, t13_11, t13_12, t13_14, t13_15, t13_16, t13_17, t13_18, t13_19, t13_20, t13_21, t14_2, t14_8, t14_9, t14_10, t14_11, t14_12, t14_13, t14_15, t14_16, t14_17, t14_18, t15_2, t15_10, t15_11, t15_12, t15_13, t15_14, t15_16, t15_17, t15_18, t15_19, t16_2, t16_11, t16_12, t16_13, t16_14, t16_15, t16_17, t16_18, t16_19, t16_20, t18_2, t18_3, t18_4, t18_12, t18_13, t18_14, t18_15, t18_16, t18_17, t18_19, t18_20, t18_21, t19_2, t19_3, t19_4, t19_13, t19_15, t19_16, t19_17, t19_18, t19_20, t19_21, t20_2, t20_3, t20_4, t20_5, t20_13, t20_16, t20_17, t20_18, t20_19, t20_21, t21_2, t21_3, t21_4, t21_5, t21_6, t21_13, t21_17, t21_18, t21_19, t21_20, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :18/2/240/260
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
815 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,8.18292,241804,1,0,835,1.13818e+06,525,265,2650,1.32625e+06,737
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F(F(X(G("((A9>=2)&&(A10>=1))")))))))
Formula 1 simplified : !FXG"((A9>=2)&&(A10>=1))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2098 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 62 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(<>(X([]((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((<>((LTLAP2==true)))U(X((LTLAP3==true))))U(X(<>(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 238 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([]((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1007 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,18.2647,498244,1,0,1054,2.27344e+06,538,331,2653,3.03538e+06,1212
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((((F("((A11>=2)&&(A12>=1))"))U(X("((A4>=2)&&(A8>=1))")))U(X(F(F("((A9>=2)&&(A13>=1))"))))))
Formula 2 simplified : !((F"((A11>=2)&&(A12>=1))" U X"((A4>=2)&&(A8>=1))") U XF"((A9>=2)&&(A13>=1))")
LTSmin run took 344 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X([]((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 172 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP7==true))U((LTLAP8==true))))U(X(<>((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 166 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(((LTLAP9==true))U((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 427 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(((LTLAP11==true))U(<>((LTLAP12==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>((<>((LTLAP13==true)))U([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 291 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((((LTLAP15==true))U((LTLAP16==true)))U([](<>((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 317 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 331 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 288 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(<>((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 271 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 242 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP21==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 246 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 189 ms.
FORMULA DNAwalker-PT-10ringRL-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552646034442

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 46 ms
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 27 places.
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 260 transitions.
Mar 15, 2019 10:33:32 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 21 ms
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 55 ms
Mar 15, 2019 10:33:32 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
Mar 15, 2019 10:33:32 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 15, 2019 10:33:32 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 260 transitions.
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 32 ms
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 27 variables to be positive in 120 ms
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 260 transitions.
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/260 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 21 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 260 transitions.
Mar 15, 2019 10:33:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 15, 2019 10:33:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 260 transitions.
Mar 15, 2019 10:33:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/260) took 1016 ms. Total solver calls (SAT/UNSAT): 1702(1702/0)
Mar 15, 2019 10:33:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/260) took 4079 ms. Total solver calls (SAT/UNSAT): 3392(3392/0)
Mar 15, 2019 10:33:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/260) took 7264 ms. Total solver calls (SAT/UNSAT): 3912(3912/0)
Mar 15, 2019 10:33:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 9740 ms. Total solver calls (SAT/UNSAT): 5918(5918/0)
Mar 15, 2019 10:33:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 260 transitions.
Mar 15, 2019 10:33:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2978 ms. Total solver calls (SAT/UNSAT): 1567(0/1567)
Mar 15, 2019 10:33:48 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 15485ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-10ringRL"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is DNAwalker-PT-10ringRL, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r052-oct2-155234410300682"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-10ringRL.tgz
mv DNAwalker-PT-10ringRL execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;