Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r052-oct2-155234409700322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is DLCround-PT-03b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r052-oct2-155234409700322
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 596K
-rw-r--r-- 1 mcc users 3.3K Feb 10 05:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 10 05:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 6 04:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 6 04:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 102 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 340 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 23:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K Feb 4 22:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 2 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 2 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Jan 30 12:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Jan 30 12:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 432K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-03b-LTLFireability-00
FORMULA_NAME DLCround-PT-03b-LTLFireability-01
FORMULA_NAME DLCround-PT-03b-LTLFireability-02
FORMULA_NAME DLCround-PT-03b-LTLFireability-03
FORMULA_NAME DLCround-PT-03b-LTLFireability-04
FORMULA_NAME DLCround-PT-03b-LTLFireability-05
FORMULA_NAME DLCround-PT-03b-LTLFireability-06
FORMULA_NAME DLCround-PT-03b-LTLFireability-07
FORMULA_NAME DLCround-PT-03b-LTLFireability-08
FORMULA_NAME DLCround-PT-03b-LTLFireability-09
FORMULA_NAME DLCround-PT-03b-LTLFireability-10
FORMULA_NAME DLCround-PT-03b-LTLFireability-11
FORMULA_NAME DLCround-PT-03b-LTLFireability-12
FORMULA_NAME DLCround-PT-03b-LTLFireability-13
FORMULA_NAME DLCround-PT-03b-LTLFireability-14
FORMULA_NAME DLCround-PT-03b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553442829748

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F("(i0.u15.p803>=1)")))
Formula 0 simplified : !F"(i0.u15.p803>=1)"
built 4 ordering constraints for composite.
built 106 ordering constraints for composite.
built 90 ordering constraints for composite.
built 74 ordering constraints for composite.
built 58 ordering constraints for composite.
built 42 ordering constraints for composite.
built 31 ordering constraints for composite.
built 20 ordering constraints for composite.
built 218 ordering constraints for composite.
built 213 ordering constraints for composite.
built 208 ordering constraints for composite.
built 203 ordering constraints for composite.
built 198 ordering constraints for composite.
built 193 ordering constraints for composite.
built 188 ordering constraints for composite.
built 183 ordering constraints for composite.
built 178 ordering constraints for composite.
built 173 ordering constraints for composite.
built 168 ordering constraints for composite.
built 163 ordering constraints for composite.
built 158 ordering constraints for composite.
built 153 ordering constraints for composite.
built 148 ordering constraints for composite.
built 143 ordering constraints for composite.
built 138 ordering constraints for composite.
built 133 ordering constraints for composite.
built 128 ordering constraints for composite.
built 123 ordering constraints for composite.
built 118 ordering constraints for composite.
built 113 ordering constraints for composite.
built 108 ordering constraints for composite.
built 103 ordering constraints for composite.
built 98 ordering constraints for composite.
built 93 ordering constraints for composite.
built 88 ordering constraints for composite.
built 83 ordering constraints for composite.
built 78 ordering constraints for composite.
built 73 ordering constraints for composite.
built 68 ordering constraints for composite.
built 63 ordering constraints for composite.
built 58 ordering constraints for composite.
built 53 ordering constraints for composite.
built 48 ordering constraints for composite.
built 43 ordering constraints for composite.
built 38 ordering constraints for composite.
built 33 ordering constraints for composite.
built 28 ordering constraints for composite.
built 23 ordering constraints for composite.
built 18 ordering constraints for composite.
built 13 ordering constraints for composite.
built 8 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 19496 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 111 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 202906 ms.
FORMULA DLCround-PT-03b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP1==true))U((LTLAP2==true))))U((<>((LTLAP3==true)))U([]((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3871 ms.
FORMULA DLCround-PT-03b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAP5==true)))U(X([]((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5179 ms.
FORMULA DLCround-PT-03b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([]((LTLAP7==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 187564 ms.
FORMULA DLCround-PT-03b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([](((LTLAP8==true))U((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 181752 ms.
FORMULA DLCround-PT-03b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP10==true))U((LTLAP11==true))))U((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12365 ms.
FORMULA DLCround-PT-03b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X(X(<>((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22286 ms.
FORMULA DLCround-PT-03b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP14==true))U((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 163296 ms.
FORMULA DLCround-PT-03b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34647 ms.
FORMULA DLCround-PT-03b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(<>(((LTLAP18==true))U((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11408 ms.
FORMULA DLCround-PT-03b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>([](([]((LTLAP20==true)))U(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1606 ms.
FORMULA DLCround-PT-03b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
LTSmin run took 196319 ms.
FORMULA DLCround-PT-03b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X([]((LTLAP23==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X([]((LTLAP23==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP24==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 177222 ms.
FORMULA DLCround-PT-03b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 522804 ms.
FORMULA DLCround-PT-03b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 851429 ms.
FORMULA DLCround-PT-03b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X([]((LTLAP23==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45681 ms.
FORMULA DLCround-PT-03b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT

BK_STOP 1553446148780

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 167 ms
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1383 places.
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1887 transitions.
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 24, 2019 3:53:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 30 ms
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 24, 2019 3:53:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 266 ms
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 195 ms
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 78 events :t1409,t1408,t1407,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,t1409,t1408,t1407,t1409,t1408,t1407,t1409,t1408,t1407,t1409,t1408,t1407,t1409,t1408,t1407,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,t1419,t1418,t1417,t1416,t1415,t1414,t1413,t1412,t1411,t1410,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1683,t1683,t1683,t1680,t1680,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1529,t1529,t1529,t1519,t1519,t1519,t1519,t1519,t1519,t1519,t1519,t1519,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1718,t1718,t1718,t1715,t1715,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1704,t1704,t1704,t1701,t1701,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1571,t1571,t1571,t1561,t1561,t1561,t1561,t1561,t1561,t1561,t1561,t1561,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 24 events :t1693,t1692,t1691,t1690,t1693,t1692,t1691,t1690,t1693,t1692,t1691,t1690,t1476,t1475,t1474,t1473,t1476,t1475,t1474,t1473,t1476,t1475,t1474,t1473,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1394,t1394,t1384,t1384,t1384,t1384,t1384,t1384,t1384,t1384,t1384,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1697,t1697,t1697,t1694,t1694,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1767,t1767,t1767,t1764,t1764,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1433,t1433,t1423,t1423,t1423,t1423,t1423,t1423,t1423,t1423,t1423,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1473,t1473,t1473,t1463,t1463,t1463,t1463,t1463,t1463,t1463,t1463,t1463,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1487,t1487,t1487,t1477,t1477,t1477,t1477,t1477,t1477,t1477,t1477,t1477,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1459,t1459,t1459,t1449,t1449,t1449,t1449,t1449,t1449,t1449,t1449,t1449,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1501,t1501,t1501,t1491,t1491,t1491,t1491,t1491,t1491,t1491,t1491,t1491,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1827,t1827,t1827,t1827,t1827,t1827,t1827,t1827,t1827,t1824,t1824,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 78 events :t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,t1422,t1421,t1420,t1422,t1421,t1420,t1422,t1421,t1420,t1422,t1421,t1420,t1422,t1421,t1420,t1422,t1421,t1420,t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,t1380,t1379,t1378,t1377,t1376,t1375,t1374,t1373,t1372,t1371,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1677,t1677,t1673,t1673,t1673,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1732,t1732,t1732,t1729,t1729,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 78 events :t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1383,t1382,t1381,t1383,t1382,t1381,t1383,t1382,t1381,t1383,t1382,t1381,t1383,t1382,t1381,t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1406,t1405,t1404,t1403,t1402,t1401,t1400,t1399,t1398,t1397,t1383,t1382,t1381,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1690,t1690,t1690,t1687,t1687,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1781,t1781,t1781,t1778,t1778,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 24 events :t1676,t1675,t1674,t1673,t1676,t1675,t1674,t1673,t1676,t1675,t1674,t1673,t1504,t1503,t1502,t1501,t1504,t1503,t1502,t1501,t1504,t1503,t1502,t1501,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1774,t1774,t1774,t1771,t1771,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1446,t1446,t1436,t1436,t1436,t1436,t1436,t1436,t1436,t1436,t1436,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1801,t1801,t1801,t1801,t1801,t1801,t1801,t1801,t1801,t1798,t1798,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1711,t1711,t1711,t1708,t1708,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1760,t1760,t1760,t1757,t1757,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1381,t1381,t1371,t1371,t1371,t1371,t1371,t1371,t1371,t1371,t1371,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1599,t1599,t1599,t1589,t1589,t1589,t1589,t1589,t1589,t1589,t1589,t1589,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1641,t1641,t1641,t1631,t1631,t1631,t1631,t1631,t1631,t1631,t1631,t1631,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1725,t1725,t1725,t1722,t1722,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 24 events :t1700,t1699,t1698,t1697,t1700,t1699,t1698,t1697,t1700,t1699,t1698,t1697,t1462,t1461,t1460,t1459,t1462,t1461,t1460,t1459,t1462,t1461,t1460,t1459,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1753,t1753,t1753,t1750,t1750,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1814,t1814,t1814,t1814,t1814,t1814,t1814,t1814,t1814,t1811,t1811,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1788,t1788,t1788,t1788,t1788,t1788,t1788,t1788,t1788,t1785,t1785,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1627,t1627,t1627,t1617,t1617,t1617,t1617,t1617,t1617,t1617,t1617,t1617,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 78 events :t1396,t1395,t1394,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1396,t1395,t1394,t1396,t1395,t1394,t1396,t1395,t1394,t1396,t1395,t1394,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1445,t1444,t1443,t1442,t1441,t1440,t1439,t1438,t1437,t1436,t1396,t1395,t1394,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1840,t1840,t1840,t1840,t1840,t1840,t1840,t1840,t1840,t1837,t1837,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1655,t1655,t1655,t1645,t1645,t1645,t1645,t1645,t1645,t1645,t1645,t1645,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1853,t1853,t1853,t1853,t1853,t1853,t1853,t1853,t1853,t1850,t1850,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1746,t1746,t1746,t1743,t1743,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1407,t1407,t1397,t1397,t1397,t1397,t1397,t1397,t1397,t1397,t1397,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1585,t1585,t1585,t1575,t1575,t1575,t1575,t1575,t1575,t1575,t1575,t1575,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 24 events :t1686,t1685,t1684,t1683,t1686,t1685,t1684,t1683,t1686,t1685,t1684,t1683,t1490,t1489,t1488,t1487,t1490,t1489,t1488,t1487,t1490,t1489,t1488,t1487,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t1739,t1739,t1739,t1736,t1736,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1557,t1557,t1557,t1547,t1547,t1547,t1547,t1547,t1547,t1547,t1547,t1547,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1515,t1515,t1515,t1505,t1505,t1505,t1505,t1505,t1505,t1505,t1505,t1505,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1543,t1543,t1543,t1533,t1533,t1533,t1533,t1533,t1533,t1533,t1533,t1533,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1613,t1613,t1613,t1603,t1603,t1603,t1603,t1603,t1603,t1603,t1603,t1603,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 11 events :t1420,t1420,t1410,t1410,t1410,t1410,t1410,t1410,t1410,t1410,t1410,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t1669,t1669,t1669,t1659,t1659,t1659,t1659,t1659,t1659,t1659,t1659,t1659,
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 812 redundant transitions.
Mar 24, 2019 3:53:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 295 ms
Mar 24, 2019 3:53:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 36 ms
Mar 24, 2019 3:53:52 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 24, 2019 3:53:53 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1887 transitions.
Mar 24, 2019 3:53:53 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1887) to apply POR reductions. Disabling POR matrices.
Mar 24, 2019 3:53:53 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 474ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-03b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is DLCround-PT-03b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r052-oct2-155234409700322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-03b.tgz
mv DLCround-PT-03b execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;