fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r019-csrt-155225080100232
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for AutoFlight-PT-96a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
11352.710 3600000.00 14171101.00 175.60 FF?F?F?F??T?FFT? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r019-csrt-155225080100232.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is AutoFlight-PT-96a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r019-csrt-155225080100232
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 812K
-rw-r--r-- 1 mcc users 4.5K Feb 9 07:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 9 07:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 5 04:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 24K Feb 5 04:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 104 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 342 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 22:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 2 01:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 2 01:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Jan 29 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Jan 29 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:18 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 629K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-00
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-01
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-02
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-03
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-04
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-05
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-06
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-07
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-08
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-09
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-10
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-11
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-12
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-13
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-14
FORMULA_NAME AutoFlight-PT-96a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552428294903

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X((F("(u179.p419>=1)"))U(F(X("((u163.p379>=1)&&(u410.p1030>=1))"))))))
Formula 0 simplified : !X(F"(u179.p419>=1)" U FX"((u163.p379>=1)&&(u410.p1030>=1))")
built 729 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 27023 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 102 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP0==true)))U(<>(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60558 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X(<>([]((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13678 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((((LTLAP4==true))U((LTLAP5==true)))U((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20885 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 150152 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(([](X((LTLAP10==true))))U(((LTLAP11==true))U((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19308 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(((LTLAP15==true))U(X(<>((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 886 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-10 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(<>([]((LTLAP18==true)))))U(<>([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16917 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(((LTLAP20==true))U((LTLAP21==true))))U(<>((LTLAP22==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21601 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP23==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4457 ms.
FORMULA AutoFlight-PT-96a-LTLFireability-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP24==true))U((<>((LTLAP25==true)))U(<>((LTLAP26==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP24==true))U((<>((LTLAP25==true)))U(<>((LTLAP26==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 12, 2019 10:04:56 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 12, 2019 10:04:56 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 12, 2019 10:04:56 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 191 ms
Mar 12, 2019 10:04:57 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2251 places.
Mar 12, 2019 10:04:57 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2225 transitions.
Mar 12, 2019 10:04:57 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 12, 2019 10:04:57 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 48 ms
Mar 12, 2019 10:04:57 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 12, 2019 10:04:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 479 ms
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 272 ms
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1012,t1012,t1012,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1005,t1005,t1005,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1225,t1225,t1225,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t952,t952,t952,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1175,t1175,t1175,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1013,t1013,t1013,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t955,t955,t955,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1228,t1228,t1228,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t957,t957,t957,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t949,t949,t949,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1019,t1019,t1019,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1004,t1004,t1004,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1171,t1171,t1171,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t998,t998,t998,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1230,t1230,t1230,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1173,t1173,t1173,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 206 events :t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2121,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,t2017,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1167,t1167,t1167,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1156,t1156,t1156,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1235,t1235,t1235,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t951,t951,t951,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t959,t959,t959,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t997,t997,t997,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1017,t1017,t1017,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1007,t1007,t1007,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1233,t1233,t1233,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1166,t1166,t1166,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1014,t1014,t1014,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1001,t1001,t1001,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1016,t1016,t1016,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1163,t1163,t1163,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1154,t1154,t1154,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1002,t1002,t1002,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1003,t1003,t1003,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1157,t1157,t1157,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1164,t1164,t1164,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1176,t1176,t1176,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1009,t1009,t1009,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1018,t1018,t1018,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1169,t1169,t1169,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1161,t1161,t1161,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1231,t1231,t1231,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1160,t1160,t1160,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1008,t1008,t1008,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t958,t958,t958,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1227,t1227,t1227,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1234,t1234,t1234,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t956,t956,t956,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1155,t1155,t1155,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1229,t1229,t1229,
Mar 12, 2019 10:04:58 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1226,t1226,t1226,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1006,t1006,t1006,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t953,t953,t953,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1000,t1000,t1000,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1011,t1011,t1011,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t960,t960,t960,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1015,t1015,t1015,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1162,t1162,t1162,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1159,t1159,t1159,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1170,t1170,t1170,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1172,t1172,t1172,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1236,t1236,t1236,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1153,t1153,t1153,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1020,t1020,t1020,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1158,t1158,t1158,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t999,t999,t999,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1174,t1174,t1174,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1165,t1165,t1165,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1232,t1232,t1232,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1010,t1010,t1010,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t950,t950,t950,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t954,t954,t954,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t1168,t1168,t1168,
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 422 redundant transitions.
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 581 ms
Mar 12, 2019 10:04:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 25 ms
Mar 12, 2019 10:04:59 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 384 identical transitions.
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1841 transitions.
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1841) to apply POR reductions. Disabling POR matrices.
Mar 12, 2019 10:04:59 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 605ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-96a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-96a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r019-csrt-155225080100232"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-96a.tgz
mv AutoFlight-PT-96a execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;