About the Execution of ITS-Tools for ASLink-PT-04b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15902.770 | 3600000.00 | 14184345.00 | 730.40 | FFFFFFF?F?FF?FFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2019-input.r008-smll-155225014000079.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is ASLink-PT-04b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r008-smll-155225014000079
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 836K
-rw-r--r-- 1 mcc users 3.8K Feb 9 05:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 9 05:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 5 02:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K Feb 5 02:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 100 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 338 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 4 22:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K Feb 4 22:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 1 23:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 1 23:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Jan 29 09:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Jan 29 09:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 669K Mar 10 17:31 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-04b-LTLFireability-00
FORMULA_NAME ASLink-PT-04b-LTLFireability-01
FORMULA_NAME ASLink-PT-04b-LTLFireability-02
FORMULA_NAME ASLink-PT-04b-LTLFireability-03
FORMULA_NAME ASLink-PT-04b-LTLFireability-04
FORMULA_NAME ASLink-PT-04b-LTLFireability-05
FORMULA_NAME ASLink-PT-04b-LTLFireability-06
FORMULA_NAME ASLink-PT-04b-LTLFireability-07
FORMULA_NAME ASLink-PT-04b-LTLFireability-08
FORMULA_NAME ASLink-PT-04b-LTLFireability-09
FORMULA_NAME ASLink-PT-04b-LTLFireability-10
FORMULA_NAME ASLink-PT-04b-LTLFireability-11
FORMULA_NAME ASLink-PT-04b-LTLFireability-12
FORMULA_NAME ASLink-PT-04b-LTLFireability-13
FORMULA_NAME ASLink-PT-04b-LTLFireability-14
FORMULA_NAME ASLink-PT-04b-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1553428123817
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !(((X(X(F("((i0.i0.i0.i0.i1.i0.i0.i0.i0.i0.i0.i0.u18.p116>=1)&&(i0.i0.i0.i1.i0.i0.i0.i0.i0.i0.u67.p568>=1))"))))U(F(X(F("(i0.i0.i0.i0.i1.i0.i0.i0.i0.i0.i1.u34.p327>=1)"))))))
Formula 0 simplified : !(XXF"((i0.i0.i0.i0.i1.i0.i0.i0.i0.i0.i0.i0.u18.p116>=1)&&(i0.i0.i0.i1.i0.i0.i0.i0.i0.i0.u67.p568>=1))" U FXF"(i0.i0.i0.i0.i1.i0.i0.i0.i0.i0.i1.u34.p327>=1)")
built 4 ordering constraints for composite.
built 1055 ordering constraints for composite.
built 802 ordering constraints for composite.
built 549 ordering constraints for composite.
built 296 ordering constraints for composite.
built 43 ordering constraints for composite.
built 26 ordering constraints for composite.
built 251 ordering constraints for composite.
built 244 ordering constraints for composite.
built 235 ordering constraints for composite.
built 228 ordering constraints for composite.
built 213 ordering constraints for composite.
built 198 ordering constraints for composite.
built 63 ordering constraints for composite.
built 42 ordering constraints for composite.
built 133 ordering constraints for composite.
built 22 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 13 ordering constraints for composite.
built 251 ordering constraints for composite.
built 244 ordering constraints for composite.
built 235 ordering constraints for composite.
built 228 ordering constraints for composite.
built 213 ordering constraints for composite.
built 198 ordering constraints for composite.
built 63 ordering constraints for composite.
built 42 ordering constraints for composite.
built 133 ordering constraints for composite.
built 22 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 13 ordering constraints for composite.
built 251 ordering constraints for composite.
built 244 ordering constraints for composite.
built 235 ordering constraints for composite.
built 228 ordering constraints for composite.
built 213 ordering constraints for composite.
built 198 ordering constraints for composite.
built 63 ordering constraints for composite.
built 42 ordering constraints for composite.
built 133 ordering constraints for composite.
built 22 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 13 ordering constraints for composite.
built 251 ordering constraints for composite.
built 244 ordering constraints for composite.
built 235 ordering constraints for composite.
built 228 ordering constraints for composite.
built 213 ordering constraints for composite.
built 198 ordering constraints for composite.
built 63 ordering constraints for composite.
built 42 ordering constraints for composite.
built 133 ordering constraints for composite.
built 22 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 6 ordering constraints for composite.
built 13 ordering constraints for composite.
built 278 ordering constraints for composite.
built 78 ordering constraints for composite.
built 71 ordering constraints for composite.
built 64 ordering constraints for composite.
built 198 ordering constraints for composite.
built 10 ordering constraints for composite.
built 6 ordering constraints for composite.
built 7 ordering constraints for composite.
Compilation finished in 84639 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 157 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(X(<>((LTLAP0==true)))))U(<>(X(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2586 ms.
FORMULA ASLink-PT-04b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]([]((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4193 ms.
FORMULA ASLink-PT-04b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]((X((LTLAP3==true)))U((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3232 ms.
FORMULA ASLink-PT-04b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(([]((LTLAP5==true)))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3021 ms.
FORMULA ASLink-PT-04b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []([](X([](X((LTLAP7==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2995 ms.
FORMULA ASLink-PT-04b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U(([]((LTLAP9==true)))U([]((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U(([]((LTLAP9==true)))U([]((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((((LTLAP11==true))U((LTLAP12==true)))U(<>(X((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3977 ms.
FORMULA ASLink-PT-04b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>([](X(<>(<>((LTLAP14==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5974 ms.
FORMULA ASLink-PT-04b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X([]((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3286 ms.
FORMULA ASLink-PT-04b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((((LTLAP16==true))U((LTLAP17==true)))U(X([]((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2952 ms.
FORMULA ASLink-PT-04b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X((LTLAP19==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3554 ms.
FORMULA ASLink-PT-04b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((X(X((LTLAP20==true))))U(X(<>((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3278 ms.
FORMULA ASLink-PT-04b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1173764 ms.
FORMULA ASLink-PT-04b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
LTSmin run took 1112762 ms.
FORMULA ASLink-PT-04b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U(([]((LTLAP9==true)))U([]((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 24, 2019 11:48:48 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 24, 2019 11:48:48 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 24, 2019 11:48:49 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 575 ms
Mar 24, 2019 11:48:49 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2034 places.
Mar 24, 2019 11:48:49 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2567 transitions.
Mar 24, 2019 11:48:49 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 24, 2019 11:48:49 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 117 ms
Mar 24, 2019 11:48:50 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 24, 2019 11:48:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1046 ms
Mar 24, 2019 11:48:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 582 ms
Mar 24, 2019 11:48:51 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 24, 2019 11:48:52 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2449,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2165,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2536,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t2385,t2385,t2385,t2381,t2381,t2381,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t2436,t2435,t2436,t2435,t2436,t2435,t2436,t2435,t2436,t2435,t2436,t2435,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t2350,t2347,t2344,t2341,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 114 events :t2453,t2452,t1560,t1560,t1560,t1560,t1560,t1560,t1560,t1552,t1552,t1552,t1552,t1552,t1552,t1552,t1544,t1544,t1544,t1544,t1544,t1544,t1544,t1536,t1536,t1536,t1536,t1536,t1536,t1536,t1528,t1528,t1528,t1528,t1528,t1528,t1528,t1520,t1520,t1520,t1520,t1520,t1520,t1520,t1512,t1512,t1512,t1512,t1512,t1512,t1512,t1504,t1504,t1504,t1504,t1504,t1504,t1504,t1496,t1496,t1496,t1496,t1496,t1496,t1496,t1488,t1488,t1488,t1488,t1488,t1488,t1488,t1480,t1480,t1480,t1480,t1480,t1480,t1480,t1472,t1472,t1472,t1472,t1472,t1472,t1472,t1464,t1464,t1464,t1464,t1464,t1464,t1464,t1456,t1456,t1456,t1456,t1456,t1456,t1456,t1448,t1448,t1448,t1448,t1448,t1448,t1448,t1440,t1440,t1440,t1440,t1440,t1440,t1440,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 254 events :t2260,t2259,t2261,t2260,t2259,t2261,t2260,t2259,t2261,t2260,t2259,t2261,t2260,t2259,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,t1901,t1900,t1899,t1898,t1897,t1896,t1895,t1894,t1893,t1892,t1891,t1890,t1889,t1888,t1887,t1886,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t2557,t2556,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2161,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t2142,t2143,t2142,t2143,t2142,t2143,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 116 events :t2558,t2555,t2558,t2555,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,t1583,t1582,t1581,t1580,t1579,t1578,t1577,t1576,t1575,t1574,t1573,t1572,t1571,t1570,t1569,t1568,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t2255,t2255,t2255,t2251,t2251,t2251,t2243,t2243,t2243,t2243,t2243,t2243,t2243,t2235,t2235,t2235,t2235,t2235,t2235,t2235,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,t1837,t1836,t1835,t1834,t1833,t1832,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2290,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t1829,t1829,t1826,t1826,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t2342,t2341,t2343,t2342,t2341,t2343,t2342,t2341,t2343,t2342,t2341,t2343,t2342,t2341,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,t1321,t1320,t1319,t1318,t1317,t1316,t1315,t1314,t1313,t1312,t1311,t1310,t1309,t1308,t1307,t1306,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 114 events :t2371,t2370,t1818,t1818,t1818,t1818,t1818,t1818,t1818,t1810,t1810,t1810,t1810,t1810,t1810,t1810,t1802,t1802,t1802,t1802,t1802,t1802,t1802,t1794,t1794,t1794,t1794,t1794,t1794,t1794,t1786,t1786,t1786,t1786,t1786,t1786,t1786,t1778,t1778,t1778,t1778,t1778,t1778,t1778,t1770,t1770,t1770,t1770,t1770,t1770,t1770,t1762,t1762,t1762,t1762,t1762,t1762,t1762,t1754,t1754,t1754,t1754,t1754,t1754,t1754,t1746,t1746,t1746,t1746,t1746,t1746,t1746,t1738,t1738,t1738,t1738,t1738,t1738,t1738,t1730,t1730,t1730,t1730,t1730,t1730,t1730,t1722,t1722,t1722,t1722,t1722,t1722,t1722,t1714,t1714,t1714,t1714,t1714,t1714,t1714,t1706,t1706,t1706,t1706,t1706,t1706,t1706,t1698,t1698,t1698,t1698,t1698,t1698,t1698,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2151,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t2424,t2423,t2425,t2424,t2423,t2425,t2424,t2423,t2425,t2424,t2423,t2425,t2424,t2423,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,t1713,t1712,t1711,t1710,t1709,t1708,t1707,t1706,t1705,t1704,t1703,t1702,t1701,t1700,t1699,t1698,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 247 events :t2147,t2146,t2210,t2147,t2146,t2210,t2147,t2146,t2210,t2147,t2146,t2147,t2146,t2148,t2148,t2147,t2146,t2148,t2147,t2146,t2148,t2147,t2146,t2134,t2134,t2134,t2134,t2134,t2134,t2134,t2126,t2126,t2126,t2126,t2126,t2126,t2126,t2118,t2118,t2118,t2118,t2118,t2118,t2118,t2110,t2110,t2110,t2110,t2110,t2110,t2110,t2102,t2102,t2102,t2102,t2102,t2102,t2102,t2094,t2094,t2094,t2094,t2094,t2094,t2094,t2086,t2086,t2086,t2086,t2086,t2086,t2086,t2078,t2078,t2078,t2078,t2078,t2078,t2078,t2070,t2070,t2070,t2070,t2070,t2070,t2070,t2062,t2062,t2062,t2062,t2062,t2062,t2062,t2054,t2054,t2054,t2054,t2054,t2054,t2054,t2046,t2046,t2046,t2046,t2046,t2046,t2046,t2038,t2038,t2038,t2038,t2038,t2038,t2038,t2030,t2030,t2030,t2030,t2030,t2030,t2030,t2022,t2022,t2022,t2022,t2022,t2022,t2022,t2014,t2014,t2014,t2014,t2014,t2014,t2014,t2006,t2006,t2006,t2006,t2006,t2006,t2006,t1998,t1998,t1998,t1998,t1998,t1998,t1998,t1990,t1990,t1990,t1990,t1990,t1990,t1990,t1982,t1982,t1982,t1982,t1982,t1982,t1982,t1974,t1974,t1974,t1974,t1974,t1974,t1974,t1966,t1966,t1966,t1966,t1966,t1966,t1966,t1958,t1958,t1958,t1958,t1958,t1958,t1958,t1950,t1950,t1950,t1950,t1950,t1950,t1950,t1942,t1942,t1942,t1942,t1942,t1942,t1942,t1934,t1934,t1934,t1934,t1934,t1934,t1934,t1926,t1926,t1926,t1926,t1926,t1926,t1926,t1918,t1918,t1918,t1918,t1918,t1918,t1918,t1910,t1910,t1910,t1910,t1910,t1910,t1910,t1902,t1902,t1902,t1902,t1902,t1902,t1902,t1894,t1894,t1894,t1894,t1894,t1894,t1894,t1886,t1886,t1886,t1886,t1886,t1886,t1886,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :t2337,t2337,t2337,t2333,t2333,t2333,t2325,t2325,t2325,t2325,t2325,t2325,t2325,t2317,t2317,t2317,t2317,t2317,t2317,t2317,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t2220,t2217,t2214,t2211,t61,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2454,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2531,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t61,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 74 events :t2176,t2175,t2171,t2172,t2176,t2175,t2171,t2172,t2169,t2170,t2171,t2172,t2169,t2170,t2171,t2172,t2172,t2171,t2170,t2169,t2172,t2171,t2170,t2169,t2176,t2175,t2171,t2172,t2169,t2170,t2171,t2172,t2172,t2171,t2170,t2169,t2171,t2172,t1883,t1883,t1880,t1880,t1877,t1877,t1874,t1874,t1871,t1871,t1868,t1868,t1865,t1865,t1862,t1862,t1859,t1859,t1856,t1856,t1853,t1853,t1850,t1850,t1847,t1847,t1844,t1844,t1841,t1841,t1838,t1838,t1835,t1835,t1832,t1832,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2156,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t2268,t2265,t2262,t2259,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t2303,t2303,t2303,t2299,t2299,t2299,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2285,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t1437,t1437,t1434,t1434,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t2549,t2549,t2549,t2545,t2545,t2545,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t2432,t2429,t2426,t2423,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 114 events :t2535,t2534,t1688,t1688,t1688,t1688,t1688,t1688,t1688,t1680,t1680,t1680,t1680,t1680,t1680,t1680,t1672,t1672,t1672,t1672,t1672,t1672,t1672,t1664,t1664,t1664,t1664,t1664,t1664,t1664,t1656,t1656,t1656,t1656,t1656,t1656,t1656,t1648,t1648,t1648,t1648,t1648,t1648,t1648,t1640,t1640,t1640,t1640,t1640,t1640,t1640,t1632,t1632,t1632,t1632,t1632,t1632,t1632,t1624,t1624,t1624,t1624,t1624,t1624,t1624,t1616,t1616,t1616,t1616,t1616,t1616,t1616,t1608,t1608,t1608,t1608,t1608,t1608,t1608,t1600,t1600,t1600,t1600,t1600,t1600,t1600,t1592,t1592,t1592,t1592,t1592,t1592,t1592,t1584,t1584,t1584,t1584,t1584,t1584,t1584,t1576,t1576,t1576,t1576,t1576,t1576,t1576,t1568,t1568,t1568,t1568,t1568,t1568,t1568,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t2518,t2517,t2518,t2517,t2518,t2517,t2518,t2517,t2518,t2517,t2518,t2517,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :t2419,t2419,t2419,t2415,t2415,t2415,t2407,t2407,t2407,t2407,t2407,t2407,t2407,t2399,t2399,t2399,t2399,t2399,t2399,t2399,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t2514,t2511,t2508,t2505,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2146,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t2272,t2271,t2272,t2271,t2272,t2271,t2272,t2271,t2272,t2271,t2272,t2271,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2372,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t61,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t1303,t1303,t1300,t1300,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t2354,t2353,t2354,t2353,t2354,t2353,t2354,t2353,t2354,t2353,t2354,t2353,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t2506,t2505,t2507,t2506,t2505,t2507,t2506,t2505,t2507,t2506,t2505,t2507,t2506,t2505,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,t1455,t1454,t1453,t1452,t1451,t1450,t1449,t1448,t1447,t1446,t1445,t1444,t1443,t1442,t1441,t1440,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t2467,t2467,t2467,t2463,t2463,t2463,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :t2501,t2501,t2501,t2497,t2497,t2497,t2489,t2489,t2489,t2489,t2489,t2489,t2489,t2481,t2481,t2481,t2481,t2481,t2481,t2481,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t2367,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 114 events :t2289,t2288,t1426,t1426,t1426,t1426,t1426,t1426,t1426,t1418,t1418,t1418,t1418,t1418,t1418,t1418,t1410,t1410,t1410,t1410,t1410,t1410,t1410,t1402,t1402,t1402,t1402,t1402,t1402,t1402,t1394,t1394,t1394,t1394,t1394,t1394,t1394,t1386,t1386,t1386,t1386,t1386,t1386,t1386,t1378,t1378,t1378,t1378,t1378,t1378,t1378,t1370,t1370,t1370,t1370,t1370,t1370,t1370,t1362,t1362,t1362,t1362,t1362,t1362,t1362,t1354,t1354,t1354,t1354,t1354,t1354,t1354,t1346,t1346,t1346,t1346,t1346,t1346,t1346,t1338,t1338,t1338,t1338,t1338,t1338,t1338,t1330,t1330,t1330,t1330,t1330,t1330,t1330,t1322,t1322,t1322,t1322,t1322,t1322,t1322,t1314,t1314,t1314,t1314,t1314,t1314,t1314,t1306,t1306,t1306,t1306,t1306,t1306,t1306,
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1781 redundant transitions.
Mar 24, 2019 11:48:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1483 ms
Mar 24, 2019 11:48:54 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 160 ms
Mar 24, 2019 11:48:54 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Mar 24, 2019 11:48:56 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2567 transitions.
Mar 24, 2019 11:48:56 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2567) to apply POR reductions. Disabling POR matrices.
Mar 24, 2019 11:48:56 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1940ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-04b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is ASLink-PT-04b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r008-smll-155225014000079"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-04b.tgz
mv ASLink-PT-04b execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;