fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r285-csrt-152749176700744
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for RefineWMG-PT-050051

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.450 29557.00 67962.00 155.40 FFFFFFFTFFFFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 276K
-rw-r--r-- 1 mcc users 3.3K May 30 22:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 30 22:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 29 16:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 29 16:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.2K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 11:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 11:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 09:18 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.7K May 28 09:18 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.5K May 28 07:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 28 07:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 111 May 26 06:33 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 349 May 26 06:33 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 27 05:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 27 05:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 7 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 109K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is RefineWMG-PT-050051, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r285-csrt-152749176700744

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-00
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-01
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-02
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-03
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-04
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-05
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-06
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-07
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-08
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-09
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-10
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-11
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-12
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-13
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-14
FORMULA_NAME RefineWMG-PT-050-051-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528047694771

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph776941177693752290.txt, -o, /tmp/graph776941177693752290.bin, -w, /tmp/graph776941177693752290.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph776941177693752290.bin, -l, -1, -v, -w, /tmp/graph776941177693752290.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("(i6.u20.p39>=1)")))
Formula 0 simplified : !G"(i6.u20.p39>=1)"
built 44 ordering constraints for composite.
built 4 ordering constraints for composite.
built 1 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 1 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 1 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 1 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 1 ordering constraints for composite.
built 4 ordering constraints for composite.
built 1 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
built 1 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 203 rows 254 cols
invariant :i15:u58:p119 + i15:u58:p120 = 51
invariant :i14:u55:p112 + i14:u55:p113 = 51
invariant :i20:u80:p164 + i20:u80:p165 = 51
invariant :i3:u10:p19 + i3:u10:p20 = 51
invariant :i12:u48:p99 + i12:u48:p100 = 51
invariant :i6:u20:p39 + i6:u20:p40 = 51
invariant :i23:u90:p184 + i23:u90:p185 = 51
invariant :i18:u73:p149 + i18:u73:p150 = 51
invariant :i20:u77:p157 + i20:u77:p158 = 51
invariant :i31:u111:p234 + i31:u111:p235 = 51
invariant :i6:u19:p37 + i6:u19:p38 = 51
invariant :i22:u84:p172 + i22:u84:p173 = 51
invariant :i31:u110:p232 + i31:u110:p233 = 51
invariant :i24:u92:p189 + i24:u92:p190 = 51
invariant :i2:u5:p9 + i2:u5:p10 = 51
invariant :i17:u67:p137 + i17:u67:p138 = 51
invariant :i24:u93:p192 + i24:u93:p193 = 51
invariant :i5:u17:p34 + i5:u17:p35 = 51
invariant :i8:u31:p64 + i8:u31:p65 = 51
invariant :i11:u46:p94 + i11:u46:p95 = 51
invariant :i27:u102:p212 + i27:u102:p213 = 51
invariant :i1:u0:p + i1:u0:pprime + i1:u0:p1 + i2:u6:p6 + i2:u6:p11 + i2:u6:p16 + i4:u11:p21 + i4:u11:p26 + i4:u11:p31 + i6:u18:p36 + i6:u18:p41 + i6:u18:p46 + i7:u25:p51 + i7:u25:p56 + i7:u25:p61 + i9:u32:p66 + i9:u32:p71 + i10:u39:p76 + i10:u39:p81 + i10:u39:p86 + i11:u44:p91 + i11:u44:p96 + i13:u51:p101 + i13:u51:p106 + i14:u54:p111 + i14:u54:p116 + i15:u59:p121 + i15:u59:p126 + i17:u64:p131 + i17:u64:p136 + i18:u71:p141 + i18:u71:p146 + i18:u71:p151 + i20:u76:p156 + i20:u76:p161 + i20:u76:p166 + i22:u83:p171 + i22:u83:p176 + i23:u88:p181 + i23:u88:p186 + i24:u95:p191 + i24:u95:p196 = 7
invariant :i25:u98:p202 + i25:u98:p203 = 51
invariant :i32:u113:p239 + i32:u113:p240 = 51
invariant :i33:u115:p244 + i33:u115:p245 = 51
invariant :i6:u22:p44 + i6:u22:p45 = 51
invariant :i17:u68:p139 + i17:u68:p140 = 51
invariant :i14:u56:p114 + i14:u56:p115 = 51
invariant :i32:u112:p237 + i32:u112:p238 = 51
invariant :i13:u53:p109 + i13:u53:p110 = 51
invariant :i7:u27:p54 + i7:u27:p55 = 51
invariant :i15:u61:p124 + i15:u61:p125 = 51
invariant :i10:u40:p82 + i10:u40:p83 = 51
invariant :i9:u34:p69 + i9:u34:p70 = 51
invariant :i11:u42:p87 + i11:u42:p88 = 51
invariant :i22:u85:p174 + i22:u85:p175 = 51
invariant :i16:u62:p127 + i16:u62:p128 = 51
invariant :i7:u26:p52 + i7:u26:p53 = 51
invariant :i7:u29:p59 + i7:u29:p60 = 51
invariant :i3:u9:p17 + i3:u9:p18 = 51
invariant :i0:u97:p199 + i0:u97:p200 = 51
invariant :i10:u37:p77 + i10:u37:p78 = 51
invariant :i24:u94:p194 + i24:u94:p195 = 51
invariant :i13:u49:p102 + i13:u49:p103 = 51
invariant :i28:u105:p219 + i28:u105:p220 = 51
invariant :i7:u28:p57 + i7:u28:p58 = 51
invariant :i21:u81:p167 + i21:u81:p168 = 51
invariant :i30:u109:p229 + i30:u109:p230 = 51
invariant :i6:u21:p42 + i6:u21:p43 = 51
invariant :i17:u65:p132 + i17:u65:p133 = 51
invariant :i2:u4:p7 + i2:u4:p8 = 51
invariant :i27:u103:p214 + i27:u103:p215 = 51
invariant :i18:u72:p147 + i18:u72:p148 = 51
invariant :i4:u12:p22 + i4:u12:p23 = 51
invariant :i2:u8:p14 + i2:u8:p15 = 51
invariant :i20:u78:p159 + i20:u78:p160 = 51
invariant :i26:u100:p207 + i26:u100:p208 = 51
invariant :i9:u36:p74 + i9:u36:p75 = 51
invariant :i22:u87:p179 + i22:u87:p180 = 51
invariant :i22:u86:p177 + i22:u86:p178 = 51
invariant :i25:u99:p204 + i25:u99:p205 = 51
invariant :i30:u108:p227 + i30:u108:p228 = 51
invariant :i12:u47:p97 + i12:u47:p98 = 51
invariant :i34:u117:p249 + i34:u117:p250 = 51
invariant :i0:u96:p197 + i0:u96:p198 = 51
invariant :i34:u116:p247 + i34:u116:p248 = 51
invariant :i1:u1:psecond + i1:u1:pterce = 5
invariant :i26:u101:p209 + i26:u101:p210 = 51
invariant :i4:u15:p29 + i4:u15:p30 = 51
invariant :i6:u24:p49 + i6:u24:p50 = 51
invariant :i19:u75:p154 + i19:u75:p155 = 51
invariant :i9:u35:p72 + i9:u35:p73 = 51
invariant :i20:u79:p162 + i20:u79:p163 = 51
invariant :i11:u43:p89 + i11:u43:p90 = 51
invariant :i15:u57:p117 + i15:u57:p118 = 51
invariant :i10:u38:p79 + i10:u38:p80 = 51
invariant :i29:u106:p222 + i29:u106:p223 = 51
invariant :i33:u114:p242 + i33:u114:p243 = 51
invariant :i11:u45:p92 + i11:u45:p93 = 51
invariant :i1:u2:p2 + i1:u2:p3 = 51
invariant :i15:u60:p122 + i15:u60:p123 = 51
invariant :i29:u107:p224 + i29:u107:p225 = 51
invariant :i8:u30:p62 + i8:u30:p63 = 51
invariant :i23:u89:p182 + i23:u89:p183 = 51
invariant :i4:u13:p24 + i4:u13:p25 = 51
invariant :i17:u66:p134 + i17:u66:p135 = 51
invariant :i13:u52:p107 + i13:u52:p108 = 51
invariant :i18:u69:p142 + i18:u69:p143 = 51
invariant :i28:u104:p217 + i28:u104:p218 = 51
invariant :i24:u91:p187 + i24:u91:p188 = 51
invariant :i4:u14:p27 + i4:u14:p28 = 51
invariant :i16:u63:p129 + i16:u63:p130 = 51
invariant :i1:u3:p4 + i1:u3:p5 = 51
invariant :i19:u74:p152 + i19:u74:p153 = 51
invariant :i13:u50:p104 + i13:u50:p105 = 51
invariant :i5:u16:p32 + i5:u16:p33 = 51
invariant :i18:u70:p144 + i18:u70:p145 = 51
invariant :i21:u82:p169 + i21:u82:p170 = 51
invariant :i2:u7:p12 + i2:u7:p13 = 51
invariant :i10:u41:p84 + i10:u41:p85 = 51
invariant :i6:u23:p47 + i6:u23:p48 = 51
invariant :i9:u33:p67 + i9:u33:p68 = 51
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3164 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 57 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3380 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(<>(X(X((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP2==true))U(<>([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(<>([]((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 67 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](((LTLAP6==true))U([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 201 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 78 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP10==true))U(((LTLAP11==true))U((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X([]((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X([]([]((LTLAP16==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 111 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 116 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X((X((LTLAP19==true)))U(X((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 71 ms.
FORMULA RefineWMG-PT-050-051-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1528047724328

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 5:41:36 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 5:41:36 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 5:41:36 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 70 ms
Jun 03, 2018 5:41:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 254 places.
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 203 transitions.
Jun 03, 2018 5:41:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 33 ms
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 73 ms
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 31 ms
Begin: Sun Jun 3 17:41:37 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sun Jun 3 17:41:37 2018
network size: 254 nodes, 850 links, 406 weight
quality increased from -0.00462682 to 0.8228
end computation: Sun Jun 3 17:41:37 2018
level 1:
start computation: Sun Jun 3 17:41:37 2018
network size: 118 nodes, 482 links, 406 weight
quality increased from 0.8228 to 0.922444
end computation: Sun Jun 3 17:41:37 2018
level 2:
start computation: Sun Jun 3 17:41:37 2018
network size: 48 nodes, 158 links, 406 weight
quality increased from 0.922444 to 0.929163
end computation: Sun Jun 3 17:41:37 2018
level 3:
start computation: Sun Jun 3 17:41:37 2018
network size: 35 nodes, 101 links, 406 weight
quality increased from 0.929163 to 0.930258
end computation: Sun Jun 3 17:41:37 2018
End: Sun Jun 3 17:41:37 2018
Total duration: 0 sec
0.930258
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 93 ms
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 5:41:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
Jun 03, 2018 5:41:37 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Jun 03, 2018 5:41:37 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 203 transitions.
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 102 place invariants in 57 ms
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 254 variables to be positive in 530 ms
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 203 transitions.
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/203 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 203 transitions.
Jun 03, 2018 5:41:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:41:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 203 transitions.
Jun 03, 2018 5:41:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/203) took 2393 ms. Total solver calls (SAT/UNSAT): 247(247/0)
Jun 03, 2018 5:41:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/203) took 5544 ms. Total solver calls (SAT/UNSAT): 637(637/0)
Jun 03, 2018 5:41:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/203) took 8580 ms. Total solver calls (SAT/UNSAT): 973(973/0)
Jun 03, 2018 5:41:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 10544 ms. Total solver calls (SAT/UNSAT): 1062(1062/0)
Jun 03, 2018 5:41:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 203 transitions.
Jun 03, 2018 5:41:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 6369 ms. Total solver calls (SAT/UNSAT): 193(0/193)
Jun 03, 2018 5:41:56 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 18614ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-050051"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-050051.tgz
mv RefineWMG-PT-050051 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is RefineWMG-PT-050051, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r285-csrt-152749176700744"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;