fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r285-csrt-152749175700017
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DiscoveryGPU-PT-06b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.210 2719.00 4731.00 96.00 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 232K
-rw-r--r-- 1 mcc users 5.2K May 30 20:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 33K May 30 20:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 29 13:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 29 13:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K May 28 07:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.3K May 28 06:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 28 06:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 27 03:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 27 03:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 46K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DiscoveryGPU-PT-06b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r285-csrt-152749175700017

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-06b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527985993093

Flatten gal took : 77 ms
Constant places removed 13 places and 1 transitions.
Performed 84 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 97 rules applied. Total rules applied 97 place count 171 transition count 109
Constant places removed 86 places and 2 transitions.
Iterating post reduction 1 with 86 rules applied. Total rules applied 183 place count 85 transition count 107
Symmetric choice reduction at 2 with 8 rule applications. Total rules 191 place count 85 transition count 107
Constant places removed 8 places and 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 199 place count 77 transition count 99
Symmetric choice reduction at 3 with 5 rule applications. Total rules 204 place count 77 transition count 99
Constant places removed 5 places and 5 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 209 place count 72 transition count 94
Symmetric choice reduction at 4 with 5 rule applications. Total rules 214 place count 72 transition count 94
Constant places removed 5 places and 10 transitions.
Iterating post reduction 4 with 5 rules applied. Total rules applied 219 place count 67 transition count 84
Symmetric choice reduction at 5 with 5 rule applications. Total rules 224 place count 67 transition count 84
Constant places removed 5 places and 5 transitions.
Iterating post reduction 5 with 5 rules applied. Total rules applied 229 place count 62 transition count 79
Performed 21 Post agglomeration using F-continuation condition.
Constant places removed 23 places and 0 transitions.
Performed 13 Post agglomeration using F-continuation condition.
Iterating post reduction 6 with 36 rules applied. Total rules applied 265 place count 39 transition count 45
Constant places removed 19 places and 6 transitions.
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 21 rules applied. Total rules applied 286 place count 20 transition count 37
Constant places removed 1 places and 0 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 287 place count 19 transition count 37
Performed 7 Post agglomeration using F-continuation condition.
Constant places removed 7 places and 0 transitions.
Iterating post reduction 9 with 7 rules applied. Total rules applied 294 place count 12 transition count 30
Applied a total of 294 rules in 37 ms. Remains 12 /184 variables (removed 172) and now considering 30/194 (removed 164) transitions.
Normalized transition count is 19
// Phase 1: matrix 19 rows 12 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 19
// Phase 1: matrix 19 rows 12 cols

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 0 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,729,0.01039,4536,8,4,22,13,20,0,11,9,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1,0.010986,4536,8,3,54,25,39,38,37,36,39

System contains 1 deadlocks (shown below if less than --print-limit option) !
FORMULA DiscoveryGPU-PT-06b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ u11={[ ]
} u10={[ ]
} u9={[ ]
} u8={[ ]
} u7={[ ]
} u6={[ ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527985995812

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 12:33:14 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 12:33:14 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 12:33:14 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 59 ms
Jun 03, 2018 12:33:14 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 184 places.
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 194 transitions.
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 12:33:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 73 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 4 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 194 transitions.
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 12:33:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 1 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 30 transitions.
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 0 ms
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 03, 2018 12:33:15 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 90ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-06b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-06b.tgz
mv DiscoveryGPU-PT-06b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DiscoveryGPU-PT-06b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r285-csrt-152749175700017"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;