Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 4.0K May 30 20:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 30 20:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 29 14:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 29 14:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K May 28 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 28 06:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 28 06:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 27 03:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 27 03:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 82K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DiscoveryGPU-PT-11b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r284-csrt-152749174600105
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-11b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527921320782

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(X(G(F("((u15.p134>=1)&&(u23.p315>=1))")))))))
Formula 0 simplified : !FXGF"((u15.p134>=1)&&(u23.p315>=1))"
built 34 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 344 rows 324 cols
invariant :u16:p146 + u16:p147 + u16:p148 + u16:p149 + u16:p150 + u16:p151 + u16:p152 + u16:p153 + u16:p154 + u16:p155 + u16:p156 + u16:p157 + u16:p158 + u16:p159 + u16:p160 + u16:p161 + u16:p162 + u16:p163 + u16:p164 + u16:p165 + u16:p166 + u16:p167 + u16:p168 + u16:p169 + u16:p170 + u16:p171 + u16:p172 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u15:p119 + u15:p120 + u15:p121 + u15:p122 + u15:p123 + u15:p124 + u15:p125 + u15:p126 + u15:p127 + u15:p128 + u15:p129 + u15:p130 + u15:p131 + u15:p132 + u15:p133 + u15:p134 + u15:p135 + u15:p136 + u15:p137 + u15:p138 + u15:p139 + u15:p140 + u15:p141 + u15:p142 + u15:p143 + u15:p144 + u15:p145 + u33:p7 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u24:p318 + u24:p319 + u24:p320 + u24:p321 + u24:p322 + u24:p323 + u36:p308 + u26:p0 = 1
invariant :u21:p281 + u21:p282 + u21:p283 + u21:p284 + u21:p285 + u21:p286 + u21:p287 + u21:p288 + u21:p289 + u21:p290 + u21:p291 + u21:p292 + u21:p293 + u21:p294 + u21:p295 + u21:p296 + u21:p297 + u21:p298 + u21:p299 + u21:p300 + u21:p301 + u21:p302 + u21:p303 + u21:p304 + u21:p305 + u21:p306 + u21:p307 + u27:p1 + u26:p0 = 1
invariant :u11:p11 + u11:p12 + u11:p13 + u11:p14 + u11:p15 + u11:p16 + u11:p17 + u11:p18 + u11:p19 + u11:p20 + u11:p21 + u11:p22 + u11:p23 + u11:p24 + u11:p25 + u11:p26 + u11:p27 + u11:p28 + u11:p29 + u11:p30 + u11:p31 + u11:p32 + u11:p33 + u11:p34 + u11:p35 + u11:p36 + u11:p37 + u25:p10 + u35:p9 + u34:p8 + u33:p7 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u13:p65 + u13:p66 + u13:p67 + u13:p68 + u13:p69 + u13:p70 + u13:p71 + u13:p72 + u13:p73 + u13:p74 + u13:p75 + u13:p76 + u13:p77 + u13:p78 + u13:p79 + u13:p80 + u13:p81 + u13:p82 + u13:p83 + u13:p84 + u13:p85 + u13:p86 + u13:p87 + u13:p88 + u13:p89 + u13:p90 + u13:p91 + u35:p9 + u34:p8 + u33:p7 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u14:p92 + u14:p93 + u14:p94 + u14:p95 + u14:p96 + u14:p97 + u14:p98 + u14:p99 + u14:p100 + u14:p101 + u14:p102 + u14:p103 + u14:p104 + u14:p105 + u14:p106 + u14:p107 + u14:p108 + u14:p109 + u14:p110 + u14:p111 + u14:p112 + u14:p113 + u14:p114 + u14:p115 + u14:p116 + u14:p117 + u14:p118 + u34:p8 + u33:p7 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u20:p254 + u20:p255 + u20:p256 + u20:p257 + u20:p258 + u20:p259 + u20:p260 + u20:p261 + u20:p262 + u20:p263 + u20:p264 + u20:p265 + u20:p266 + u20:p267 + u20:p268 + u20:p269 + u20:p270 + u20:p271 + u20:p272 + u20:p273 + u20:p274 + u20:p275 + u20:p276 + u20:p277 + u20:p278 + u20:p279 + u20:p280 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u12:p38 + u12:p39 + u12:p40 + u12:p41 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + u12:p46 + u12:p47 + u12:p48 + u12:p49 + u12:p50 + u12:p51 + u12:p52 + u12:p53 + u12:p54 + u12:p55 + u12:p56 + u12:p57 + u12:p58 + u12:p59 + u12:p60 + u12:p61 + u12:p62 + u12:p63 + u12:p64 + u25:p10 + u35:p9 + u34:p8 + u33:p7 + u32:p6 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u19:p227 + u19:p228 + u19:p229 + u19:p230 + u19:p231 + u19:p232 + u19:p233 + u19:p234 + u19:p235 + u19:p236 + u19:p237 + u19:p238 + u19:p239 + u19:p240 + u19:p241 + u19:p242 + u19:p243 + u19:p244 + u19:p245 + u19:p246 + u19:p247 + u19:p248 + u19:p249 + u19:p250 + u19:p251 + u19:p252 + u19:p253 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u17:p173 + u17:p174 + u17:p175 + u17:p176 + u17:p177 + u17:p178 + u17:p179 + u17:p180 + u17:p181 + u17:p182 + u17:p183 + u17:p184 + u17:p185 + u17:p186 + u17:p187 + u17:p188 + u17:p189 + u17:p190 + u17:p191 + u17:p192 + u17:p193 + u17:p194 + u17:p195 + u17:p196 + u17:p197 + u17:p198 + u17:p199 + u31:p5 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
invariant :u23:p309 + u23:p310 + u23:p311 + u23:p312 + u23:p313 + u23:p314 + u23:p315 + u23:p316 + u23:p317 + u36:p308 + u26:p0 = 1
invariant :u18:p200 + u18:p201 + u18:p202 + u18:p203 + u18:p204 + u18:p205 + u18:p206 + u18:p207 + u18:p208 + u18:p209 + u18:p210 + u18:p211 + u18:p212 + u18:p213 + u18:p214 + u18:p215 + u18:p216 + u18:p217 + u18:p218 + u18:p219 + u18:p220 + u18:p221 + u18:p222 + u18:p223 + u18:p224 + u18:p225 + u18:p226 + u30:p4 + u29:p3 + u28:p2 + u27:p1 + u26:p0 = 1
Reverse transition relation is NOT exact ! Due to transitions u11.t206, u11.t212, u11.t216, u11.t218, u11.t220, u11.t222, u12.t188, u12.t194, u12.t198, u12.t200, u12.t202, u12.t204, u13.t169, u13.t175, u13.t179, u13.t181, u13.t183, u13.t185, u14.t150, u14.t156, u14.t160, u14.t162, u14.t164, u14.t166, u15.t131, u15.t137, u15.t141, u15.t143, u15.t145, u15.t147, u16.t112, u16.t118, u16.t122, u16.t124, u16.t126, u16.t128, u17.t93, u17.t99, u17.t103, u17.t105, u17.t107, u17.t109, u18.t74, u18.t80, u18.t84, u18.t86, u18.t88, u18.t90, u19.t55, u19.t61, u19.t65, u19.t67, u19.t69, u19.t71, u20.t36, u20.t42, u20.t46, u20.t48, u20.t50, u20.t52, u21.t17, u21.t23, u21.t27, u21.t29, u21.t31, u21.t33, u23.t9, u23.t11, u23.t12, u23.t14, u24.t3, u24.t4, u24.t6, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/271/73/344
Computing Next relation with stutter on 2048 deadlock states
65 unique states visited
65 strongly connected components in search stack
66 transitions explored
65 items max in DFS search stack
2019 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,20.2413,414272,1,0,590215,86732,2416,833854,947,780495,1478309
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(X((X("((u13.p91>=1)&&(u23.p315>=1))"))U(X("((u13.p78>=1)&&(u23.p315>=1))"))))))
Formula 1 simplified : !GX(X"((u13.p91>=1)&&(u23.p315>=1))" U X"((u13.p78>=1)&&(u23.p315>=1))")
Computing Next relation with stutter on 2048 deadlock states
122 unique states visited
122 strongly connected components in search stack
123 transitions explored
122 items max in DFS search stack
281 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,23.0527,473400,1,0,673540,100270,2486,957613,947,931020,1595587
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((G((X(F("((u12.p44>=1)&&(u23.p315>=1))")))U(("(u17.p182>=1)")U("(u12.p61>=1)")))))
Formula 2 simplified : !G(XF"((u12.p44>=1)&&(u23.p315>=1))" U ("(u17.p182>=1)" U "(u12.p61>=1)"))
Computing Next relation with stutter on 2048 deadlock states
65 unique states visited
65 strongly connected components in search stack
66 transitions explored
65 items max in DFS search stack
1172 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,34.7836,724436,1,0,1.07004e+06,117637,2578,1.44862e+06,949,1.17212e+06,2153080
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(X(X(F("((u20.p267>=1)&&(u23.p315>=1))"))))))
Formula 3 simplified : !FXXF"((u20.p267>=1)&&(u23.p315>=1))"
Computing Next relation with stutter on 2048 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1156 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,46.3372,1038936,1,0,1.67748e+06,122746,2632,2.25904e+06,949,1.27702e+06,3444389
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(F("(u17.p196>=1)"))))
Formula 4 simplified : !F"(u17.p196>=1)"
Computing Next relation with stutter on 2048 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
241 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.7472,1078008,1,0,1.7471e+06,122820,2675,2.3485e+06,949,1.2799e+06,3597387
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(("(u13.p90>=1)"))
Formula 5 simplified : !"(u13.p90>=1)"
Computing Next relation with stutter on 2048 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.748,1078008,1,0,1.7471e+06,122820,2682,2.3485e+06,950,1.2799e+06,3597414
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("(u21.p286>=1)"))
Formula 6 simplified : !"(u21.p286>=1)"
Computing Next relation with stutter on 2048 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,48.7495,1078272,1,0,1.7471e+06,122820,2687,2.3485e+06,951,1.2799e+06,3597428
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((((F("((u17.p181>=1)&&(u24.p322>=1))"))U(X("((u20.p280>=1)&&(u23.p315>=1))")))U(F(X(G("(u16.p168>=1)"))))))
Formula 7 simplified : !((F"((u17.p181>=1)&&(u24.p322>=1))" U X"((u20.p280>=1)&&(u23.p315>=1))") U FXG"(u16.p168>=1)")
Computing Next relation with stutter on 2048 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5341 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 120 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((<>((LTLAP10==true)))U(X((LTLAP11==true))))U(<>(X([]((LTLAP12==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 105 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]([]([]((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 272 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([](((LTLAP14==true))U([]((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 280 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 276 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>(<>([]((LTLAP17==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 266 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 321 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X(X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 54 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]([]((LTLAP20==true))))U([](<>(<>((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 319 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>(<>((LTLAP22==true))))U(((LTLAP23==true))U((LTLAP24==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 286 ms.
FORMULA DiscoveryGPU-PT-11b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527921380881

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 80 ms
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 324 places.
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 344 transitions.
Jun 02, 2018 6:35:22 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 6:35:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 22 ms
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 68 ms
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 94 redundant transitions.
Jun 02, 2018 6:35:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 6 ms
Jun 02, 2018 6:35:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 344 transitions.
Jun 02, 2018 6:35:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 13 place invariants in 96 ms
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 324 variables to be positive in 558 ms
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 344 transitions.
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/344 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 344 transitions.
Jun 02, 2018 6:35:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 21 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:35:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 344 transitions.
Jun 02, 2018 6:35:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/344) took 925 ms. Total solver calls (SAT/UNSAT): 1973(0/1973)
Jun 02, 2018 6:35:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/344) took 3929 ms. Total solver calls (SAT/UNSAT): 3023(280/2743)
Jun 02, 2018 6:35:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/344) took 6971 ms. Total solver calls (SAT/UNSAT): 3905(495/3410)
Jun 02, 2018 6:35:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/344) took 10268 ms. Total solver calls (SAT/UNSAT): 4391(787/3604)
Jun 02, 2018 6:35:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/344) took 13780 ms. Total solver calls (SAT/UNSAT): 4821(1055/3766)
Jun 02, 2018 6:35:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/344) took 17299 ms. Total solver calls (SAT/UNSAT): 5381(1387/3994)
Jun 02, 2018 6:35:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/344) took 20537 ms. Total solver calls (SAT/UNSAT): 6029(1751/4278)
Jun 02, 2018 6:35:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/344) took 24330 ms. Total solver calls (SAT/UNSAT): 6354(1923/4431)
Jun 02, 2018 6:35:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/344) took 27405 ms. Total solver calls (SAT/UNSAT): 6596(2043/4553)
Jun 02, 2018 6:35:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/344) took 32358 ms. Total solver calls (SAT/UNSAT): 7131(2275/4856)
Jun 02, 2018 6:36:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/344) took 35481 ms. Total solver calls (SAT/UNSAT): 7446(2391/5055)
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/344) took 38536 ms. Total solver calls (SAT/UNSAT): 8074(2478/5596)
Jun 02, 2018 6:36:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/344) took 41542 ms. Total solver calls (SAT/UNSAT): 8204(2481/5723)
Jun 02, 2018 6:36:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(247/344) took 44542 ms. Total solver calls (SAT/UNSAT): 9256(2503/6753)
Jun 02, 2018 6:36:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 45946 ms. Total solver calls (SAT/UNSAT): 10057(2519/7538)
Jun 02, 2018 6:36:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 344 transitions.
Jun 02, 2018 6:36:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 32 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:36:12 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 49186ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-11b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-11b.tgz
mv DiscoveryGPU-PT-11b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DiscoveryGPU-PT-11b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r284-csrt-152749174600105"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;