fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r273-smll-152749150000449
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DLCflexbar-PT-6b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15748.370 3600000.00 4315201.00 7835.80 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 9.8M
-rw-r--r-- 1 mcc users 4.1K May 30 00:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 30 00:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 28 21:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 28 21:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 28 09:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 28 09:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.4K May 28 07:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 27 12:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 12:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.3K May 26 14:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 14:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 9.6M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-6b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749150000449

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-6b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1528078549536

Flatten gal took : 3908 ms
Constant places removed 1 places and 1 transitions.
Performed 15442 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 15443 rules applied. Total rules applied 15443 place count 25103 transition count 23669
Constant places removed 15443 places and 1 transitions.
Reduce isomorphic transitions removed 276 transitions.
Performed 268 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 15987 rules applied. Total rules applied 31430 place count 9660 transition count 23124
Constant places removed 268 places and 0 transitions.
Reduce isomorphic transitions removed 84 transitions.
Performed 84 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 436 rules applied. Total rules applied 31866 place count 9392 transition count 22956
Constant places removed 84 places and 0 transitions.
Iterating post reduction 3 with 84 rules applied. Total rules applied 31950 place count 9308 transition count 22956
Performed 84 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 84 Pre rules applied. Total rules applied 31950 place count 9308 transition count 22872
Constant places removed 84 places and 0 transitions.
Iterating post reduction 4 with 84 rules applied. Total rules applied 32034 place count 9224 transition count 22872
Symmetric choice reduction at 5 with 1792 rule applications. Total rules 33826 place count 9224 transition count 22872
Constant places removed 1792 places and 1792 transitions.
Iterating post reduction 5 with 1792 rules applied. Total rules applied 35618 place count 7432 transition count 21080
Performed 24 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 24 Pre rules applied. Total rules applied 35618 place count 7432 transition count 21056
Constant places removed 24 places and 0 transitions.
Iterating post reduction 6 with 24 rules applied. Total rules applied 35642 place count 7408 transition count 21056
Symmetric choice reduction at 7 with 92 rule applications. Total rules 35734 place count 7408 transition count 21056
Constant places removed 92 places and 1400 transitions.
Reduce isomorphic transitions removed 84 transitions.
Iterating post reduction 7 with 176 rules applied. Total rules applied 35910 place count 7316 transition count 19572
Performed 2040 Post agglomeration using F-continuation condition.
Constant places removed 2040 places and 0 transitions.
Iterating post reduction 8 with 2040 rules applied. Total rules applied 37950 place count 5276 transition count 17524
Symmetric choice reduction at 9 with 32 rule applications. Total rules 37982 place count 5276 transition count 17524
Constant places removed 32 places and 2912 transitions.
Iterating post reduction 9 with 32 rules applied. Total rules applied 38014 place count 5244 transition count 14612
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 10 with 126 rules applied. Total rules applied 38140 place count 5143 transition count 15419
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 11 with 127 rules applied. Total rules applied 38267 place count 5042 transition count 16225
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 12 with 126 rules applied. Total rules applied 38393 place count 4941 transition count 17038
Performed 49 Post agglomeration using F-continuation condition.
Constant places removed 49 places and 0 transitions.
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 13 with 66 rules applied. Total rules applied 38459 place count 4892 transition count 18020
Applied a total of 38459 rules in 142858 ms. Remains 4892 /25104 variables (removed 20212) and now considering 18020/39112 (removed 21092) transitions.
Normalized transition count is 16553
// Phase 1: matrix 16553 rows 4892 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 04, 2018 2:15:51 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 04, 2018 2:15:51 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 04, 2018 2:15:53 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1275 ms
Jun 04, 2018 2:15:53 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 25104 places.
Jun 04, 2018 2:15:54 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 39112 transitions.
Jun 04, 2018 2:15:54 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 04, 2018 2:15:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3896 ms
Jun 04, 2018 2:16:00 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 227 ms
Jun 04, 2018 2:16:02 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 39112 transitions.
Jun 04, 2018 2:18:57 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 04, 2018 2:18:58 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 18020 transitions.
Jun 04, 2018 2:18:58 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (18020) to apply POR reductions. Disabling POR matrices.
Jun 04, 2018 2:18:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1732 ms
Jun 04, 2018 2:18:59 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2159ms conformant to PINS in folder :/home/mcc/execution
Jun 04, 2018 2:19:01 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1655 ms
Jun 04, 2018 2:19:01 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 04, 2018 2:19:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1476 ms
Jun 04, 2018 2:21:01 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-6b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-6b.tgz
mv DLCflexbar-PT-6b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-6b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749150000449"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;