Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 6.6M
-rw-r--r-- 1 mcc users 3.6K May 29 20:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 29 20:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 28 16:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 28 16:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K May 28 07:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.9K May 27 07:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 27 07:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 26 09:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 6.5M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-5b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749150000431
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-5b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1528056660553

Flatten gal took : 3003 ms
Constant places removed 1 places and 1 transitions.
Performed 10736 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 10737 rules applied. Total rules applied 10737 place count 17304 transition count 15746
Constant places removed 10737 places and 1 transitions.
Reduce isomorphic transitions removed 207 transitions.
Performed 200 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 11144 rules applied. Total rules applied 21881 place count 6567 transition count 15338
Constant places removed 200 places and 0 transitions.
Reduce isomorphic transitions removed 62 transitions.
Performed 62 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 324 rules applied. Total rules applied 22205 place count 6367 transition count 15214
Constant places removed 62 places and 0 transitions.
Iterating post reduction 3 with 62 rules applied. Total rules applied 22267 place count 6305 transition count 15214
Performed 62 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 62 Pre rules applied. Total rules applied 22267 place count 6305 transition count 15152
Constant places removed 62 places and 0 transitions.
Iterating post reduction 4 with 62 rules applied. Total rules applied 22329 place count 6243 transition count 15152
Symmetric choice reduction at 5 with 1207 rule applications. Total rules 23536 place count 6243 transition count 15152
Constant places removed 1207 places and 1207 transitions.
Iterating post reduction 5 with 1207 rules applied. Total rules applied 24743 place count 5036 transition count 13945
Performed 21 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 21 Pre rules applied. Total rules applied 24743 place count 5036 transition count 13924
Constant places removed 21 places and 0 transitions.
Iterating post reduction 6 with 21 rules applied. Total rules applied 24764 place count 5015 transition count 13924
Symmetric choice reduction at 7 with 69 rule applications. Total rules 24833 place count 5015 transition count 13924
Constant places removed 69 places and 910 transitions.
Reduce isomorphic transitions removed 62 transitions.
Iterating post reduction 7 with 131 rules applied. Total rules applied 24964 place count 4946 transition count 12952
Performed 1401 Post agglomeration using F-continuation condition.
Constant places removed 1401 places and 0 transitions.
Iterating post reduction 8 with 1401 rules applied. Total rules applied 26365 place count 3545 transition count 11544
Symmetric choice reduction at 9 with 28 rule applications. Total rules 26393 place count 3545 transition count 11544
Constant places removed 28 places and 1904 transitions.
Iterating post reduction 9 with 28 rules applied. Total rules applied 26421 place count 3517 transition count 9640
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 10 with 126 rules applied. Total rules applied 26547 place count 3416 transition count 10321
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 11 with 127 rules applied. Total rules applied 26674 place count 3315 transition count 11001
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 12 with 79 rules applied. Total rules applied 26753 place count 3255 transition count 11783
Applied a total of 26753 rules in 59028 ms. Remains 3255 /17305 variables (removed 14050) and now considering 11783/26483 (removed 14700) transitions.
Normalized transition count is 10819
// Phase 1: matrix 10819 rows 3255 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 308511 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 182 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 8:11:02 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 8:11:02 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 8:11:03 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 713 ms
Jun 03, 2018 8:11:04 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 17305 places.
Jun 03, 2018 8:11:04 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 26483 transitions.
Jun 03, 2018 8:11:04 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 8:11:08 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2993 ms
Jun 03, 2018 8:11:08 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 202 ms
Jun 03, 2018 8:11:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 26483 transitions.
Jun 03, 2018 8:12:19 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 8:12:20 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 11783 transitions.
Jun 03, 2018 8:12:20 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (11783) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 8:12:20 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1192 ms
Jun 03, 2018 8:12:21 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1562ms conformant to PINS in folder :/home/mcc/execution
Jun 03, 2018 8:12:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1194 ms
Jun 03, 2018 8:12:22 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 8:12:24 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1125 ms
Jun 03, 2018 8:12:52 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-5b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-5b.tgz
mv DLCflexbar-PT-5b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-5b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749150000431"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;