Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 2.9M
-rw-r--r-- 1 mcc users 2.9K May 29 20:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 29 20:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 28 16:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 28 16:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 28 09:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.3K May 28 09:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K May 28 07:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.1K May 27 07:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 27 07:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 09:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 2.8M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-5a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749150000420
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-00
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-01
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-02
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-03
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-04
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-05
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-06
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-07
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-08
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-09
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-10
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-11
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-12
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-13
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-14
FORMULA_NAME DLCflexbar-PT-5a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528043987415

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !(("((u9.p63>=1)&&(u459.p894>=1))"))
Formula 0 simplified : !"((u9.p63>=1)&&(u459.p894>=1))"
built 1821 ordering constraints for composite.
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
12080 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,122.849,824540,1,0,253834,3986,41002,247978,408,3413,1282455
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F((("((u369.p804>=1)&&(u65.p461>=1))")U("((u599.p1034>=1)&&(u67.p481>=1))"))U(G(G("((u41.p284>=1)&&(u646.p1081>=1))"))))))
Formula 1 simplified : !F(("((u369.p804>=1)&&(u65.p461>=1))" U "((u599.p1034>=1)&&(u67.p481>=1))") U G"((u41.p284>=1)&&(u646.p1081>=1))")
Compilation finished in 160026 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 139 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((((LTLAP1==true))U((LTLAP2==true)))U([]([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((((LTLAP1==true))U((LTLAP2==true)))U([]([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(X((LTLAP4==true))))U(<>((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 885 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 898 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((X((LTLAP7==true)))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 924 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 902 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]([]([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]([]([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
93561 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1058.46,4922248,1,0,1.20561e+07,3986,22090,2.00714e+07,241,3736,11028316
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F((X(X("((u69.p503>=1)&&(u926.p1361>=1))")))U(F("((u69.p502>=1)&&(u927.p1362>=1))")))))
Formula 2 simplified : !F(XX"((u69.p503>=1)&&(u926.p1361>=1))" U F"((u69.p502>=1)&&(u927.p1362>=1))")
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X(X((LTLAP13==true)))))U(([]((LTLAP14==true)))U((LTLAP15==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 724 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 825 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
2632 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1084.78,5220304,1,0,1.20561e+07,3986,29640,2.00714e+07,355,4268,11297919
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X(F(X("(u36.p247>=1)")))))
Formula 3 simplified : !XFX"(u36.p247>=1)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
9252 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1177.31,5564296,1,0,1.21367e+07,3986,23882,2.01509e+07,269,4396,186611
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(X((X("((u69.p503>=1)&&(u844.p1279>=1))"))U("((u69.p495>=1)&&(u861.p1296>=1))")))))
Formula 4 simplified : !FX(X"((u69.p503>=1)&&(u844.p1279>=1))" U "((u69.p495>=1)&&(u861.p1296>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1811 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1195.42,5564296,1,0,1.21367e+07,3986,31046,2.01509e+07,356,4396,467626
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X(F("((u69.p503>=1)&&(u918.p1353>=1))"))))
Formula 5 simplified : !XF"((u69.p503>=1)&&(u918.p1353>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
192 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1197.33,5564296,1,0,1.21367e+07,3986,31362,2.01509e+07,356,4396,478674
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("((u785.p1220>=1)&&(u68.p491>=1))"))
Formula 6 simplified : !"((u785.p1220>=1)&&(u68.p491>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
137 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1198.71,5564296,1,0,1.21367e+07,3986,31560,2.01509e+07,356,4396,484400
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((G(G(G(G("((u61.p427>=1)&&(u190.p625>=1))"))))))
Formula 7 simplified : !G"((u61.p427>=1)&&(u190.p625>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
12 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1198.82,5564296,1,0,1.21367e+07,3986,31580,2.01509e+07,356,4396,485524
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((F("((u23.p158>=1)&&(u238.p673>=1))")))
Formula 8 simplified : !F"((u23.p158>=1)&&(u238.p673>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1054 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1209.37,5564296,1,0,1.21367e+07,3986,33222,2.01509e+07,356,4396,661729
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !(((X(X(X("((u66.p474>=1)&&(u483.p918>=1))"))))U((G("((u495.p930>=1)&&(u66.p471>=1))"))U("(u60.p420>=1)"))))
Formula 9 simplified : !(XXX"((u66.p474>=1)&&(u483.p918>=1))" U (G"((u495.p930>=1)&&(u66.p471>=1))" U "(u60.p420>=1)"))
7 unique states visited
6 strongly connected components in search stack
7 transitions explored
6 items max in DFS search stack
238 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1211.75,5565820,1,0,1.21367e+07,3986,33257,2.01509e+07,357,4396,1264836
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((X(G("((u68.p488>=1)&&(u971.p1406>=1))"))))
Formula 10 simplified : !XG"((u68.p488>=1)&&(u971.p1406>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
14 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1211.89,5565820,1,0,1.21367e+07,3986,33277,2.01509e+07,357,4396,1266361
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !(("((u67.p482>=1)&&(u673.p1108>=1))"))
Formula 11 simplified : !"((u67.p482>=1)&&(u673.p1108>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1211.89,5565820,1,0,1.21367e+07,3986,33283,2.01509e+07,357,4396,1266665
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((X(X(F("((u46.p322>=1)&&(u285.p720>=1))")))))
Formula 12 simplified : !XXF"((u46.p322>=1)&&(u285.p720>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1131 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1223.21,5565820,1,0,1.21367e+07,3986,34807,2.01509e+07,357,4396,1522947
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !((F(X(F(F(G("((u68.p492>=1)&&(u737.p1172>=1))")))))))
Formula 13 simplified : !FXFG"((u68.p492>=1)&&(u737.p1172>=1))"
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(<>([]((LTLAP19==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 587 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(<>((LTLAP21==true))))U([](X((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 611 ms.
FORMULA DLCflexbar-PT-5a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
39029 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1613.52,6742072,1,0,1.81024e+07,3986,21175,2.61632e+07,241,5026,2262843
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !((G(G("((u67.p478>=1)&&(u669.p1104>=1))"))))
Formula 14 simplified : !G"((u67.p478>=1)&&(u669.p1104>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1698 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1630.5,6742072,1,0,1.81024e+07,3986,29342,2.61632e+07,355,5026,2436590
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((G((X(F("((u68.p489>=1)&&(u715.p1150>=1))")))U(G(X("((u32.p221>=1)&&(u504.p939>=1))"))))))
Formula 15 simplified : !G(XF"((u68.p489>=1)&&(u715.p1150>=1))" U GX"((u32.p221>=1)&&(u504.p939>=1))")
5 unique states visited
5 strongly connected components in search stack
6 transitions explored
5 items max in DFS search stack
1309 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1643.59,6742072,1,0,1.81024e+07,3986,31845,2.61632e+07,355,5026,2652718
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA DLCflexbar-PT-5a-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1528045652138

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 4:39:49 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 4:39:49 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 4:39:50 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 573 ms
Jun 03, 2018 4:39:50 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1415 places.
Jun 03, 2018 4:39:50 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 10593 transitions.
Jun 03, 2018 4:39:50 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 4:39:50 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 4:39:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2036 ms
Jun 03, 2018 4:39:53 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 990 ms
Jun 03, 2018 4:39:54 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 4:39:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1046 ms
Jun 03, 2018 4:39:55 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 4:39:57 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 17954 redundant transitions.
Jun 03, 2018 4:39:57 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 107 ms
Jun 03, 2018 4:39:57 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 03, 2018 4:39:58 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 1179 identical transitions.
Jun 03, 2018 4:39:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 9414 transitions.
Jun 03, 2018 4:39:58 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (9414) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 4:39:59 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1512ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-5a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-5a.tgz
mv DLCflexbar-PT-5a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-5a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749150000420"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;