Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 3.5K May 29 17:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 29 17:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 28 11:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 28 11:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 09:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 28 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.5K May 27 05:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 27 05:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 26 06:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 26 06:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 1.5M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-2b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149900377
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-2b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1528008070575

Flatten gal took : 920 ms
Constant places removed 1 places and 1 transitions.
Performed 2858 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2859 rules applied. Total rules applied 2859 place count 4455 transition count 3413
Constant places removed 2859 places and 1 transitions.
Reduce isomorphic transitions removed 72 transitions.
Performed 68 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2999 rules applied. Total rules applied 5858 place count 1596 transition count 3272
Constant places removed 68 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Performed 20 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 108 rules applied. Total rules applied 5966 place count 1528 transition count 3232
Constant places removed 20 places and 0 transitions.
Iterating post reduction 3 with 20 rules applied. Total rules applied 5986 place count 1508 transition count 3232
Performed 20 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 20 Pre rules applied. Total rules applied 5986 place count 1508 transition count 3212
Constant places removed 20 places and 0 transitions.
Iterating post reduction 4 with 20 rules applied. Total rules applied 6006 place count 1488 transition count 3212
Symmetric choice reduction at 5 with 280 rule applications. Total rules 6286 place count 1488 transition count 3212
Constant places removed 280 places and 280 transitions.
Iterating post reduction 5 with 280 rules applied. Total rules applied 6566 place count 1208 transition count 2932
Performed 12 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 12 Pre rules applied. Total rules applied 6566 place count 1208 transition count 2920
Constant places removed 12 places and 0 transitions.
Iterating post reduction 6 with 12 rules applied. Total rules applied 6578 place count 1196 transition count 2920
Symmetric choice reduction at 7 with 24 rule applications. Total rules 6602 place count 1196 transition count 2920
Constant places removed 24 places and 172 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 7 with 44 rules applied. Total rules applied 6646 place count 1172 transition count 2728
Performed 360 Post agglomeration using F-continuation condition.
Constant places removed 360 places and 0 transitions.
Iterating post reduction 8 with 360 rules applied. Total rules applied 7006 place count 812 transition count 2364
Symmetric choice reduction at 9 with 16 rule applications. Total rules 7022 place count 812 transition count 2364
Constant places removed 16 places and 368 transitions.
Iterating post reduction 9 with 16 rules applied. Total rules applied 7038 place count 796 transition count 1996
Performed 88 Post agglomeration using F-continuation condition.
Constant places removed 88 places and 0 transitions.
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 10 with 112 rules applied. Total rules applied 7150 place count 708 transition count 2324
Applied a total of 7150 rules in 3705 ms. Remains 708 /4456 variables (removed 3748) and now considering 2324/6272 (removed 3948) transitions.
Normalized transition count is 2125
// Phase 1: matrix 2125 rows 708 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 28761 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 69 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 1 ordering constraints for composite.
built 1788 ordering constraints for composite.
built 1581 ordering constraints for composite.
built 1374 ordering constraints for composite.
built 1167 ordering constraints for composite.
built 960 ordering constraints for composite.
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built 1788 ordering constraints for composite.
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terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 6:41:12 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 6:41:12 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 6:41:12 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 340 ms
Jun 03, 2018 6:41:12 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4456 places.
Jun 03, 2018 6:41:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 6272 transitions.
Jun 03, 2018 6:41:13 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 6:41:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 914 ms
Jun 03, 2018 6:41:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 96 ms
Jun 03, 2018 6:41:15 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 6272 transitions.
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2324 transitions.
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2324) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 270 ms
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 343ms conformant to PINS in folder :/home/mcc/execution
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 242 ms
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 6:41:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 213 ms
Jun 03, 2018 6:41:21 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 6:43:15 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 2956 redundant transitions.
Jun 03, 2018 6:43:16 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 554 ms
ITS-tools command line returned an error code 134

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-2b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-2b.tgz
mv DLCflexbar-PT-2b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-2b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149900377"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;