fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r273-smll-152749149900367
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DLCflexbar-PT-2a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.480 7539.00 21107.00 208.00 FFFFTTTTFTTFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 704K
-rw-r--r-- 1 mcc users 3.3K May 29 17:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 29 17:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 28 11:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 28 11:34 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 28 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 2.7K May 27 05:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 12K May 27 05:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 26 06:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 06:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 545K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-2a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149900367

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-00
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-01
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-02
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-03
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-04
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-05
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-06
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-07
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-08
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-09
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-10
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-11
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-12
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-13
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-14
FORMULA_NAME DLCflexbar-PT-2a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1528001056600

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-00 with value :(u10.p67>=2)
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-01 with value :((u142.p298>=2)&&(u112.p268>=2))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-02 with value :(u168.p324>=3)
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-03 with value :(!((((u37.p193==0)||(u148.p304==1))||(u1.p3>=2))||((u1.p2>=3)||(u11.p71>=1))))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-04 with value :((u83.p239==0)||(u173.p329==1))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-05 with value :(!((u24.p177==0)||(u8.p55==1)))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-06 with value :(!((((u150.p306==0)||(u172.p328==1))&&(u18.p120>=2))&&(!((u177.p333==0)||(u80.p236==1)))))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-07 with value :((u3.p19==0)||(u27.p183==1))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-08 with value :(!(((u24.p175==0)||(u155.p311==1))||(((u149.p305==0)||(u4.p23==1))&&(u5.p33>=1))))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-09 with value :(!(u56.p212>=3))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-10 with value :((!((u13.p89>=3)&&((u17.p114==0)||(u9.p62==1))))||(((u24.p174==0)||(u95.p251==1))&&((u133.p289>=2)||((u6.p39==0)||(u148.p304==1)))))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-11 with value :(!((u22.p159==0)||(u71.p227==1)))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-12 with value :((u169.p325==0)||(u79.p235==1))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-13 with value :(!((u24.p178==0)||(u161.p317==1)))
Read [invariant] property : DLCflexbar-PT-2a-ReachabilityCardinality-14 with value :(!(u22.p152>=3))
Read [reachable] property : DLCflexbar-PT-2a-ReachabilityCardinality-15 with value :(!((u152.p308==0)||(u135.p291==1)))
built 345 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar\_PT\_2a\_flat\_flat\_flat\_flat\_mod,7.97923e+20,1.37309,17244,400,21,7234,944,2280,6654,68,1102,0
Total reachable state count : 797922662976120009984

Verifying 16 reachability properties.
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-00 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-00,0,1.37453,17276,1,0,7234,944,2282,6654,70,1102,0
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-01 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-01,0,1.37492,17372,1,0,7234,944,2287,6654,71,1102,0
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-02 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-02,0,1.3752,17372,1,0,7234,944,2289,6654,72,1102,0
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-03 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-03,0,1.37746,17372,1,0,7234,944,2306,6654,79,1102,284
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-04 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-04,0,1.378,17372,1,0,7234,944,2310,6654,79,1102,490
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-05 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-05,6.83934e+19,1.37932,17372,204,22,7234,944,2316,6654,83,1102,754
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-06 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-06,0,1.38013,17372,1,0,7234,944,2329,6654,83,1102,976
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-07 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-07,0,1.38145,17372,1,0,7234,944,2334,6654,85,1102,1022
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-08 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-08,0,1.38311,17372,1,0,7234,944,2348,6654,90,1102,1566
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-09 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-09,0,1.38343,17372,1,0,7234,944,2351,6654,91,1102,1566
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-10 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-10,0,1.38604,17372,1,0,7234,944,2373,6654,96,1102,2329
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-11 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-11,0,1.38706,17372,1,0,7234,944,2377,6654,96,1102,2341
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-12 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-12,0,1.3877,17372,1,0,7234,944,2381,6654,96,1102,2547
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-13 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-13,0,1.38814,17372,1,0,7234,944,2386,6654,98,1102,2577
Invariant property DLCflexbar-PT-2a-ReachabilityCardinality-14 is true.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-14,0,1.38952,17372,1,0,7234,944,2390,6654,100,1102,2577
Reachability property DLCflexbar-PT-2a-ReachabilityCardinality-15 does not hold.
FORMULA DLCflexbar-PT-2a-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCflexbar-PT-2a-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCflexbar-PT-2a-ReachabilityCardinality-15,0,1.38997,17372,1,0,7234,944,2394,6654,100,1102,2619
ITS tools runner thread asked to quit. Dying gracefully.
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1528001064139

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 4:44:18 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 4:44:18 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 4:44:18 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 230 ms
Jun 03, 2018 4:44:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 353 places.
Jun 03, 2018 4:44:19 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2169 transitions.
Jun 03, 2018 4:44:19 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 4:44:19 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 56 ms
Jun 03, 2018 4:44:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 635 ms
Jun 03, 2018 4:44:19 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 320 ms
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 356 ms
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2169 transitions.
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 287 ms
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2169) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2169 transitions.
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 329 ms
Jun 03, 2018 4:44:20 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 4:44:21 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 874ms conformant to PINS in folder :/home/mcc/execution
Jun 03, 2018 4:44:21 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 3332 redundant transitions.
Jun 03, 2018 4:44:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 41 ms
Jun 03, 2018 4:44:21 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1755 ms.
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-00(UNSAT) depth K=0 took 10 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-01(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-02(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-03(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-04(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-05(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-06(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-07(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-08(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-09(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-10(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-11(UNSAT) depth K=0 took 0 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-12(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-13(UNSAT) depth K=0 took 1 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-14(UNSAT) depth K=0 took 20 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-15(UNSAT) depth K=0 took 15 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-00(UNSAT) depth K=1 took 13 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-01(UNSAT) depth K=1 took 12 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-03(UNSAT) depth K=1 took 13 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-05(UNSAT) depth K=1 took 13 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-06(UNSAT) depth K=1 took 4 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-08(UNSAT) depth K=1 took 23 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-09(UNSAT) depth K=1 took 25 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-11(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-12(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2169 transitions.
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-14(UNSAT) depth K=1 took 16 ms
Jun 03, 2018 4:44:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-15(UNSAT) depth K=1 took 12 ms
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCflexbar-PT-2a-ReachabilityCardinality-00(UNSAT) depth K=2 took 800 ms
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 03, 2018 4:44:23 AM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun _enabled__2071 ((step Int)) Bool (_enabledsrc__2071 (select s step))) with error
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying DLCflexbar-PT-2a-ReachabilityCardinality-01 SMT depth 2
Jun 03, 2018 4:44:23 AM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun trsrc2071 ((src (Array Int Int))(dst (Array Int Int))) Bool (and (_enabledsrc__2071 src) (= (store (store src 180 (- (select src 180) 1)) 179 (+ (select src 179) 1)) dst))) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
Jun 03, 2018 4:44:23 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-2a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-2a.tgz
mv DLCflexbar-PT-2a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-2a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149900367"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;