Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 328K
-rw-r--r-- 1 mcc users 3.3K May 29 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 29 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 28 11:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 28 11:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 28 07:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 28 07:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.3K May 27 05:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 27 05:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 26 06:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 26 06:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 161K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BusinessProcesses-PT-17, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149900332
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-17-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527981465601

Flatten gal took : 224 ms
Constant places removed 6 places and 3 transitions.
Performed 411 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 417 rules applied. Total rules applied 417 place count 644 transition count 166
Constant places removed 439 places and 3 transitions.
Iterating post reduction 1 with 439 rules applied. Total rules applied 856 place count 205 transition count 163
Constant places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 857 place count 204 transition count 163
Performed 19 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 19 Pre rules applied. Total rules applied 857 place count 204 transition count 144
Constant places removed 19 places and 0 transitions.
Iterating post reduction 3 with 19 rules applied. Total rules applied 876 place count 185 transition count 144
Symmetric choice reduction at 4 with 4 rule applications. Total rules 880 place count 185 transition count 144
Constant places removed 4 places and 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 884 place count 181 transition count 140
Performed 5 Post agglomeration using F-continuation condition.
Constant places removed 5 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 6 rules applied. Total rules applied 890 place count 176 transition count 134
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 892 place count 174 transition count 136
Applied a total of 892 rules in 226 ms. Remains 174 /650 variables (removed 476) and now considering 136/580 (removed 444) transitions.
// Phase 1: matrix 136 rows 174 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 136 rows 174 cols
invariant :p335 + p336 = 1
invariant :p400 + p401 = 1
invariant :p86 + p519 = 1
invariant :p103 + p113 + -1'p124 + p125 + p127 + p128 + p467 + p473 + p474 + p483 + p490 + p494 + p500 + p505 + p515 + p519 + p534 + p537 + p542 + p546 + p552 + p556 + p566 + p570 + p574 + p581 + p585 + p589 + p593 + p597 + p603 + p607 + p611 + p615 + p624 + p630 + p637 + p639 + p647 + p648 = 1
invariant :-1'p134 + -1'p136 + p137 + p139 = 0
invariant :p174 + -1'p177 + -1'p396 + p401 + p411 + -1'p416 + -1'p570 + p574 + p645 + -1'p648 = 0
invariant :p325 + p326 = 1
invariant :p375 + p376 = 1
invariant :p211 + p581 = 1
invariant :p641 + p642 + -1'p647 + -1'p648 = 0
invariant :p350 + p351 = 1
invariant :p634 + p636 + -1'p637 + -1'p639 = 0
invariant :-1'p109 + -1'p119 + -1'p128 + -1'p130 + p133 + -1'p134 + -1'p136 + p139 + p537 + p619 + p631 + p637 = 0
invariant :p628 + p630 + -1'p631 + -1'p633 = 0
invariant :p146 + p546 = 1
invariant :p622 + p624 + -1'p625 + -1'p627 = 0
invariant :p616 + p618 + -1'p619 + -1'p621 = 0
invariant :p229 + p593 = 1
invariant :p440 + p441 = 1
invariant :p445 + p446 = 1
invariant :p106 + -1'p118 + p119 + p121 + p125 + p134 + -1'p534 + p618 + -1'p619 + -1'p621 + -1'p625 + p636 + -1'p637 + -1'p639 = 0
invariant :p310 + p311 = 1
invariant :p405 + p406 = 1
invariant :p355 + p356 = 1
invariant :p613 + p615 + -1'p619 + -1'p621 = 0
invariant :p380 + p381 = 1
invariant :p223 + p589 = 1
invariant :p235 + p597 = 1
invariant :p171 + -1'p177 + -1'p391 + p401 + -1'p406 + p411 + p566 + -1'p570 + -1'p642 + p645 = 0
invariant :p206 + -1'p209 + -1'p645 + p648 = 0
invariant :p185 + p570 = 1
invariant :p217 + p585 = 1
invariant :p176 + p177 = 1
invariant :p152 + p552 = 1
invariant :p140 + p542 = 1
invariant :p170 + p177 + p391 + -1'p401 + p406 + -1'p411 + -1'p566 + p570 + p642 + -1'p645 = 1
invariant :p173 + p177 + p396 + -1'p401 + -1'p411 + p416 + p570 + -1'p574 + -1'p645 + p648 = 1
invariant :p360 + p361 = 1
invariant :p179 + p566 = 1
invariant :p415 + p416 = 1
invariant :p410 + p411 = 1
invariant :p385 + p386 = 1
invariant :p450 + p451 = 1
invariant :p300 + p301 = 1
invariant :p455 + p456 = 1
invariant :p197 + p209 + p647 = 1
invariant :p365 + p366 = 1
invariant :p460 + p461 = 1
invariant :p56 + p505 = 1
invariant :p80 + p515 = 1
invariant :p248 + p607 = 1
invariant :p305 + p306 = 1
invariant :p467 + p473 + p474 + p483 + p490 + p494 + p500 + p505 + p515 + p519 + p531 + p534 + p537 + p542 + p546 + p552 + p556 + p566 + p570 + p574 + p581 + p585 + p589 + p593 + p597 + p603 + p607 + p611 + p619 + p621 + p625 + p627 + p631 + p633 + p637 + p639 + p647 + p648 = 1
invariant :p340 + p341 = 1
invariant :p65 + p75 + p78 = 1
invariant :p425 + p426 = 1
invariant :p420 + p421 = 1
invariant :p43 + p494 = 1
invariant :p122 + p124 + -1'p125 + -1'p127 = 0
invariant :p116 + p118 + -1'p119 + -1'p121 = 0
invariant :p36 + p490 = 1
invariant :p109 + p119 + p131 + p134 + p136 + -1'p139 + -1'p537 + -1'p619 + -1'p631 + -1'p637 = 0
invariant :p241 + p603 = 1
invariant :p29 + p483 = 1
invariant :p345 + p346 = 1
invariant :p49 + p500 = 1
invariant :p395 + p396 = 1
invariant :p92 + p103 + p109 + p118 + p127 + p128 + p130 + p136 + p534 + -1'p618 + p619 + p621 + p625 + -1'p636 + p637 + p639 = 1
invariant :p644 + p645 + -1'p647 + -1'p648 = 0
invariant :p315 + p316 = 1
invariant :p390 + p391 = 1
invariant :-1'p103 + p115 + -1'p119 + -1'p121 + p124 + -1'p125 + -1'p127 + -1'p128 + -1'p467 + -1'p473 + -1'p474 + -1'p483 + -1'p490 + -1'p494 + -1'p500 + -1'p505 + -1'p515 + -1'p519 + -1'p534 + -1'p537 + -1'p542 + -1'p546 + -1'p552 + -1'p556 + -1'p566 + -1'p570 + -1'p574 + -1'p581 + -1'p585 + -1'p589 + -1'p593 + -1'p597 + -1'p603 + -1'p607 + -1'p611 + -1'p615 + -1'p624 + -1'p630 + -1'p637 + -1'p639 + -1'p647 + -1'p648 = -1
invariant :p435 + p436 = 1
invariant :p430 + p431 = 1
invariant :p203 + -1'p209 + -1'p642 + p648 = 0
invariant :p159 + p556 = 1
invariant :p191 + p574 = 1
invariant :p370 + p371 = 1
invariant :p320 + p321 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 3 ordering constraints for composite.
built 126 ordering constraints for composite.
built 125 ordering constraints for composite.
built 124 ordering constraints for composite.
built 119 ordering constraints for composite.
built 117 ordering constraints for composite.
built 115 ordering constraints for composite.
built 113 ordering constraints for composite.
built 111 ordering constraints for composite.
built 109 ordering constraints for composite.
built 107 ordering constraints for composite.
built 105 ordering constraints for composite.
built 103 ordering constraints for composite.
built 101 ordering constraints for composite.
built 99 ordering constraints for composite.
built 97 ordering constraints for composite.
built 95 ordering constraints for composite.
built 93 ordering constraints for composite.
built 91 ordering constraints for composite.
built 89 ordering constraints for composite.
built 87 ordering constraints for composite.
built 85 ordering constraints for composite.
built 83 ordering constraints for composite.
built 81 ordering constraints for composite.
built 73 ordering constraints for composite.
built 71 ordering constraints for composite.
built 54 ordering constraints for composite.
built 37 ordering constraints for composite.
built 34 ordering constraints for composite.
built 31 ordering constraints for composite.
built 29 ordering constraints for composite.
built 28 ordering constraints for composite.
built 10 ordering constraints for composite.
built 8 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
built 126 ordering constraints for composite.
built 10 ordering constraints for composite.
built 4 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,12248,1.27084,47948,6061,403,47027,1443,1011,389812,177,3805,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1312,2.10712,70504,1849,113,74049,3893,2559,652534,624,6741,51241

System contains 1312 deadlocks (shown below if less than --print-limit option) !
FORMULA BusinessProcesses-PT-17-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 1312 states ] showing 10 first states
[ i1={[ u222={[ p473=1 ]
} u150={[ ]
} u149={[ ]
} u154={[ ]
} u148={[ ]
} u147={[ ]
} i8={[ u153={[ ]
} u152={[ ]
} ]
} u146={[ ]
} u145={[ ]
} u144={[ ]
} i0={[ u143={[ ]
} u142={[ ]
} ]
} ]
} i0={[ i1={[ u139={[ p461=1 ]
} i0={[ u138={[ p456=1 ]
} i0={[ u137={[ p451=1 ]
} i0={[ u136={[ p446=1 ]
} i0={[ u135={[ p441=1 ]
} i0={[ u134={[ p436=1 ]
} i0={[ u133={[ p431=1 ]
} i0={[ u132={[ p426=1 ]
} i0={[ u131={[ p421=1 ]
} i0={[ u130={[ p416=1 ]
} i0={[ u129={[ p411=1 ]
} i0={[ u128={[ p406=1 ]
} i0={[ u127={[ p401=1 ]
} i0={[ u126={[ p396=1 ]
} i0={[ u125={[ p391=1 ]
} i0={[ u124={[ p386=1 ]
} i0={[ u123={[ p381=1 ]
} i0={[ u122={[ p376=1 ]
} i0={[ u121={[ p371=1 ]
} i0={[ u120={[ p366=1 ]
} i0={[ u119={[ p361=1 ]
} i0={[ u118={[ p356=1 ]
} i0={[ u117={[ p351=1 ]
} i0={[ u116={[ p346=1 ]
} i0={[ u115={[ p341=1 ]
} i0={[ u114={[ p336=1 ]
} i0={[ u113={[ ]
[ p331=1 ]
} i0={[ u112={[ p326=1 ]
} i0={[ u111={[ p321=1 ]
} i0={[ u110={[ p316=1 ]
} i0={[ u109={[ p311=1 ]
} i0={[ u108={[ p306=1 ]
} u107={[ p301=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u74={[ ]
} i0={[ u71={[ p248=1 ]
} u70={[ p241=1 ]
} u69={[ p235=1 ]
} u68={[ p229=1 ]
} u67={[ p223=1 ]
} u66={[ p217=1 ]
} u65={[ p211=1 ]
} u223={[ p197=1 ]
} u64={[ ]
} u63={[ ]
} u62={[ ]
} u59={[ p191=1 ]
} u58={[ p185=1 ]
} u57={[ p179=1 ]
} u56={[ p177=1 ]
} u55={[ p174=1 ]
} u54={[ p171=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u216={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
[ u71={[ p248=1 ]
} u70={[ p241=1 ]
} u69={[ p235=1 ]
} u68={[ p229=1 ]
} u67={[ p223=1 ]
} u66={[ p217=1 ]
} u65={[ p211=1 ]
} u223={[ p197=1 ]
} u64={[ ]
} u63={[ ]
} u62={[ ]
} u59={[ p191=1 ]
} u58={[ p185=1 ]
} u57={[ p179=1 ]
} u56={[ p176=1 ]
} u55={[ p173=1 ]
} u54={[ p170=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u216={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
[ u74={[ p265=1 ]
} i0={[ u71={[ p248=1 ]
} u70={[ p241=1 ]
} u69={[ p235=1 ]
} u68={[ p229=1 ]
} u67={[ p223=1 ]
} u66={[ p217=1 ]
} u65={[ p211=1 ]
} u223={[ p197=1 ]
} u64={[ ]
} u63={[ ]
} u62={[ ]
} u59={[ p191=1 ]
} u58={[ p185=1 ]
} u57={[ p179=1 ]
} u56={[ p176=1 ]
} u55={[ p173=1 ]
} u54={[ p170=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u216={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
} ]
[ i1={[ u139={[ p461=1 ]
} i0={[ u138={[ p456=1 ]
} i0={[ u137={[ p451=1 ]
} i0={[ u136={[ p446=1 ]
} i0={[ u135={[ p441=1 ]
} i0={[ u134={[ p436=1 ]
} i0={[ u133={[ p431=1 ]
} i0={[ u132={[ p426=1 ]
} i0={[ u131={[ p421=1 ]
} i0={[ u130={[ p416=1 ]
} i0={[ u129={[ p411=1 ]
} i0={[ u128={[ p406=1 ]
} i0={[ u127={[ p400=1 ]
} i0={[ u126={[ p395=1 ]
} i0={[ u125={[ p391=1 ]
} i0={[ u124={[ p386=1 ]
} i0={[ u123={[ p381=1 ]
} i0={[ u122={[ p376=1 ]
} i0={[ u121={[ p371=1 ]
} i0={[ u120={[ p366=1 ]
} i0={[ u119={[ p361=1 ]
} i0={[ u118={[ p356=1 ]
} i0={[ u117={[ p351=1 ]
} i0={[ u116={[ p346=1 ]
} i0={[ u115={[ p341=1 ]
} i0={[ u114={[ p336=1 ]
} i0={[ u113={[ ]
[ p331=1 ]
} i0={[ u112={[ p326=1 ]
} i0={[ u111={[ p321=1 ]
} i0={[ u110={[ p316=1 ]
} i0={[ u109={[ p311=1 ]
} i0={[ u108={[ p306=1 ]
} u107={[ p301=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
[ u129={[ p410=1 ]
} i0={[ u128={[ p406=1 ]
} i0={[ u127={[ p401=1 ]
} i0={[ u126={[ p395=1 ]
} i0={[ u125={[ p391=1 ]
} i0={[ u124={[ p386=1 ]
} i0={[ u123={[ p381=1 ]
} i0={[ u122={[ p376=1 ]
} i0={[ u121={[ p371=1 ]
} i0={[ u120={[ p366=1 ]
} i0={[ u119={[ p361=1 ]
} i0={[ u118={[ p356=1 ]
} i0={[ u117={[ p351=1 ]
} i0={[ u116={[ p346=1 ]
} i0={[ u115={[ p341=1 ]
} i0={[ u114={[ p336=1 ]
} i0={[ u113={[ ]
[ p331=1 ]
} i0={[ u112={[ p326=1 ]
} i0={[ u111={[ p321=1 ]
} i0={[ u110={[ p316=1 ]
} i0={[ u109={[ p311=1 ]
} i0={[ u108={[ p306=1 ]
} u107={[ p301=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u74={[ ]
} i0={[ u71={[ p248=1 ]
} u70={[ p241=1 ]
} u69={[ p235=1 ]
} u68={[ p229=1 ]
} u67={[ p223=1 ]
} u66={[ p217=1 ]
} u65={[ p211=1 ]
} u223={[ p197=1 ]
} u64={[ ]
} u63={[ ]
} u62={[ ]
} u59={[ p191=1 ]
} u58={[ p185=1 ]
} u57={[ p179=1 ]
} u56={[ p176=1 ]
} u55={[ p173=1 ]
} u54={[ p171=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u216={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527981473853

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 125 ms
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 650 places.
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 580 transitions.
Jun 02, 2018 11:17:48 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 11:17:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 30 ms
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 217 ms
Jun 02, 2018 11:17:49 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 12 ms
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 580 transitions.
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 136 transitions.
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 45 ms
Jun 02, 2018 11:17:49 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 11:17:50 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 53 ms
Jun 02, 2018 11:17:50 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 11:17:50 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 79 place invariants in 72 ms
Jun 02, 2018 11:17:50 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 167 redundant transitions.
Jun 02, 2018 11:17:50 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 21 ms
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 1416 ms
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 136 transitions.
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/136 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 136 transitions.
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:17:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 136 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 11:17:53 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3150ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-17"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-17.tgz
mv BusinessProcesses-PT-17 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BusinessProcesses-PT-17, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149900332"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;