fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r273-smll-152749149800314
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for BusinessProcesses-PT-15

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15751.310 7658.00 20456.00 222.90 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 320K
-rw-r--r-- 1 mcc users 3.1K May 29 16:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 29 16:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 28 11:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 28 11:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.7K May 28 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.9K May 27 05:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 27 05:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 26 06:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 26 06:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 157K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BusinessProcesses-PT-15, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749149800314

=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-15-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527968629503

Flatten gal took : 192 ms
Constant places removed 6 places and 3 transitions.
Performed 399 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 405 rules applied. Total rules applied 405 place count 624 transition count 164
Constant places removed 426 places and 3 transitions.
Iterating post reduction 1 with 426 rules applied. Total rules applied 831 place count 198 transition count 161
Constant places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 832 place count 197 transition count 161
Performed 19 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 19 Pre rules applied. Total rules applied 832 place count 197 transition count 142
Constant places removed 19 places and 0 transitions.
Iterating post reduction 3 with 19 rules applied. Total rules applied 851 place count 178 transition count 142
Symmetric choice reduction at 4 with 4 rule applications. Total rules 855 place count 178 transition count 142
Constant places removed 4 places and 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 859 place count 174 transition count 138
Performed 5 Post agglomeration using F-continuation condition.
Constant places removed 5 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 6 rules applied. Total rules applied 865 place count 169 transition count 132
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 867 place count 167 transition count 134
Applied a total of 867 rules in 174 ms. Remains 167 /630 variables (removed 463) and now considering 134/566 (removed 432) transitions.
// Phase 1: matrix 134 rows 167 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 134 rows 167 cols
invariant :p361 + p362 = 1
invariant :p436 + p437 = 1
invariant :p65 + p75 + p78 = 1
invariant :p431 + p432 = 1
invariant :p36 + p476 = 1
invariant :p209 + p569 = 1
invariant :p301 + p302 = 1
invariant :p169 + p173 + p392 + -1'p397 + p402 + -1'p407 + -1'p550 + p554 + p625 + -1'p628 = 1
invariant :p391 + p392 = 1
invariant :p366 + p367 = 1
invariant :p396 + p397 = 1
invariant :p43 + p480 = 1
invariant :p341 + p342 = 1
invariant :p446 + p447 = 1
invariant :p170 + -1'p173 + -1'p392 + p397 + -1'p402 + p407 + p550 + -1'p554 + -1'p625 + p628 = 0
invariant :-1'p134 + -1'p136 + p137 + p139 = 0
invariant :p441 + p442 = 1
invariant :p346 + p347 = 1
invariant :p152 + p538 = 1
invariant :p109 + p119 + p131 + p134 + p136 + -1'p139 + -1'p523 + -1'p603 + -1'p615 + -1'p621 = 0
invariant :p291 + p292 = 1
invariant :p106 + -1'p118 + p119 + p121 + p125 + p134 + -1'p520 + p602 + -1'p603 + -1'p605 + -1'p609 + p620 + -1'p621 + -1'p623 = 0
invariant :p401 + p402 = 1
invariant :p600 + p602 + -1'p603 + -1'p605 = 0
invariant :p406 + p407 = 1
invariant :p371 + p372 = 1
invariant :p140 + p528 = 1
invariant :p49 + p486 = 1
invariant :p296 + p297 = 1
invariant :p159 + p542 = 1
invariant :p376 + p377 = 1
invariant :p175 + p550 = 1
invariant :p215 + p573 = 1
invariant :p92 + p106 + p115 + -1'p119 + p124 + p130 + -1'p131 + p139 + -1'p453 + -1'p459 + -1'p460 + -1'p469 + -1'p476 + -1'p480 + -1'p486 + -1'p491 + -1'p501 + -1'p505 + -1'p520 + -1'p528 + -1'p532 + -1'p538 + -1'p542 + -1'p550 + -1'p554 + -1'p558 + -1'p565 + -1'p569 + -1'p573 + -1'p577 + -1'p581 + -1'p587 + -1'p591 + -1'p595 + -1'p599 + p603 + -1'p608 + -1'p614 + p615 + -1'p623 + -1'p627 + -1'p628 = 0
invariant :p172 + p173 = 1
invariant :p453 + p459 + p460 + p469 + p476 + p480 + p486 + p491 + p501 + p505 + p517 + p520 + p523 + p528 + p532 + p538 + p542 + p550 + p554 + p558 + p565 + p569 + p573 + p577 + p581 + p587 + p591 + p595 + p603 + p605 + p609 + p611 + p615 + p617 + p621 + p623 + p627 + p628 = 1
invariant :p80 + p501 = 1
invariant :p227 + p581 = 1
invariant :p233 + p587 = 1
invariant :p316 + p317 = 1
invariant :p597 + p599 + -1'p603 + -1'p605 = 0
invariant :p181 + p554 = 1
invariant :p240 + p591 = 1
invariant :p29 + p469 = 1
invariant :p103 + -1'p115 + p119 + p121 + p122 + -1'p130 + p131 + p133 + p453 + p459 + p460 + p469 + p476 + p480 + p486 + p491 + p501 + p505 + p520 + p523 + p528 + p532 + p538 + p542 + p550 + p554 + p558 + p565 + p569 + p573 + p577 + p581 + p587 + p591 + p595 + p599 + p608 + p614 + p621 + p623 + p627 + p628 = 1
invariant :p351 + p352 = 1
invariant :p416 + p417 = 1
invariant :p411 + p412 = 1
invariant :-1'p106 + p118 + -1'p119 + -1'p121 + -1'p122 + -1'p124 + p127 + -1'p134 + p520 + -1'p602 + p603 + p605 + p609 + -1'p620 + p621 + p623 = 0
invariant :p146 + p532 = 1
invariant :p606 + p608 + -1'p609 + -1'p611 = 0
invariant :p612 + p614 + -1'p615 + -1'p617 = 0
invariant :p128 + p130 + -1'p131 + -1'p133 = 0
invariant :p618 + p620 + -1'p621 + -1'p623 = 0
invariant :p356 + p357 = 1
invariant :p624 + p625 + -1'p627 + -1'p628 = 0
invariant :p116 + p118 + -1'p119 + -1'p121 = 0
invariant :p321 + p322 = 1
invariant :p113 + p115 + -1'p119 + -1'p121 = 0
invariant :p306 + p307 = 1
invariant :p381 + p382 = 1
invariant :p336 + p337 = 1
invariant :p386 + p387 = 1
invariant :p426 + p427 = 1
invariant :p203 + p565 = 1
invariant :p421 + p422 = 1
invariant :p86 + p505 = 1
invariant :p311 + p312 = 1
invariant :p326 + p327 = 1
invariant :p221 + p577 = 1
invariant :p187 + p558 = 1
invariant :p56 + p491 = 1
invariant :p193 + p201 + p627 = 1
invariant :p198 + -1'p201 + -1'p625 + p628 = 0
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 3 ordering constraints for composite.
built 124 ordering constraints for composite.
built 123 ordering constraints for composite.
built 122 ordering constraints for composite.
built 117 ordering constraints for composite.
built 115 ordering constraints for composite.
built 113 ordering constraints for composite.
built 111 ordering constraints for composite.
built 109 ordering constraints for composite.
built 107 ordering constraints for composite.
built 105 ordering constraints for composite.
built 103 ordering constraints for composite.
built 101 ordering constraints for composite.
built 99 ordering constraints for composite.
built 97 ordering constraints for composite.
built 95 ordering constraints for composite.
built 93 ordering constraints for composite.
built 91 ordering constraints for composite.
built 89 ordering constraints for composite.
built 87 ordering constraints for composite.
built 85 ordering constraints for composite.
built 77 ordering constraints for composite.
built 75 ordering constraints for composite.
built 58 ordering constraints for composite.
built 41 ordering constraints for composite.
built 38 ordering constraints for composite.
built 35 ordering constraints for composite.
built 33 ordering constraints for composite.
built 32 ordering constraints for composite.
built 14 ordering constraints for composite.
built 12 ordering constraints for composite.
built 10 ordering constraints for composite.
built 8 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
built 124 ordering constraints for composite.
built 10 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,10020,1.87767,72096,4873,403,70294,1437,985,652863,177,3801,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,972,2.35125,72096,1033,113,70294,3881,2496,652863,624,6730,41531

System contains 972 deadlocks (shown below if less than --print-limit option) !
FORMULA BusinessProcesses-PT-15-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 972 states ] showing 10 first states
[ i1={[ u207={[ p459=1 ]
} u146={[ ]
} u145={[ ]
} u144={[ ]
} u143={[ ]
} u142={[ ]
} u141={[ ]
} u140={[ ]
} u139={[ ]
} u138={[ ]
} i0={[ u137={[ ]
} u136={[ ]
} ]
} ]
} i0={[ i1={[ u133={[ p447=1 ]
} i0={[ u132={[ p442=1 ]
} i0={[ u131={[ p437=1 ]
} i0={[ u130={[ p432=1 ]
} i0={[ u129={[ p427=1 ]
} i0={[ u128={[ p422=1 ]
} i0={[ u127={[ p417=1 ]
} i0={[ u126={[ p412=1 ]
} i0={[ u125={[ p407=1 ]
} i0={[ u124={[ p402=1 ]
} i0={[ u123={[ p396=1 ]
} i0={[ u122={[ p392=1 ]
} i0={[ u121={[ p387=1 ]
} i0={[ u120={[ p382=1 ]
} i0={[ u119={[ p377=1 ]
} i0={[ u118={[ p372=1 ]
} i0={[ u117={[ p367=1 ]
} i0={[ u116={[ p362=1 ]
} i0={[ u115={[ p357=1 ]
} i0={[ u114={[ p352=1 ]
} i0={[ u113={[ p347=1 ]
} i0={[ u112={[ p342=1 ]
} i0={[ u111={[ p337=1 ]
} i0={[ u110={[ ]
[ p332=1 ]
} i0={[ u109={[ p327=1 ]
} i0={[ u108={[ p322=1 ]
} i0={[ u107={[ p317=1 ]
} i0={[ u106={[ p312=1 ]
} i0={[ u105={[ p307=1 ]
} i0={[ u104={[ p302=1 ]
} i0={[ u103={[ p297=1 ]
} u102={[ p292=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
[ u125={[ p406=1 ]
} i0={[ u124={[ p402=1 ]
} i0={[ u123={[ p397=1 ]
} i0={[ u122={[ p392=1 ]
} i0={[ u121={[ p387=1 ]
} i0={[ u120={[ p382=1 ]
} i0={[ u119={[ p377=1 ]
} i0={[ u118={[ p372=1 ]
} i0={[ u117={[ p367=1 ]
} i0={[ u116={[ p362=1 ]
} i0={[ u115={[ p357=1 ]
} i0={[ u114={[ p352=1 ]
} i0={[ u113={[ p347=1 ]
} i0={[ u112={[ p342=1 ]
} i0={[ u111={[ p337=1 ]
} i0={[ u110={[ ]
[ p332=1 ]
} i0={[ u109={[ p327=1 ]
} i0={[ u108={[ p322=1 ]
} i0={[ u107={[ p317=1 ]
} i0={[ u106={[ p312=1 ]
} i0={[ u105={[ p307=1 ]
} i0={[ u104={[ p302=1 ]
} i0={[ u103={[ p297=1 ]
} u102={[ p292=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u70={[ ]
} i0={[ u67={[ p240=1 ]
} u66={[ p233=1 ]
} u65={[ p227=1 ]
} u64={[ p221=1 ]
} u63={[ p215=1 ]
} u212={[ p193=1 ]
} u62={[ p209=1 ]
} u60={[ ]
} u59={[ ]
} u61={[ p203=1 ]
} u57={[ p187=1 ]
} u56={[ p181=1 ]
} u55={[ p175=1 ]
} u54={[ p172=1 ]
} u53={[ p170=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u209={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
} ]
[ i1={[ u133={[ p447=1 ]
} i0={[ u132={[ p442=1 ]
} i0={[ u131={[ p437=1 ]
} i0={[ u130={[ p432=1 ]
} i0={[ u129={[ p427=1 ]
} i0={[ u128={[ p422=1 ]
} i0={[ u127={[ p417=1 ]
} i0={[ u126={[ p412=1 ]
} i0={[ u125={[ p407=1 ]
} i0={[ u124={[ p402=1 ]
} i0={[ u123={[ p397=1 ]
} i0={[ u122={[ p392=1 ]
} i0={[ u121={[ p387=1 ]
} i0={[ u120={[ p382=1 ]
} i0={[ u119={[ p377=1 ]
} i0={[ u118={[ p372=1 ]
} i0={[ u117={[ p367=1 ]
} i0={[ u116={[ p362=1 ]
} i0={[ u115={[ p357=1 ]
} i0={[ u114={[ p352=1 ]
} i0={[ u113={[ p347=1 ]
} i0={[ u112={[ p342=1 ]
} i0={[ u111={[ p337=1 ]
} i0={[ u110={[ ]
[ p332=1 ]
} i0={[ u109={[ p327=1 ]
} i0={[ u108={[ p322=1 ]
} i0={[ u107={[ p317=1 ]
} i0={[ u106={[ p312=1 ]
} i0={[ u105={[ p307=1 ]
} i0={[ u104={[ p302=1 ]
} i0={[ u103={[ p297=1 ]
} u102={[ p292=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u70={[ ]
} i0={[ u67={[ p240=1 ]
} u66={[ p233=1 ]
} u65={[ p227=1 ]
} u64={[ p221=1 ]
} u63={[ p215=1 ]
} u212={[ p193=1 ]
} u62={[ p209=1 ]
} u60={[ ]
} u59={[ ]
} u61={[ p203=1 ]
} u57={[ p187=1 ]
} u56={[ p181=1 ]
} u55={[ p175=1 ]
} u54={[ p173=1 ]
} u53={[ p170=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u209={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
[ u67={[ p240=1 ]
} u66={[ p233=1 ]
} u65={[ p227=1 ]
} u64={[ p221=1 ]
} u63={[ p215=1 ]
} u212={[ p193=1 ]
} u62={[ p209=1 ]
} u60={[ ]
} u59={[ ]
} u61={[ p203=1 ]
} u57={[ p187=1 ]
} u56={[ p181=1 ]
} u55={[ p175=1 ]
} u54={[ p172=1 ]
} u53={[ p169=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u209={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
[ u70={[ p257=1 ]
} i0={[ u67={[ p240=1 ]
} u66={[ p233=1 ]
} u65={[ p227=1 ]
} u64={[ p221=1 ]
} u63={[ p215=1 ]
} u212={[ p193=1 ]
} u62={[ p209=1 ]
} u60={[ ]
} u59={[ ]
} u61={[ p203=1 ]
} u57={[ p187=1 ]
} u56={[ p181=1 ]
} u55={[ p175=1 ]
} u54={[ p172=1 ]
} u53={[ p169=1 ]
} u51={[ p159=1 ]
} u47={[ ]
} u46={[ ]
} u209={[ p92=1 ]
} u50={[ p152=1 ]
} u45={[ ]
} u44={[ ]
} u49={[ p146=1 ]
} u43={[ ]
} u42={[ ]
} u48={[ p140=1 ]
} u41={[ ]
} u40={[ ]
} u39={[ ]
} u36={[ p86=1 ]
} u35={[ p80=1 ]
} u34={[ p75=1 ]
} u33={[ p56=1 ]
} u32={[ p49=1 ]
} u31={[ p43=1 ]
} u30={[ p36=1 ]
} u29={[ p29=1 ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527968637161

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 7:43:51 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 7:43:51 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 7:43:51 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 139 ms
Jun 02, 2018 7:43:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 630 places.
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 566 transitions.
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 7:43:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 30 ms
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 185 ms
Jun 02, 2018 7:43:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 9 ms
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 566 transitions.
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 39 ms
Jun 02, 2018 7:43:52 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 134 transitions.
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 33 ms
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36 ms
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 74 place invariants in 46 ms
Jun 02, 2018 7:43:53 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 166 redundant transitions.
Jun 02, 2018 7:43:53 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 18 ms
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 167 variables to be positive in 1621 ms
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 134 transitions.
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/134 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 134 transitions.
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 134 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 7:43:56 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3453ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-15"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-15.tgz
mv BusinessProcesses-PT-15 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BusinessProcesses-PT-15, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749149800314"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;